EE247 Homework 2
EE247 Homework 2 19969527 Kwangmo Jung ([email protected])
1. a)
For a -3dB bandwidth of 2MHz, R = 1 [Ω] Rr 1 1 L1 = L3 = L = LHP × = 42.701 [nH] Norm = ω −3dB 2π × 2 × 10 6 1.8636 1 1 1 HP C= C Norm = × = 62.150 [nF] 6 R r ω −3dB 1 × 2π × 2 × 10 1.2804 Figure 1-1 shows the frequency response of the given RLC filter. From Figure 1-1(a) we find that a -3dB frequency is about 2MHz. The shape of the transition band in Figure 1-1(a) and passband ripple in Figure 1-1(b) implies that this filter is Chebyshev type I. The passband ripple is about 0.5dB and the out-of-band rejection at 1MHz is about 23.76dB. Figure 1-1(c), (d) shows the phase response and the group delay, respectively.
(a) Magnitude response
(b) Enlarged magnitude response for the passband
(c) Phase response
(d) Group delay
Figure 1-1: Frequency response of the first RLC high-pass filter b) For the given circuit, let’s represent the voltage and the current at each node as shown in Figure 1-2(a). From this we get the signal flow graph represented in Figure 1-2(b). To represent every node by voltage, let’s use the scale factor R*=R for Figure 1-2(b). After some arrangement we get the result in Figure 1-2(c). Figure 1-2(d) based on integrators with adding blocks. Parameters τ1, τ2, τ3 are as follows: L τ 1 = τ 3 = = 42.701 [ns], τ 2 = RC = 62.150 [ns] R
(a) Given RLC circuitr
(b) Signal flow graph for (a) V2
VO
+ V3
V2'
V4'
+
V3'
+
VIN
(c) Signal flow graph
(d) Block diagram
Figure 1-2: Signal flow graph of the first RLC circuit c)
Schematic for the integrator-based version of the given filter is shown in Figure 1-3. I use one additional OP-amp to generate the voltage output Vo. In Figure 1-2(c), let’s find the equation for each input to integrators with τ1, τ2, and τ3. Note that every equation should be represented by a function of three integrator outputs and one additional amplifier output. Vτ 3,in = VO Vτ 1,in = V2 = V3 + VO
Vτ 2,in = V3' = VIN − V2' − V2 = VIN − V2' − V3 − VO
Thus, we can find the equation for VO. VO = V3' − V4' = VIN − V2' − V3 − V4' − VO Figure 1-3 shows the implementation based on these equations. I set all resistances in the inverting amplifier to be equal to 1kΩ. d) Assuming that all integrator capacitors are equal to 5pF, then τ 42.701 × 10 −9 R1 = R3 = 1 = ≈ 8.54 [kΩ] C 5 × 10 −12 τ 62.150 × 10 −9 R2 = 2 = = 12.43 [kΩ] C 5 × 10 −12 Figure 1-4 depicts the frequency and phase response of the circuit in Figure 1-3. In this figure I overlay the response onto the result in problem a). We can find that both the frequency and phase response are exactly same with the result in Figure 1-1.
R1=8.54k
R3=8.54k
Adder using inverting amplifier (Use RA=1k for all resistors)
R2=12.43k
Figure 1-3: Schematic of the first RLC circuit
(a) Magnitude response
(b) Phase response
Figure 1-4: Frequency and phase response of the circuit in Figure 1-3
e)
For a -3dB bandwidth of 2MHz and R=1Ω, we get Rr 1 1 L1 = L3 = L1HP × = 69.072 [nH] , 3, Norm = ω −3dB 2π × 2 × 10 6 1.1521 Rr 1 1 L2 = LHP × = 276.50 [nH] 2 , Norm = ω −3dB 2π × 2 × 10 6 0.2878 1 1 1 HP C= C Norm = × = 88.557 [nF] R r ω −3dB 1 × 2π × 2 × 10 6 0.8986 Figure 1-5(a) shows the frequency response of the given RLC filter and Figure 1-5(b) is the enlarge version for the passband. The passband ripple is about 0.28dB and the out-of-band rejection at 1MHz is about 44.47dB which is quite high due to the notch. Figure 1-5(c), (d) shows the phase response and the group delay, respectively.
(a) Magnitude response
(b) Enlarged magnitude response for the passband
(c) Phase response
(d) Group delay
Figure 1-5: Frequency response of the second RLC high-pass filter f)
For the second RLC circuit, node current IL is added from Figure 1-2(a). Node equations regarding V2 and V4 are as follows: V V V3 = V 2 − V 4 I1 = I 2 + I 3 + I L = I 3 + 2 + 3 , sL1 sL 2 ⎛ 1 ⎛ ⎞ L1 1 ⎞ 1 1 ⎟⎟V2 − ⎜⎜V 2 − I 1 − I 3 = ⎜⎜ V4 = V 4 ⎟⎟ + sL2 s (L1 // L2 ) ⎝ L1 + L2 ⎠ ⎝ sL1 sL 2 ⎠ Similarly, we get ⎛ 1 ⎛ ⎞ L1 1 ⎞ 1 1 ⎟⎟V 4 − ⎜⎜V4 − I 3 − I 5 = ⎜⎜ V2 = V 2 ⎟⎟ + sL sL sL s L L L L + ( // ) 2 ⎠ 2 1 2 ⎝ 1 2 ⎝ 1 ⎠ Thus, we can eliminate the branch L2 and get the signal flow graph as shown in Figure 1-2(b). From this we get the signal flow graph represented in Figure 1-6(b). To represent every node by voltage, let’s use the scale factor R*=R for Figure 1-6(b). After some arrangement we get the result in Figure 1-6(c). The block diagram is shown in Figure 1-6(d), where parameters τ1, τ2, τ3 are as follows: L // L2 69.072 × 276.50 × 10 −9 τ 2 = RC = 88.557 [ns] ≈ τ1 =τ 3 = 1 ≈ 55.266 [ns], 69.072 + 276.50 R
1
VIN
1
V1
-1
V2
1
V3
V4
1 SC
1/R 1 S(L1//L2)
I1
I2
-1
I3
V2
1
V3
1
VO
1 SRC -1
R S(L1//L2)
V2'
-1
I5
1
VO
+
1
+
L1 L1+L2 1
L1 L1+L2
-1
I4
(b) Signal flow graph for (a)
1
V2
R 1 S(L1//L2)
1
(a) Given RLC circuit
VO
L1 L1+L2 1
L1 L1+L2
1
1
×L
1
L1+L2 -1
×
L1 V3 L1+L2
+
1
R S(L1//L2)
V3'
V4'
1
VIN
(c) Signal flow graph
V2'
+
V4'
V3'
+
VIN
(d) Block diagram
Figure 1-6: Signal flow graph and schematic for the second RLC circuit g) Schematic for the integrator-based version of the given filter is shown in Figure 1-7. In this problem I also use one additional OP-amp to generate the voltage output Vo. For the block diagram in Figure 1-6(c), let’s find the equation for each integrator input. V2 = VO + V3 L1 L2 L1 Vτ 3,in = VO − V2 = VO − V3 L1 + L2 L1 + L2 L1 + L2 L1 L2 Vτ 1,in = V2 − VO = VO + V3 L1 + L2 L1 + L2 Vτ 2,in = V3' = VIN − V2' − V2 = VIN − V2' − V3 − VO VO = V3' − V4' = VIN − V2' − V3 − V4' − VO Because of the added inductor, some inputs to an integrator are scaled. In an integrator the input voltage is first converted to the current, and then the current is charged to the capacitor. Thus, effects of the scale factor with regard to L1 and L2 can be modeled by change of resistor values. Figure 1-3 shows the implementation based on these equations. I set all resistances in the inverting amplifier to be equal to 1kΩ.
h) Assuming that all integrator capacitors are equal to 5pF, then τ τ 55.266 × 10 −9 88.557 × 10 −9 R1 = R3 = 1 = ≈ 11.05 [kΩ], R2 = 2 = ≈ 17.71 [kΩ] −12 C C 5 × 10 5 × 10 −12 To compensate the scale factor with regard to L1 and L2, let’s adjust R1 and R3 for each input voltage signal. L + L2 R1,V 3 = R12 = R1 ≈ 11.05 [kΩ] R1,VO = R11 = 1 R1 ≈ 13.81 [kΩ], L2 L + L2 L + L2 R3,VO = R31 = 1 R3 ≈ 13.81 [kΩ], R1,V 3 = R32 = 1 R1 ≈ 55.28 [kΩ] L2 L1 Figure 1-8 depicts the frequency and phase response of the circuit in Figure 1-7. In this figure I overlay the response onto the result in problem e). As expected, both the frequency and phase response are exactly same with the result in Figure 1-5.
R12=11.05k
R32=55.28k
R11=13.81k
R31=13.81k
Adder using inverting amplifier (Use RA=1k for all resistors)
R2=17.71k
Figure 1-7: Signal flow graph and schematic for the second RLC circuit
(a) Magnitude response
(b) Phase response
Figure 1-8: Frequency and phase response of the circuit in Figure 1-7
i)
For the given two filters, I sweep the OP-amp gain G to find a point which makes 1dB magnitude change in the passband. Figure 1-9 shows the magnitude response of two filters zoomed to the passband. OP-amp open-loop gain G for 1dB magnitude change is given by G1dB , first = 24.52 G1dB ,sec ond = 24.63
Note that the change is droop. Finite OP-amp DC gain introduces the phase lead at the corner frequency fc=2MHz. Because of the near-DC pole introduced by finite DC gain in integrators, droop occurs at the passband of the filter.
(a) First filter
(b) Second filter
Figure 1-9: Zoomed passband response of the given two filters
1. a)
For a -3dB bandwidth of 2MHz, R = 1 [Ω] Rr 1 1 L1 = L3 = L = LHP × = 42.701 [nH] Norm = ω −3dB 2π × 2 × 10 6 1.8636 1 1 1 HP C= C Norm = × = 62.150 [nF] 6 R r ω −3dB 1 × 2π × 2 × 10 1.2804 Figure 1-1 shows the frequency response of the given RLC filter. From Figure 1-1(a) we find that a -3dB frequency is about 2MHz. The shape of the transition band in Figure 1-1(a) and passband ripple in Figure 1-1(b) implies that this filter is Chebyshev type I. The passband ripple is about 0.5dB and the out-of-band rejection at 1MHz is about 23.76dB. Figure 1-1(c), (d) shows the phase response and the group delay, respectively.
(a) Magnitude response
(b) Enlarged magnitude response for the passband
(c) Phase response
(d) Group delay
Figure 1-1: Frequency response of the first RLC high-pass filter b) For the given circuit, let’s represent the voltage and the current at each node as shown in Figure 1-2(a). From this we get the signal flow graph represented in Figure 1-2(b). To represent every node by voltage, let’s use the scale factor R*=R for Figure 1-2(b). After some arrangement we get the result in Figure 1-2(c). Figure 1-2(d) based on integrators with adding blocks. Parameters τ1, τ2, τ3 are as follows: L τ 1 = τ 3 = = 42.701 [ns], τ 2 = RC = 62.150 [ns] R
(a) Given RLC circuitr
(b) Signal flow graph for (a) V2
VO
+ V3
V2'
V4'
+
V3'
+
VIN
(c) Signal flow graph
(d) Block diagram
Figure 1-2: Signal flow graph of the first RLC circuit c)
Schematic for the integrator-based version of the given filter is shown in Figure 1-3. I use one additional OP-amp to generate the voltage output Vo. In Figure 1-2(c), let’s find the equation for each input to integrators with τ1, τ2, and τ3. Note that every equation should be represented by a function of three integrator outputs and one additional amplifier output. Vτ 3,in = VO Vτ 1,in = V2 = V3 + VO
Vτ 2,in = V3' = VIN − V2' − V2 = VIN − V2' − V3 − VO
Thus, we can find the equation for VO. VO = V3' − V4' = VIN − V2' − V3 − V4' − VO Figure 1-3 shows the implementation based on these equations. I set all resistances in the inverting amplifier to be equal to 1kΩ. d) Assuming that all integrator capacitors are equal to 5pF, then τ 42.701 × 10 −9 R1 = R3 = 1 = ≈ 8.54 [kΩ] C 5 × 10 −12 τ 62.150 × 10 −9 R2 = 2 = = 12.43 [kΩ] C 5 × 10 −12 Figure 1-4 depicts the frequency and phase response of the circuit in Figure 1-3. In this figure I overlay the response onto the result in problem a). We can find that both the frequency and phase response are exactly same with the result in Figure 1-1.
R1=8.54k
R3=8.54k
Adder using inverting amplifier (Use RA=1k for all resistors)
R2=12.43k
Figure 1-3: Schematic of the first RLC circuit
(a) Magnitude response
(b) Phase response
Figure 1-4: Frequency and phase response of the circuit in Figure 1-3
e)
For a -3dB bandwidth of 2MHz and R=1Ω, we get Rr 1 1 L1 = L3 = L1HP × = 69.072 [nH] , 3, Norm = ω −3dB 2π × 2 × 10 6 1.1521 Rr 1 1 L2 = LHP × = 276.50 [nH] 2 , Norm = ω −3dB 2π × 2 × 10 6 0.2878 1 1 1 HP C= C Norm = × = 88.557 [nF] R r ω −3dB 1 × 2π × 2 × 10 6 0.8986 Figure 1-5(a) shows the frequency response of the given RLC filter and Figure 1-5(b) is the enlarge version for the passband. The passband ripple is about 0.28dB and the out-of-band rejection at 1MHz is about 44.47dB which is quite high due to the notch. Figure 1-5(c), (d) shows the phase response and the group delay, respectively.
(a) Magnitude response
(b) Enlarged magnitude response for the passband
(c) Phase response
(d) Group delay
Figure 1-5: Frequency response of the second RLC high-pass filter f)
For the second RLC circuit, node current IL is added from Figure 1-2(a). Node equations regarding V2 and V4 are as follows: V V V3 = V 2 − V 4 I1 = I 2 + I 3 + I L = I 3 + 2 + 3 , sL1 sL 2 ⎛ 1 ⎛ ⎞ L1 1 ⎞ 1 1 ⎟⎟V2 − ⎜⎜V 2 − I 1 − I 3 = ⎜⎜ V4 = V 4 ⎟⎟ + sL2 s (L1 // L2 ) ⎝ L1 + L2 ⎠ ⎝ sL1 sL 2 ⎠ Similarly, we get ⎛ 1 ⎛ ⎞ L1 1 ⎞ 1 1 ⎟⎟V 4 − ⎜⎜V4 − I 3 − I 5 = ⎜⎜ V2 = V 2 ⎟⎟ + sL sL sL s L L L L + ( // ) 2 ⎠ 2 1 2 ⎝ 1 2 ⎝ 1 ⎠ Thus, we can eliminate the branch L2 and get the signal flow graph as shown in Figure 1-2(b). From this we get the signal flow graph represented in Figure 1-6(b). To represent every node by voltage, let’s use the scale factor R*=R for Figure 1-6(b). After some arrangement we get the result in Figure 1-6(c). The block diagram is shown in Figure 1-6(d), where parameters τ1, τ2, τ3 are as follows: L // L2 69.072 × 276.50 × 10 −9 τ 2 = RC = 88.557 [ns] ≈ τ1 =τ 3 = 1 ≈ 55.266 [ns], 69.072 + 276.50 R
1
VIN
1
V1
-1
V2
1
V3
V4
1 SC
1/R 1 S(L1//L2)
I1
I2
-1
I3
V2
1
V3
1
VO
1 SRC -1
R S(L1//L2)
V2'
-1
I5
1
VO
+
1
+
L1 L1+L2 1
L1 L1+L2
-1
I4
(b) Signal flow graph for (a)
1
V2
R 1 S(L1//L2)
1
(a) Given RLC circuit
VO
L1 L1+L2 1
L1 L1+L2
1
1
×L
1
L1+L2 -1
×
L1 V3 L1+L2
+
1
R S(L1//L2)
V3'
V4'
1
VIN
(c) Signal flow graph
V2'
+
V4'
V3'
+
VIN
(d) Block diagram
Figure 1-6: Signal flow graph and schematic for the second RLC circuit g) Schematic for the integrator-based version of the given filter is shown in Figure 1-7. In this problem I also use one additional OP-amp to generate the voltage output Vo. For the block diagram in Figure 1-6(c), let’s find the equation for each integrator input. V2 = VO + V3 L1 L2 L1 Vτ 3,in = VO − V2 = VO − V3 L1 + L2 L1 + L2 L1 + L2 L1 L2 Vτ 1,in = V2 − VO = VO + V3 L1 + L2 L1 + L2 Vτ 2,in = V3' = VIN − V2' − V2 = VIN − V2' − V3 − VO VO = V3' − V4' = VIN − V2' − V3 − V4' − VO Because of the added inductor, some inputs to an integrator are scaled. In an integrator the input voltage is first converted to the current, and then the current is charged to the capacitor. Thus, effects of the scale factor with regard to L1 and L2 can be modeled by change of resistor values. Figure 1-3 shows the implementation based on these equations. I set all resistances in the inverting amplifier to be equal to 1kΩ.
h) Assuming that all integrator capacitors are equal to 5pF, then τ τ 55.266 × 10 −9 88.557 × 10 −9 R1 = R3 = 1 = ≈ 11.05 [kΩ], R2 = 2 = ≈ 17.71 [kΩ] −12 C C 5 × 10 5 × 10 −12 To compensate the scale factor with regard to L1 and L2, let’s adjust R1 and R3 for each input voltage signal. L + L2 R1,V 3 = R12 = R1 ≈ 11.05 [kΩ] R1,VO = R11 = 1 R1 ≈ 13.81 [kΩ], L2 L + L2 L + L2 R3,VO = R31 = 1 R3 ≈ 13.81 [kΩ], R1,V 3 = R32 = 1 R1 ≈ 55.28 [kΩ] L2 L1 Figure 1-8 depicts the frequency and phase response of the circuit in Figure 1-7. In this figure I overlay the response onto the result in problem e). As expected, both the frequency and phase response are exactly same with the result in Figure 1-5.
R12=11.05k
R32=55.28k
R11=13.81k
R31=13.81k
Adder using inverting amplifier (Use RA=1k for all resistors)
R2=17.71k
Figure 1-7: Signal flow graph and schematic for the second RLC circuit
(a) Magnitude response
(b) Phase response
Figure 1-8: Frequency and phase response of the circuit in Figure 1-7
i)
For the given two filters, I sweep the OP-amp gain G to find a point which makes 1dB magnitude change in the passband. Figure 1-9 shows the magnitude response of two filters zoomed to the passband. OP-amp open-loop gain G for 1dB magnitude change is given by G1dB , first = 24.52 G1dB ,sec ond = 24.63
Note that the change is droop. Finite OP-amp DC gain introduces the phase lead at the corner frequency fc=2MHz. Because of the near-DC pole introduced by finite DC gain in integrators, droop occurs at the passband of the filter.
(a) First filter
(b) Second filter
Figure 1-9: Zoomed passband response of the given two filters
