30.3 100GHz Depletion-Mode Ga2O3/GaN Single ...
100GHz depletion-mode Ga2O3/GaN single nanowire MOSFET by photo-enhanced chemical oxidation method Jeng-Wei Yu*, Yuh-Renn Wu, Jian-Jang Huang, Lung-Han Peng, Institute of Photonics and Optoelectronics and Department of Electrical Engineering National Taiwan University, Taipei, Taiwan, R.O.C *Tel: 886-2-33663700ext439, Fax: 886-2-33669793, E-mail: [email protected] Abstract We reported transport characterization on [11 20] GaN single nanowire (SNW)-MOSFET laterally- and directionallygrown on (0001) sapphire substrates. The 60nm-dia. Ga2O3/GaN SNW-MOSFET of 0.1μm gate length was shown to exhibit a saturation current of 160μA, current on/off ratio of 105, swing of 85mV/dec, transconductance of 85μS, and unity current gain bandwidth ft at 95GHz. From a 3D diffusion and drift model analysis, it is shown that a polarization induced 2D electron gas (2DEG) density of 7× 1012 cm2 with mobility of 1000cm2/V-sec confined at the interface of semi-polar { 1 1 0 1 } GaN/Ga2O3 was responsible for the high-speed transport characteristics. Introduction Strategic replacement of the transistor channel material by high mobility III-V, SiGe, CNT using a nanowire (NW) NW-MOSFET structure represents a feasible solution to continue the Moore’s scaling law for the next-generation Si-based CMOS technology.[1] A proper design in the NW structure can impose a characteristic change in the carrier transport mechanism from the diffusive to the ballistic regime, leading to a possibility of ultra-high speed operation. These observations inspired recent material research to establish the growth techniques of NW core-shell hetero-structures.[2] A common practice of the NW device fabrication invokes the procedures of harvesting the NWs from the growth template followed by their repositioning over a foreign substrate. Recent study, however, has shown that these procedures can inadvertently cause various straining conditions to the NWs.[3] It can alter the metal-NW contact properties and result in a device stability issue. The surface states of NW can further cause side effects of depletion or charge trapping, and modify the carrier transportation and recombination properties.[4] These observations illustrate the complexity in extracting the NW intrinsic parameters using the existing NW processing techniques. To explore the device physics, it would be desirable to construct the NWs and device structures that are immune to the aforementioned surface treatment issues. In this work, we reported solutions to resolve the issues of nitride passivation and demonstrate a high-speed operation of GaN NW transistors in the 100GHz regime. Combining the efforts of (i) laterally and directed growth of [11 20] gallium nitride (GaN) NW, (ii) photo-enhanced wet oxidation to transform the out-shell GaN to gallium oxide (Ga2O3) high-k
978-1-4244-7419-6/10/$26.00 ©2010 IEEE
passivation layer, we construct a new design of GaN NW-MOSFETs that possess superior DC and RF performance to the existing GaN-NW transistor technology.[5] Experiment Our growth of GaN NWs was conducted in a home-built chemical vapor deposition (CVD) system by invoking a gold (Au) catalyst-assisted vapor-liquid-solid (VLS) mechanism. The gallium (Ga) source was a mixture composed of a 1:1 ratio of Ga2O3 : graphite; whereas the ammonia (NH3) was served as the nitrogen (N) source and maintained at a flow rate between 20 and 100 standard cubic centimeter (sccm). A thin (~1nm) Au 2D dot pattern, which designates the NW growth sites and marks the locations of drain/source for the sub-sequent device processing, was deposited onto the (0001) sapphire substrates. This procedure can facilitate a preferential [11 20] -axial growth of GaN NWs, typically with a wire length of 10μm and size of 60nm, to be directed between the drain/source sites defined by the Au dots. A bi-layered titanium/aluminum (Ti/Au) pad was then deposited onto the drain/source regions and served as the local cathode to activate the photo-enhance chemical oxidation (PEC) process in which the non-patterned portion of GaN NWs acted as the local anode, shown in Fig1. The PEC process was conducted in a buffered ammonium acetatc (CH3COONH4) electrolyte of pH=6.8 under illumination with a 254nm mercury light source at an intensity ~ 5mW/cm2 for 5 min.[6] Finally, a top-gate metal of Ni/Au provides a modulation of carrier transportation in the NW channel. Fig.6 schematically illustrates the top-gate Ga2O3/GaN NW-MOSFET structure studied in this work. Experiment results We use the photo-enhanced chemical (PEC) technique to form high-quality metal oxide semiconductor (MOS) devices made of gallium oxide (Ga2O3)/gallium nitride (GaN). Shown in Fig.2-4, gate leakage current density as low as 2×10–7 A/cm2 at a bias is observed in the GaN MOS devices that are formed by novel PEC wet etching and have the top surface and mesa sidewall passivated by the Ga2O3. The Ga2O3/GaON/GaN system releases the interfacial strain and thus minimizes the density of interfacial states. The IV and high-frequency CV analyses reveal that the Ga2O3 layer can sustain an electrical breakdown field of 3.5 MV/cm and the structures have a low density of interfacial state (Dit) in the order of 1011 eV–1cm–2. We attribute these results to the immunity to surface damage by the novel PEC wet etching and the effective passivation on mesa sidewall and surface formed
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by the photo-grown Ga2O3. The cross-sectional TEM image in Fig.7 of a representative GaN NW indicates that the wire has a triangular cross section. From the electron diffraction pattern analysis, viewed from the [0001]-zone axis, one can identify a preferential axial growth of the GaN NWs along the [11 20] direction, whereas the cross-section of the wire is bounded by two inclined semipolar { 1 1 0 1 }facets and (0001) plane. These observations made possible a design of top-gate GaN single nanowire SNW-MOSFET, shown in Fig.8, by invoking a PEC oxidation process [6] to transform the out-shell { 1 1 0 1 }GaN into a 10nm-thick Ga2O3 passivation layer. The discontinuity of spontaneous polarization can thereby induce 2DEG at the { 1 1 0 1 } Ga2O3/GaN interfaces.[7] The inclined facets of { 1 1 0 1 } Ga2O3/GaN can further provide a top-gate configuration where the fringing field effect can exert high-field action to enable high speed modulation of the 2DEG in the surface channel. As a concept proof, the room-temperature electric data of DC, transfer, and RF characteristics for a Ga2O3/GaN SNW-MOSFET device of Lg=0.1μm and Lds=1μm were shown in Fig.10-13, respectively. We denote an excellent saturation and pinch-off behavior in the I-V curve to support a transistor behavior. This device presents a current-carrying capacity ~160μA. and transconductance value ~85μS due to immunity from the surface related damage issues.[3-4] This effect is reflected upon an observation of current Ion/Ioff ratio ~105 and sub-threshold swing factor S~85mV/dec. To evaluate the high-frequency response, an “open” and “short” test structure was used for de-embedding which architecture is identical to the active device but without the NW channel. From the intrinsic current (lH21l2) and maximum stable power (MSG/MAG) gain plots in Fig.12 one can determine a cutoff frequency of unity gain at ft=95GHz and fMax=105GHz, respectively, by intersecting the plots at −20 and −10 dB/decade slopes. The latter presents significant improvement from its counterpart of AlGaN/GaN NW-MISFET [5] of similar gate length, whereas the device fabrication was undergone the NW harvesting and repositioning procedure. A list of device DC/RF characteristics of the newly proposed FETs such as CNTs, grapheme, AlGaN/GaN, and this work are shown in Table. I.[9][10] To access the intrinsic NW transport parameters, we applied 3D Poisson, and drift-diffusion model analyses and solved these equations self-consistently to obtain the charge and electric filed distribution along the GaN NW.[11] Note by −2 incorporating a 2DEG density of 7×1012 cm at the interface of Ga2O3/{ 1 1 0 1 }GaN, with a mobility of 1000 cm2/V-s and high-field saturation velocity of 107 cm/s as the fitting parameters, the calculated I-V characteristics in Fig.14 can be found in a good agreement with the experimental curves. The origin of having 2DEG confined at the Ga2O3/{ 1 1 0 1 }GaN/interface can be understood due to the
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discontinuity of the spontaneous polarization (Psp) effect as happened to the more familiar case of AlGaN/GaN interface. Its virtue is to screen the polarization-induced fixed charge at the interface and exhibit a cosine dependence (θ=62°) to the bulk GaN Psp value of −0.029C/m2. Moreover, combination of good carrier confinement and immunity to the surface damage and roughness scattering issues have resulted in a fitted 2DEG mobility value of 1000cm2/V-s in the proposed Ga2O3/GaN NW-MOSFET structure to be comparable to that previously seen in the planar AlGaN/GaN HEMT devices. Further equivalent circuit model analysis suggests that the RF response of the proposed Ga2O3/GaN NW-MOSFET was limited by the stray capacitance and the resultant signal losses can be ascribed the misalignment of the drain/source contacts with respect to the Ga2O3/GaN NW-MOSFET in the photolithographic process. Summary In summary, we demonstrated a new design of a top-gate Ga2O3/GaN single nanowire MOSFET by combining a laterally directed growth mechanism of [11 20] GaN NWs with the photo-enhanced chemical oxidation process to convert the out-shell { 1 1 0 1 } GaN to a thin 8nm Ga2O3 passivation layer. We showed that by taking advantage of the effects of (i) 2DEG induced at the Ga2O3/GaN interface due to the discontinuity of polarization effect and (ii) the high-field action due to the fringing field effect exerted by the metal gate over the inclined { 1 1 0 1 } GaN facets, one can achieve high-speed modulation of the GaN NW channel at a cut-off frequency ft~ 95 GHz at a gate length of 0.1μm. The latter opens a route utilizing semiconductor NWs for high speed electronics applications. Acknowledgment This research been supported by the National Science Council NSC-98-2221-E-002-021-MY3 and Taiwan Semiconductor manufacturing company (TSMC). Reference [1] “Emerging Research Materials” Chapter, International Technology Roadmap for Semiconductors 2009, p.8. [2] W. Lu, et al., IEEE Trans. Electron. Dev. 55, 2859 (2008) [3] Z. Gao et al. J. Appl. Phys. 105, 113707 (2009). [4] B. S. Simpkins et al. J. Appl. Phys. 103, 104313 (2008). [5] S. Vandenbrouck et al. IEEE Electron Dev. Lett. 30, 32 (2009). [6] L.-H. Peng et al., Appl. Phys. Lett. 76, 511 (2000). [7] O. Ambacher et al. J. Appl. Phys. 85, 3222 (1999). [8] Y. Li et al., Nano Lett. 6, 1468 (2006). [9] L. Nougaret et al., Appl. Phys. Lett. 94, 243505 (2009). [10] Y. M. Lin et al., Science 327, 662 (2010). [11] Y.-R. Wu et al., IEEE Trans. Electron Devices 53, 588 (2006)
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Fig.1 Photo-electron chemical oxidation
Fig.4 Leakage current density in GaN MOS devices.
Fig.7 SEM of a 60nm GaN NW, TEM image showing a triangular cross-section, electron diffractions viewed from the [0001] zone-axis
Fig.10 ID-VD characteristics of Lg=0.1μm Ga2O3/GaN SNW-MOSFET
Fig.2 Measured C-V characteristics of the GaN MOS structure.
Fig.3 Hysteresis effect of the GaN MOS structure.
Fig.6 Schematic draw of GaN SNW-MOSFET Fig.5 The interface state density Dit calculated by the Terman method.
Fig.8 Cross-sectional view of proposed Fig.9 SEM photography for Lg=0.5μm Ga2O3/GaN SNW-MOSFET Ga2O3/GaN SNW-MOSFET
Fig.11 Transfer characteristics of Fig.12 Current and power gain plots of Lg=0.1μm Ga2O3/GaN SNW-MOSFET Lg=0.1μm Ga2O3/GaN SNW-MOSFET measured at VDS=4V and VGS=1V
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Fig.13 Measurement of fT and fmax as a Fig.14 Overlaid experimental and Fig.15 Simulation of carrier distribution function of gate-length for Ga2O3/GaN calculation I-V data of Lg=0.5μm at Ga2O3/GaN interface. SNW-MOSFET Ga2O3/GaN SNW-MOSFET
Table. I Device Performance of Newly-proposed transistors Channel CNT [9] Graphene[10] AlGaN/GaN[5] Material nano-ribon Multi-tubes Single-NW film Film Lg (nm) 500 300 240 Ids (μA) 70 5000 − (Vg= 1V) (Vg= −1V) gm (μS) 45 1600 − Ldia/W (nm) 80 20000 − Ids/Ldia(W) 0.87 0.25 0.8 (mA/μm) gm/Ldia(W) 0.56 0.08 0.15 (mS/μm) fT (GHz) 5 80 100 fmax (GHz) 12 − 10
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Ga2O3/GaN Single-NW [This work] 100 100 (Vg= 1V) 85 60 1.67 1.42 95 105
978-1-4244-7419-6/10/$26.00 ©2010 IEEE
passivation layer, we construct a new design of GaN NW-MOSFETs that possess superior DC and RF performance to the existing GaN-NW transistor technology.[5] Experiment Our growth of GaN NWs was conducted in a home-built chemical vapor deposition (CVD) system by invoking a gold (Au) catalyst-assisted vapor-liquid-solid (VLS) mechanism. The gallium (Ga) source was a mixture composed of a 1:1 ratio of Ga2O3 : graphite; whereas the ammonia (NH3) was served as the nitrogen (N) source and maintained at a flow rate between 20 and 100 standard cubic centimeter (sccm). A thin (~1nm) Au 2D dot pattern, which designates the NW growth sites and marks the locations of drain/source for the sub-sequent device processing, was deposited onto the (0001) sapphire substrates. This procedure can facilitate a preferential [11 20] -axial growth of GaN NWs, typically with a wire length of 10μm and size of 60nm, to be directed between the drain/source sites defined by the Au dots. A bi-layered titanium/aluminum (Ti/Au) pad was then deposited onto the drain/source regions and served as the local cathode to activate the photo-enhance chemical oxidation (PEC) process in which the non-patterned portion of GaN NWs acted as the local anode, shown in Fig1. The PEC process was conducted in a buffered ammonium acetatc (CH3COONH4) electrolyte of pH=6.8 under illumination with a 254nm mercury light source at an intensity ~ 5mW/cm2 for 5 min.[6] Finally, a top-gate metal of Ni/Au provides a modulation of carrier transportation in the NW channel. Fig.6 schematically illustrates the top-gate Ga2O3/GaN NW-MOSFET structure studied in this work. Experiment results We use the photo-enhanced chemical (PEC) technique to form high-quality metal oxide semiconductor (MOS) devices made of gallium oxide (Ga2O3)/gallium nitride (GaN). Shown in Fig.2-4, gate leakage current density as low as 2×10–7 A/cm2 at a bias is observed in the GaN MOS devices that are formed by novel PEC wet etching and have the top surface and mesa sidewall passivated by the Ga2O3. The Ga2O3/GaON/GaN system releases the interfacial strain and thus minimizes the density of interfacial states. The IV and high-frequency CV analyses reveal that the Ga2O3 layer can sustain an electrical breakdown field of 3.5 MV/cm and the structures have a low density of interfacial state (Dit) in the order of 1011 eV–1cm–2. We attribute these results to the immunity to surface damage by the novel PEC wet etching and the effective passivation on mesa sidewall and surface formed
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by the photo-grown Ga2O3. The cross-sectional TEM image in Fig.7 of a representative GaN NW indicates that the wire has a triangular cross section. From the electron diffraction pattern analysis, viewed from the [0001]-zone axis, one can identify a preferential axial growth of the GaN NWs along the [11 20] direction, whereas the cross-section of the wire is bounded by two inclined semipolar { 1 1 0 1 }facets and (0001) plane. These observations made possible a design of top-gate GaN single nanowire SNW-MOSFET, shown in Fig.8, by invoking a PEC oxidation process [6] to transform the out-shell { 1 1 0 1 }GaN into a 10nm-thick Ga2O3 passivation layer. The discontinuity of spontaneous polarization can thereby induce 2DEG at the { 1 1 0 1 } Ga2O3/GaN interfaces.[7] The inclined facets of { 1 1 0 1 } Ga2O3/GaN can further provide a top-gate configuration where the fringing field effect can exert high-field action to enable high speed modulation of the 2DEG in the surface channel. As a concept proof, the room-temperature electric data of DC, transfer, and RF characteristics for a Ga2O3/GaN SNW-MOSFET device of Lg=0.1μm and Lds=1μm were shown in Fig.10-13, respectively. We denote an excellent saturation and pinch-off behavior in the I-V curve to support a transistor behavior. This device presents a current-carrying capacity ~160μA. and transconductance value ~85μS due to immunity from the surface related damage issues.[3-4] This effect is reflected upon an observation of current Ion/Ioff ratio ~105 and sub-threshold swing factor S~85mV/dec. To evaluate the high-frequency response, an “open” and “short” test structure was used for de-embedding which architecture is identical to the active device but without the NW channel. From the intrinsic current (lH21l2) and maximum stable power (MSG/MAG) gain plots in Fig.12 one can determine a cutoff frequency of unity gain at ft=95GHz and fMax=105GHz, respectively, by intersecting the plots at −20 and −10 dB/decade slopes. The latter presents significant improvement from its counterpart of AlGaN/GaN NW-MISFET [5] of similar gate length, whereas the device fabrication was undergone the NW harvesting and repositioning procedure. A list of device DC/RF characteristics of the newly proposed FETs such as CNTs, grapheme, AlGaN/GaN, and this work are shown in Table. I.[9][10] To access the intrinsic NW transport parameters, we applied 3D Poisson, and drift-diffusion model analyses and solved these equations self-consistently to obtain the charge and electric filed distribution along the GaN NW.[11] Note by −2 incorporating a 2DEG density of 7×1012 cm at the interface of Ga2O3/{ 1 1 0 1 }GaN, with a mobility of 1000 cm2/V-s and high-field saturation velocity of 107 cm/s as the fitting parameters, the calculated I-V characteristics in Fig.14 can be found in a good agreement with the experimental curves. The origin of having 2DEG confined at the Ga2O3/{ 1 1 0 1 }GaN/interface can be understood due to the
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discontinuity of the spontaneous polarization (Psp) effect as happened to the more familiar case of AlGaN/GaN interface. Its virtue is to screen the polarization-induced fixed charge at the interface and exhibit a cosine dependence (θ=62°) to the bulk GaN Psp value of −0.029C/m2. Moreover, combination of good carrier confinement and immunity to the surface damage and roughness scattering issues have resulted in a fitted 2DEG mobility value of 1000cm2/V-s in the proposed Ga2O3/GaN NW-MOSFET structure to be comparable to that previously seen in the planar AlGaN/GaN HEMT devices. Further equivalent circuit model analysis suggests that the RF response of the proposed Ga2O3/GaN NW-MOSFET was limited by the stray capacitance and the resultant signal losses can be ascribed the misalignment of the drain/source contacts with respect to the Ga2O3/GaN NW-MOSFET in the photolithographic process. Summary In summary, we demonstrated a new design of a top-gate Ga2O3/GaN single nanowire MOSFET by combining a laterally directed growth mechanism of [11 20] GaN NWs with the photo-enhanced chemical oxidation process to convert the out-shell { 1 1 0 1 } GaN to a thin 8nm Ga2O3 passivation layer. We showed that by taking advantage of the effects of (i) 2DEG induced at the Ga2O3/GaN interface due to the discontinuity of polarization effect and (ii) the high-field action due to the fringing field effect exerted by the metal gate over the inclined { 1 1 0 1 } GaN facets, one can achieve high-speed modulation of the GaN NW channel at a cut-off frequency ft~ 95 GHz at a gate length of 0.1μm. The latter opens a route utilizing semiconductor NWs for high speed electronics applications. Acknowledgment This research been supported by the National Science Council NSC-98-2221-E-002-021-MY3 and Taiwan Semiconductor manufacturing company (TSMC). Reference [1] “Emerging Research Materials” Chapter, International Technology Roadmap for Semiconductors 2009, p.8. [2] W. Lu, et al., IEEE Trans. Electron. Dev. 55, 2859 (2008) [3] Z. Gao et al. J. Appl. Phys. 105, 113707 (2009). [4] B. S. Simpkins et al. J. Appl. Phys. 103, 104313 (2008). [5] S. Vandenbrouck et al. IEEE Electron Dev. Lett. 30, 32 (2009). [6] L.-H. Peng et al., Appl. Phys. Lett. 76, 511 (2000). [7] O. Ambacher et al. J. Appl. Phys. 85, 3222 (1999). [8] Y. Li et al., Nano Lett. 6, 1468 (2006). [9] L. Nougaret et al., Appl. Phys. Lett. 94, 243505 (2009). [10] Y. M. Lin et al., Science 327, 662 (2010). [11] Y.-R. Wu et al., IEEE Trans. Electron Devices 53, 588 (2006)
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Fig.1 Photo-electron chemical oxidation
Fig.4 Leakage current density in GaN MOS devices.
Fig.7 SEM of a 60nm GaN NW, TEM image showing a triangular cross-section, electron diffractions viewed from the [0001] zone-axis
Fig.10 ID-VD characteristics of Lg=0.1μm Ga2O3/GaN SNW-MOSFET
Fig.2 Measured C-V characteristics of the GaN MOS structure.
Fig.3 Hysteresis effect of the GaN MOS structure.
Fig.6 Schematic draw of GaN SNW-MOSFET Fig.5 The interface state density Dit calculated by the Terman method.
Fig.8 Cross-sectional view of proposed Fig.9 SEM photography for Lg=0.5μm Ga2O3/GaN SNW-MOSFET Ga2O3/GaN SNW-MOSFET
Fig.11 Transfer characteristics of Fig.12 Current and power gain plots of Lg=0.1μm Ga2O3/GaN SNW-MOSFET Lg=0.1μm Ga2O3/GaN SNW-MOSFET measured at VDS=4V and VGS=1V
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Fig.13 Measurement of fT and fmax as a Fig.14 Overlaid experimental and Fig.15 Simulation of carrier distribution function of gate-length for Ga2O3/GaN calculation I-V data of Lg=0.5μm at Ga2O3/GaN interface. SNW-MOSFET Ga2O3/GaN SNW-MOSFET
Table. I Device Performance of Newly-proposed transistors Channel CNT [9] Graphene[10] AlGaN/GaN[5] Material nano-ribon Multi-tubes Single-NW film Film Lg (nm) 500 300 240 Ids (μA) 70 5000 − (Vg= 1V) (Vg= −1V) gm (μS) 45 1600 − Ldia/W (nm) 80 20000 − Ids/Ldia(W) 0.87 0.25 0.8 (mA/μm) gm/Ldia(W) 0.56 0.08 0.15 (mS/μm) fT (GHz) 5 80 100 fmax (GHz) 12 − 10
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Ga2O3/GaN Single-NW [This work] 100 100 (Vg= 1V) 85 60 1.67 1.42 95 105
