A 52% Tuning Range QVCO With a Reduced ... - Semantic Scholar
A 52% Tuning Range QVCO With a Reduced Noise Coupling Scheme and a Minimum FOMT of 196dBc/Hz Mohammad Elbadry, Sachin Kalia, and Ramesh Harjani Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455, USA Abstract—A wide-tuning range QVCO with a novel complimentary-coupling scheme is presented. Two NMOS-only VCOs are coupled via complimentary PMOS injection transistors. This shifts the injection current away from the zerocrossings of the output voltage, thereby reducing the sensitivity of the VCO to injection noise, which results in significant phasenoise improvement. Phase-shift is achieved without frequencydependent phase-shifting networks, allowing robust coupling over a wide tuning range. As a proof-of-concept, a prototype is designed in TSMC 65nm process with 4-bits of discrete tuning spanning the frequency range 4.6-7.8 GHz (52% tuning range). The prototype operates from 0.5V supply, with a power consumption ranging from 7.4mW–11mW, while achieving a minimum figure-of-merit (FOM) of 181.6dBc/Hz, and a minimum figure-of-merit with tuning-range (FOM T ) of 196dBc/Hz.
I. I NTRODUCTION Quadrature LO generation is crucial to the operation of direct-conversion transceivers. Conventionally, quadrature generation utilizes either divide-by-two frequency dividers, or polyphase filters [1]. In particular, divide-by-two dividers require the system’s oscillator to work at double the desired frequency, resulting in an overall increase in power consumption. Polyphase filters, on the other hand, are lossy requiring more power consumption for buffering and amplification. Moreover, multistage polyphase filters are often employed to combat process variations, causing additional losses. The basic structure of the LC-based QVCO is shown in Fig. 1. Two LC VCOs are coupled through both direct coupling (blue wires), and cross coupling (red wires). If both LC VCOs are matched, then owing to symmetry, their differential outputs are in quadrature [2]. The QVCO can also be regarded as two inter injection-locked oscillators (ILOs) [3]. The LC QVCO of Fig. 1 provides a simple and robust way for quadrature generation. Increasing the coupling strength improves the quadrature accuracy, but also leads to a degradation of phase noise, with increased noise contribution from the coupling transistors [1]. This means that, for reasonable quadrature accuracy, the LC QVCO of Fig. 1 has relatively poor phase-noise performance. This can be attributed to the fact that the current injected during each period (injection current) has its peak value when the oscillator’s output voltage is at its zero-crossing. Since an oscillator is most vulnerable to phase-noise when its output is close to the zero-crossings [4], this leads to a large degradation in the phase-noise of the QVCO. Moreover, if each oscillator in the QVCO is regarded as an ILO, then there is a 90 ◦ phase-shift between the injection current and the output voltage in each ILO. This, in turn, implies that each ILO is operating at the edge of the lock range [5]. Hence, the operating frequency of each ILO (and, hence, that of the QVCO) does not coincide with the center frequency of the tank circuit [3]. Thus the effective tank Q at the QVCO’s running frequency is lower than its peak value, leading to phase-noise degradation [5]. Moreover, any change in the tail current of the injection pair alters the lock-range of each ILO, resulting in a change in the QVCO frequency.
978-1-4799-3286-3/14/$31.00 ©2014 IEEE
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Fig. 1: Basic LC QVCO
This “varactor-like” effect leads to flicker-noise upconversion, adding 1/f 3 phase-noise [6]. Several techniques have been proposed in literature to alleviate these drawbacks. In [7], anti-phase coupling of the common-source nodes of the two VCOs is done via an inverting transformer. Since the common-sources oscillate at twice the fundamental frequency, this makes the two VCO outputs in quadrature. This eliminates the coupling transistors altogether, improving phase-noise. For proper coupling, however, large swings are needed at the common-source node, limiting the tuning range. In [1], the coupling transistor is inserted in series with the negative-g m transistor. This limits the headroom, and requires a large coupling transistor that loads the oscillator, limiting the tuning range. In [8], coupling is done through the bulk terminal of the g m transistor, with the drawback of a reduced Q due to occasional forward-biasing of the bulksource and bulk-drain junctions. In [9], coupling is performed by transformers, eliminating the coupling transistors. This comes with the drawback of larger transformer area, as well as increased design complexity. LC QVCO performance can also be improved through the use of a phase-shift (Δϕ) in the injection path [6], [10]. Ideally, a Δϕ of 90◦ would make the injection current coincide with the peak of the output voltage, resulting in a minimal phasenoise penalty [4]. It would also cause the QVCO frequency to coincide with the tank frequency, maximizing the Q-factor and eliminating the “varactor-like” effect and its consequent 1/f 3 phase-noise. In practice, however, a 90 ◦ phase-shift is hard to achieve. Nevertheless, a reasonable phase shift (in the order of 40 ◦ –50◦ ) helps decrease the phase noise [6]. Previous phase-shift implementations either depend on frequency sensitive passive phase-shifting networks [6], [10], or employ frequency-insensitive shifting that loads the tank [11]. In this paper, a simple and robust method of implementing the coupling phase-shift is presented. Unlike the previously reported implementations, the proposed technique is frequencyinsensitive allowing quadrature operation over a wide tuningrange, without loading the tank. Section II provides an overview of the proposed technique. Section III presents measurement results. Section IV provides conclusions.
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Fig. 2: Schematic of the proposed QVCO
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Fig. 4: Simulated injection current and output voltage for PMOS coupling
II. C IRCUIT OVERVIEW The core of the proposed QVCO is a simple cross-coupled LC VCO, with the tail source removed to reduce the 1/f 3 noise [4], [12]. An inductor is placed at the common-source to resonate with the total parasitic capacitance at that node, at twice the oscillation frequency 2f 0 . This helps avoid Q factor degradation at high swing hence improving the overall phasenoise performance [12]. The full schematic of the proposed QVCO is shown in Fig. 2. The QVCO is formed by coupling two of the core VCOs. It resembles the direct-coupled QVCO of Fig. 1 with one difference; the coupling transistors are PMOS instead of NMOS transistors. While this might seem to shift the injection current by 180 ◦ making the proposed QVCO very similar to the basic QVCO, the simple intuition is flawed. This can be explained with the help of Fig. 3 which shows the large-signal time-domain waveforms of the coupling transistors over one oscillation cycle. Both V g and Vd of coupling transistors sit at Vdd in absence of oscillations. In the oscillation mode, the V g and Vd voltages are in quadrature as they represent the single-ended quadrature outputs of the oscillator. Injection only happens when V sg is greater than the threshold voltage. However, at the peak V sg voltage (where transistors should be the most conductive), the V sd voltage is zero, thus forcing the I sd current to zero. Hence, injection current is forced to be zero at the zero-crossings of the oscillator. Current is injected when V sg > |Vth | and Vsd is non-zero as shown in Fig. 3, resulting in current pulses far from the zero-crossing point. As an added advantage, PMOS devices have inherently lower flicker noise than their NMOS counterparts due to the buried nature of the channel. The drawback is that PMOS devices need to be larger than NMOS devices for equal sg
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Fig. 5: Simulated injection current and output voltage for NMOS coupling
injection strengths. This becomes a problem only when the active devices constitute a large percentage of the total tank capacitance. To verify the phase-shifting effect, simulations are made to compare the proposed QVCO (of Fig. 2), with a similar QVCO that has the PMOS coupling transistors (green transistors in Fig. 2) replaced with NMOS transistors. Since NMOS transistors have higher mobility than PMOS transistors, and to ensure a fair comparison, the NMOS transistors are sized such that their total injected charge (integration of the injected current over time) is equal to their PMOS counterparts. Both oscillators are tuned to operate at the same frequency of 8GHz. Fig. 4 shows the injection current waveform overlapped with the output voltage waveform for PMOS coupling. It can be clearly observed that the injection current is very small at the voltage zero-crossings, and goes to a maximum away from the crossing. In fact, the peak current is shifted from the voltage zero-crossing by around 55 ◦ , with no explicit phase-shifting -50 -60
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Fig. 3: Coupling transistor waveforms for proposed architecture
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Fig. 6: Simulated phase-noise for PMOS and NMOS coupling
Fig. 7: Chip micrograph
network employed. The same waveforms for the NMOS case are shown in Fig. 5, showing that the injection current peak almost coincides with the output voltage zero-crossing. The peaks are not perfectly aligned; there is a finite phase-shift of around 10 ◦ . Phase-noise simulation is done for both PMOS coupling and NMOS coupling using SpectreRF ® at the same frequency of 8GHz. As evident from Fig. 6, the PMOS coupled QVCO has a significantly better phase noise performance than its NMOS counterpart over three decades of frequency offset. The PMOS coupled version is better by 6dB in the 1/f 3 region, and better by up to 8dB in the 1/f 2 region.
Fig. 9: Measured phase-noise at tuning-word=“5”
III. M EASUREMENTS AND D ISCUSSION A prototype was fabricated in TSMC’s 65nm CMOS process. Discrete tuning of the frequency is employed, using 4-bit binary-weighted switched MIM capacitors. The design occupies an active area of 0.67mm 2. The buffered QVCO outputs are connected to GSSG pads for on-chip probing, using 50Ω buffers. The chip micrograph is shown in Fig. 7. The QVCO was tested at three supply voltages: 0.42V, 0.5V and 0.6V. Due to the absence of the tail source, power consumption scales with the supply. It was observed that increasing the supply voltage above 0.5V increases power consumption with little phase-noise improvement. Hence, a 0.5V supply is provided to the oscillator through an off-chip linear regulator, and is used throughout the measurement. The 0.5V supply is used for the oscillator core, while the switches of the capacitor array use a 1V supply for lower series resistance, and effectively a higher capacitor Q. The oscillator’s output is measured through a GSSG probe. The differential probe output is connected to an off-chip balun for differential to single-ended conversion and the singleended output is fed to a R&S FSW43 spectrum analyzer for frequency and phase-noise measurement. Outputs are also downconverted and fed to an Agilent 81204B oscilloscope.
The output frequency versus tuning word for the QVCO is shown in Fig. 8. The QVCO can be tuned from 4.59GHz to 7.82GHz achieving a frequency-tuning range (FTR) of 52%. Fig. 8 also shows the measured power consumption of the QVCO versus the tuning word. Power consumption decreases for higher output frequencies (lower tank capacitance), and vice versa. The power consumption ranges from 7.36mW at the highest frequency, to 10.98mW at the lowest. The measured phase-noise of the QVCO at the center frequency of 6.24 GHz, is shown in Fig. 9. The phase-noise at 1MHz and 3MHz offsets, across the tuning range, is shown in Fig. 10. At 3MHz offset, phasenoise ranges from -123.5dBc/Hz to -128.5dBc/Hz across the tuning-range, while the phase-noise at 1MHz offset ranges from -111.5dBc/Hz to -117.8dBc/Hz across the tuning-range. The FOM (for 3MHz offset) is shown in Fig. 11. The FOM touches 185.4dBc/Hz at its peak, and goes down to
Fig. 8: Measured frequency and power consumption
Fig. 11: Measured FOM for 3MHz offset
Fig. 10: Measured phase-noise for 1MHz and 3MHz offsets
TABLE I: Comparison with previous work Ref
Vdd (V)
fo (GHz)
FTR(%)
Pdc (mW)
PN(dBc/Hz)
F OM (dBc/Hz)
F OMT (dBc/Hz)
[1] [7] [8] [9] [10] [13] [14] This Work
2 2.5 1.8 1 2 1.7 1.2 0.5
1.8 4.9 1.1 17 1.57 20.9 4.8 6.25
18.3 12.2 28 16.5 24 3.1 67 52
25 22 5.4 5 30 6.3 6-20 7.4-11
-140 -134.5 -137 -119.5 -147.5 -126.5 -123.6 -126.6
181.6 185 181 187.6 187.1 195.6 176.5 181.6-185.4
186.8 186.7 190 192 194.7 185.4 193 196-199.7
TABLE II: QVCO performance summary Supply(V) FTR Power
0.5V 52% 8.8mW
PN(@3MHz) Average FOM Average FOMT
-126.9dBc/Hz 182.9dBc/Hz 197.3dBc/Hz
Fig. 12: Measured downconverted I/Q time-domain waveform
the large tuning range in [14] is achieved through the use of transformers; the tuning range in this work is achieved using conventional tanks with no transformers. Moreover, the FOM, as well as FOMT , of this design is higher than that in [14]. Designs in [7], [10], [13] achieve higher FOM, but also use higher supplies. The design in [9] achieves a higher FOM with a 1V supply but, with the added design complexity and area of using coupling transformers. This work shows that by replacing NMOS coupling transistors (in an NMOS-only QVCO) with PMOS transistors, stateof-the-art FOM performance can be achieved with a simple, robust design that uses conventional tank-circuits. Moreover, state-of-the-art tuning-range is achieved, with best-in-class FOMT performance. ACKNOWLEDGEMENT This research was supported in part by grants from DARPA and the Army Research Laboratory. R EFERENCES
181.6dBc/Hz at its minimum. The average FOM across the tuning range is 182.9dBc/Hz. With a 52% FTR, the average FOMT is 197.3dBc/Hz (the peak is 199.7dBc/Hz). To measure the I/Q phase-difference, quadrature injectionlocking is used to lock the oscillator to the third harmonic of an external reference via a pulse-slimmer similar to that in [15]. Injection is performed through additional NMOS switches in parallel with the tank (these are disabled during other measurements). The quadrature phases are generated through an on-chip polyphase filter. The probed RF outputs are downconverted with external mixers to 40MHz frequency, and the time-domain waveforms are displayed on the oscilloscope as shown in Fig. 12. The average phase difference is 91.4 ◦, including uncertainties from the measurement setup. The key performance aspects of the QVCO are summarized in Table. II. The power consumption and phase-noise numbers are those obtained at a tuning-word of “5” which corresponds to the mid-point of the tuning curve. Phase-noise values are those obtained at 3MHz offset. The FOM and FOM T values are the average across the tuning range. IV. C ONCLUSIONS The performance of the fabricated prototype is compared with previous work, in Table I. The phase-noise values reported are those at 3MHz offsets. If data at 3MHz offset was not available, it was extrapolated assuming a -20dB/decade profile. The QVCO core in this work operates at 0.5V supply, but the switches in the capacitor-array tuning use 1V. This work achieves the highest FOM T amongst similar work, while using the lowest supply voltage. It also has the second highest tuning-range, next to [14]. It is to be noted, however, that
[1] P. Andreani et al., “Analysis and design of a 1.8-GHz CMOS LC quadrature VCO,” IEEE Journal of Solid-State Circuits, Dec. 2002. [2] A. Rofougaran et al., “A single chip 900-MHz spread-spectrum wireless transceivers in 1-µm CMOS - part I: Architecture and transmitter design,” IEEE Journal of Solid-State Circuits, Apr. 1998. [3] N. R. Lanka et al., “Frequency-hopped quadrature frequency synthesizer in 0.13µm technology,” IEEE Journal of Solid-State Circuits, May 2011. [4] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE Journal of Solid-State Circuits, Feb. 1998. [5] S. Kalia et al., “A simple, unified phase noise model for injection-locked oscillators,” in IEEE Radio Frequency Integrated Circuits Symposium, Jun. 2011. [6] D. Huang et al., “A frequency synthesizer with optimally coupled QVCO and harmonic-rejection SSBmixer for multi-standard wireless receiver,” IEEE Journal of Solid-State Circuits, Jun. 2011. [7] S. L. J. Gierkink et al., “A low-pase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling,” IEEE Journal of Solid-State Circuits, Jul. 2003. [8] H. R. Kim et al., “A very low-power quadrature VCO with back-gate coupling,” IEEE Journal of Solid-State Circuits, Jun. 2004. [9] A. W. L. Ng and H. C. Luong, “A 1-V 17-GHz 5-mW CMOS quadrature VCO based on transformer coupling,” IEEE Journal of Solid-State Circuits, Sep. 2007. [10] P. Vancorenland and M. S. J. Steyaert, “A 1.57-GHz fully integrated very low-phase-noise quadrature VCO,” IEEE Journal of Solid-State Circuits, vol. 37, no. 5, pp. 653–656, May 2002. [11] X. Yi et al., “A 57.9-to-68.3 GHz 24.6 mW frequency synthesizer with in-phase injection-coupled QVCO in 65 nm CMOS technology,” IEEE Journal of Solid-State Circuits, Feb. 2014. [12] E. Hegazi et al., “A filtering technique to lower LC oscillator phase noise,” IEEE Journal of Solid-State Circuits, Dec. 2001. [13] H.-Y. Chang and Y.-T. Chiu, “K -band cmos differential and quadrature voltage-controlled oscillators for low phase-noise and low-power applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 1, Jan. 2012. [14] G. Cusmai et al., “A magnetically tuned quadrature oscillator,” IEEE Journal of Solid-State Circuits, Dec. 2007. [15] M. Elbadry et al., “Dual channel injection-locked quadrature LO generation for a 4GHz instantaneous bandwidth receiver at 21GHz center frequency,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, Mar. 2013.
I. I NTRODUCTION Quadrature LO generation is crucial to the operation of direct-conversion transceivers. Conventionally, quadrature generation utilizes either divide-by-two frequency dividers, or polyphase filters [1]. In particular, divide-by-two dividers require the system’s oscillator to work at double the desired frequency, resulting in an overall increase in power consumption. Polyphase filters, on the other hand, are lossy requiring more power consumption for buffering and amplification. Moreover, multistage polyphase filters are often employed to combat process variations, causing additional losses. The basic structure of the LC-based QVCO is shown in Fig. 1. Two LC VCOs are coupled through both direct coupling (blue wires), and cross coupling (red wires). If both LC VCOs are matched, then owing to symmetry, their differential outputs are in quadrature [2]. The QVCO can also be regarded as two inter injection-locked oscillators (ILOs) [3]. The LC QVCO of Fig. 1 provides a simple and robust way for quadrature generation. Increasing the coupling strength improves the quadrature accuracy, but also leads to a degradation of phase noise, with increased noise contribution from the coupling transistors [1]. This means that, for reasonable quadrature accuracy, the LC QVCO of Fig. 1 has relatively poor phase-noise performance. This can be attributed to the fact that the current injected during each period (injection current) has its peak value when the oscillator’s output voltage is at its zero-crossing. Since an oscillator is most vulnerable to phase-noise when its output is close to the zero-crossings [4], this leads to a large degradation in the phase-noise of the QVCO. Moreover, if each oscillator in the QVCO is regarded as an ILO, then there is a 90 ◦ phase-shift between the injection current and the output voltage in each ILO. This, in turn, implies that each ILO is operating at the edge of the lock range [5]. Hence, the operating frequency of each ILO (and, hence, that of the QVCO) does not coincide with the center frequency of the tank circuit [3]. Thus the effective tank Q at the QVCO’s running frequency is lower than its peak value, leading to phase-noise degradation [5]. Moreover, any change in the tail current of the injection pair alters the lock-range of each ILO, resulting in a change in the QVCO frequency.
978-1-4799-3286-3/14/$31.00 ©2014 IEEE
0 c1
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Fig. 1: Basic LC QVCO
This “varactor-like” effect leads to flicker-noise upconversion, adding 1/f 3 phase-noise [6]. Several techniques have been proposed in literature to alleviate these drawbacks. In [7], anti-phase coupling of the common-source nodes of the two VCOs is done via an inverting transformer. Since the common-sources oscillate at twice the fundamental frequency, this makes the two VCO outputs in quadrature. This eliminates the coupling transistors altogether, improving phase-noise. For proper coupling, however, large swings are needed at the common-source node, limiting the tuning range. In [1], the coupling transistor is inserted in series with the negative-g m transistor. This limits the headroom, and requires a large coupling transistor that loads the oscillator, limiting the tuning range. In [8], coupling is done through the bulk terminal of the g m transistor, with the drawback of a reduced Q due to occasional forward-biasing of the bulksource and bulk-drain junctions. In [9], coupling is performed by transformers, eliminating the coupling transistors. This comes with the drawback of larger transformer area, as well as increased design complexity. LC QVCO performance can also be improved through the use of a phase-shift (Δϕ) in the injection path [6], [10]. Ideally, a Δϕ of 90◦ would make the injection current coincide with the peak of the output voltage, resulting in a minimal phasenoise penalty [4]. It would also cause the QVCO frequency to coincide with the tank frequency, maximizing the Q-factor and eliminating the “varactor-like” effect and its consequent 1/f 3 phase-noise. In practice, however, a 90 ◦ phase-shift is hard to achieve. Nevertheless, a reasonable phase shift (in the order of 40 ◦ –50◦ ) helps decrease the phase noise [6]. Previous phase-shift implementations either depend on frequency sensitive passive phase-shifting networks [6], [10], or employ frequency-insensitive shifting that loads the tank [11]. In this paper, a simple and robust method of implementing the coupling phase-shift is presented. Unlike the previously reported implementations, the proposed technique is frequencyinsensitive allowing quadrature operation over a wide tuningrange, without loading the tank. Section II provides an overview of the proposed technique. Section III presents measurement results. Section IV provides conclusions.
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Fig. 2: Schematic of the proposed QVCO
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Fig. 4: Simulated injection current and output voltage for PMOS coupling
II. C IRCUIT OVERVIEW The core of the proposed QVCO is a simple cross-coupled LC VCO, with the tail source removed to reduce the 1/f 3 noise [4], [12]. An inductor is placed at the common-source to resonate with the total parasitic capacitance at that node, at twice the oscillation frequency 2f 0 . This helps avoid Q factor degradation at high swing hence improving the overall phasenoise performance [12]. The full schematic of the proposed QVCO is shown in Fig. 2. The QVCO is formed by coupling two of the core VCOs. It resembles the direct-coupled QVCO of Fig. 1 with one difference; the coupling transistors are PMOS instead of NMOS transistors. While this might seem to shift the injection current by 180 ◦ making the proposed QVCO very similar to the basic QVCO, the simple intuition is flawed. This can be explained with the help of Fig. 3 which shows the large-signal time-domain waveforms of the coupling transistors over one oscillation cycle. Both V g and Vd of coupling transistors sit at Vdd in absence of oscillations. In the oscillation mode, the V g and Vd voltages are in quadrature as they represent the single-ended quadrature outputs of the oscillator. Injection only happens when V sg is greater than the threshold voltage. However, at the peak V sg voltage (where transistors should be the most conductive), the V sd voltage is zero, thus forcing the I sd current to zero. Hence, injection current is forced to be zero at the zero-crossings of the oscillator. Current is injected when V sg > |Vth | and Vsd is non-zero as shown in Fig. 3, resulting in current pulses far from the zero-crossing point. As an added advantage, PMOS devices have inherently lower flicker noise than their NMOS counterparts due to the buried nature of the channel. The drawback is that PMOS devices need to be larger than NMOS devices for equal sg
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Fig. 5: Simulated injection current and output voltage for NMOS coupling
injection strengths. This becomes a problem only when the active devices constitute a large percentage of the total tank capacitance. To verify the phase-shifting effect, simulations are made to compare the proposed QVCO (of Fig. 2), with a similar QVCO that has the PMOS coupling transistors (green transistors in Fig. 2) replaced with NMOS transistors. Since NMOS transistors have higher mobility than PMOS transistors, and to ensure a fair comparison, the NMOS transistors are sized such that their total injected charge (integration of the injected current over time) is equal to their PMOS counterparts. Both oscillators are tuned to operate at the same frequency of 8GHz. Fig. 4 shows the injection current waveform overlapped with the output voltage waveform for PMOS coupling. It can be clearly observed that the injection current is very small at the voltage zero-crossings, and goes to a maximum away from the crossing. In fact, the peak current is shifted from the voltage zero-crossing by around 55 ◦ , with no explicit phase-shifting -50 -60
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Fig. 3: Coupling transistor waveforms for proposed architecture
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Fig. 6: Simulated phase-noise for PMOS and NMOS coupling
Fig. 7: Chip micrograph
network employed. The same waveforms for the NMOS case are shown in Fig. 5, showing that the injection current peak almost coincides with the output voltage zero-crossing. The peaks are not perfectly aligned; there is a finite phase-shift of around 10 ◦ . Phase-noise simulation is done for both PMOS coupling and NMOS coupling using SpectreRF ® at the same frequency of 8GHz. As evident from Fig. 6, the PMOS coupled QVCO has a significantly better phase noise performance than its NMOS counterpart over three decades of frequency offset. The PMOS coupled version is better by 6dB in the 1/f 3 region, and better by up to 8dB in the 1/f 2 region.
Fig. 9: Measured phase-noise at tuning-word=“5”
III. M EASUREMENTS AND D ISCUSSION A prototype was fabricated in TSMC’s 65nm CMOS process. Discrete tuning of the frequency is employed, using 4-bit binary-weighted switched MIM capacitors. The design occupies an active area of 0.67mm 2. The buffered QVCO outputs are connected to GSSG pads for on-chip probing, using 50Ω buffers. The chip micrograph is shown in Fig. 7. The QVCO was tested at three supply voltages: 0.42V, 0.5V and 0.6V. Due to the absence of the tail source, power consumption scales with the supply. It was observed that increasing the supply voltage above 0.5V increases power consumption with little phase-noise improvement. Hence, a 0.5V supply is provided to the oscillator through an off-chip linear regulator, and is used throughout the measurement. The 0.5V supply is used for the oscillator core, while the switches of the capacitor array use a 1V supply for lower series resistance, and effectively a higher capacitor Q. The oscillator’s output is measured through a GSSG probe. The differential probe output is connected to an off-chip balun for differential to single-ended conversion and the singleended output is fed to a R&S FSW43 spectrum analyzer for frequency and phase-noise measurement. Outputs are also downconverted and fed to an Agilent 81204B oscilloscope.
The output frequency versus tuning word for the QVCO is shown in Fig. 8. The QVCO can be tuned from 4.59GHz to 7.82GHz achieving a frequency-tuning range (FTR) of 52%. Fig. 8 also shows the measured power consumption of the QVCO versus the tuning word. Power consumption decreases for higher output frequencies (lower tank capacitance), and vice versa. The power consumption ranges from 7.36mW at the highest frequency, to 10.98mW at the lowest. The measured phase-noise of the QVCO at the center frequency of 6.24 GHz, is shown in Fig. 9. The phase-noise at 1MHz and 3MHz offsets, across the tuning range, is shown in Fig. 10. At 3MHz offset, phasenoise ranges from -123.5dBc/Hz to -128.5dBc/Hz across the tuning-range, while the phase-noise at 1MHz offset ranges from -111.5dBc/Hz to -117.8dBc/Hz across the tuning-range. The FOM (for 3MHz offset) is shown in Fig. 11. The FOM touches 185.4dBc/Hz at its peak, and goes down to
Fig. 8: Measured frequency and power consumption
Fig. 11: Measured FOM for 3MHz offset
Fig. 10: Measured phase-noise for 1MHz and 3MHz offsets
TABLE I: Comparison with previous work Ref
Vdd (V)
fo (GHz)
FTR(%)
Pdc (mW)
PN(dBc/Hz)
F OM (dBc/Hz)
F OMT (dBc/Hz)
[1] [7] [8] [9] [10] [13] [14] This Work
2 2.5 1.8 1 2 1.7 1.2 0.5
1.8 4.9 1.1 17 1.57 20.9 4.8 6.25
18.3 12.2 28 16.5 24 3.1 67 52
25 22 5.4 5 30 6.3 6-20 7.4-11
-140 -134.5 -137 -119.5 -147.5 -126.5 -123.6 -126.6
181.6 185 181 187.6 187.1 195.6 176.5 181.6-185.4
186.8 186.7 190 192 194.7 185.4 193 196-199.7
TABLE II: QVCO performance summary Supply(V) FTR Power
0.5V 52% 8.8mW
PN(@3MHz) Average FOM Average FOMT
-126.9dBc/Hz 182.9dBc/Hz 197.3dBc/Hz
Fig. 12: Measured downconverted I/Q time-domain waveform
the large tuning range in [14] is achieved through the use of transformers; the tuning range in this work is achieved using conventional tanks with no transformers. Moreover, the FOM, as well as FOMT , of this design is higher than that in [14]. Designs in [7], [10], [13] achieve higher FOM, but also use higher supplies. The design in [9] achieves a higher FOM with a 1V supply but, with the added design complexity and area of using coupling transformers. This work shows that by replacing NMOS coupling transistors (in an NMOS-only QVCO) with PMOS transistors, stateof-the-art FOM performance can be achieved with a simple, robust design that uses conventional tank-circuits. Moreover, state-of-the-art tuning-range is achieved, with best-in-class FOMT performance. ACKNOWLEDGEMENT This research was supported in part by grants from DARPA and the Army Research Laboratory. R EFERENCES
181.6dBc/Hz at its minimum. The average FOM across the tuning range is 182.9dBc/Hz. With a 52% FTR, the average FOMT is 197.3dBc/Hz (the peak is 199.7dBc/Hz). To measure the I/Q phase-difference, quadrature injectionlocking is used to lock the oscillator to the third harmonic of an external reference via a pulse-slimmer similar to that in [15]. Injection is performed through additional NMOS switches in parallel with the tank (these are disabled during other measurements). The quadrature phases are generated through an on-chip polyphase filter. The probed RF outputs are downconverted with external mixers to 40MHz frequency, and the time-domain waveforms are displayed on the oscilloscope as shown in Fig. 12. The average phase difference is 91.4 ◦, including uncertainties from the measurement setup. The key performance aspects of the QVCO are summarized in Table. II. The power consumption and phase-noise numbers are those obtained at a tuning-word of “5” which corresponds to the mid-point of the tuning curve. Phase-noise values are those obtained at 3MHz offset. The FOM and FOM T values are the average across the tuning range. IV. C ONCLUSIONS The performance of the fabricated prototype is compared with previous work, in Table I. The phase-noise values reported are those at 3MHz offsets. If data at 3MHz offset was not available, it was extrapolated assuming a -20dB/decade profile. The QVCO core in this work operates at 0.5V supply, but the switches in the capacitor-array tuning use 1V. This work achieves the highest FOM T amongst similar work, while using the lowest supply voltage. It also has the second highest tuning-range, next to [14]. It is to be noted, however, that
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