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A Batteryless Thermoelectric EnergyHarvesting Interface Circuit with 35mV Startup Voltage Yogesh K. Ramadass and Anantha P. Chandrakasan Massachusetts Institute of Technology
Self-Powered Applications Pipeline/Exhaust Sensors
Industrial Automation
Wearable Medical Devices
[Toumaz]
• Energy efficiency of IC’s is crucial • Micro-power sensor systems Batteryless solutions desirable 2
Energy Processing Circuits
•
Amount of electrical power obtained – better metric for energy harvesters
End-to-end efficiency is critical 3
Outline • • • • •
Thermoelectric Energy Harvesters Startup Technique Architecture and Energy Transfer Circuits Measurement Results Conclusion
4
Thermoelectric Energy Harvesters [Micropelt]
[Tellurex]
Seebeck Effect
• Convert heat energy to electrical energy • Consists of p- and n-type Bismuth Telluride • One p-n leg generates ~ 0.2mV/K
5
Equivalent Circuit of Thermal Harvester VT
=
SΔT
Lim, Nasa Tech Briefs, 2008
• Electrically in series, Thermally in parallel • For a 10cm2 harvester, S = 23mV/K, RT = 5Ω • Extremely low voltage output 6
Mechanically Assisted Startup
S1
• Small vibrations present in human motion • Vibration driven switch kick-starts energy transfer 7
Mechanically Assisted Startup
f
S1
S1 ON
VT iL = RT
S1 OFF
•
VDD
⎛ L / CDD =⎜ ⎜ RT ⎝
⎞ ⎟VT ⎟ ⎠
L=20μH, CDD=470pF and RT=5Ω
35mV input needed to get 1V at VDD
8
CLK
VDD
VDD
Startup Block
2
CHG_VDD
0 0.8
Mechanical Startup
0 2 0
VREF
VDD
9
Architecture STORAGE
VSTO CSTO
DC–DC BUCK
VL CL
Thermal Harvester
VTH
RT VT
CTH
START
CDD
S1
Motion Activated Switch
VDD
• Digitally assisted control • Storage block acts as energy buffer • Buck converter outputs a 1.8V regulated supply
10
CLK
PG
Storage Block – Boost Converter
• • •
Activated when VDD > 1.8V M3 is actively turned ON Storage voltage is unregulated 11
Zero Current Switching
PG
CHG_VSTO
PG
iL
Falling edge of CHG_VSTO VX_STO
VX_STO
+
+
COMP
VSTO _
_
PG
ADD PULSE SUB
GEN
Rising edge of PG (delayed)
•
Pulse-width of PG is adjusted closed-loop to achieve zero current switching 12
DC-DC Buck Converter VL
VSTO
COMP4 VREF
COMP3 VREF VSTO_2P4+
VSTO
PULSE WIDTH CONTROL
• •
M5 VX_DCDC NIN
M6
LDCDC V L CL
DC-DC is activated only after VSTO > 2.4V Pulse Frequency Modulation mode of control
13
DC-DC – ZCS
PIN
NIN
iL
VX_DCDC
•
Pulse-width of NIN is adjusted closed-loop to achieve zero current switching
14
Disabling Start Block VDD VDD_VL
CHG_VSTO CHG_VDD
CLK
VREF COMP
• VDD shorted with VL once VL > 1.8V • Start block is disabled
15
PG
Maximum Power Transfer
Pmax
VTH = RT
2
2
PSTO
VTH ≈ 8LSTO fs
• Free running boost converter switching at fs 16
PG
Maximum Power Transfer
2
2
VTH VTH = RT 8LSTO fs
RT fs ≈ 8LSTO
• Maximum power transfer obtained by just choosing fs appropriately
17
Test-Chip [Tellurex]
Active Area
CDD (470pF)
Active Area
• •
0.35μm digital CMOS process Active area = 1.7mm2
18
Measured Startup Waveform VSTO VDD
Mechanical Startup
VL
2K Temperature Difference
•
18ms
VT = 50mV; RT = 5Ω 19
Measured Output Power Output Power (μW)
500 400
Max. Power Available 300
58% Maximum End-to-End Efficiency
200
Power Obtained
100 0 20
40
60
80
100
VT (mV)
• •
Voltage source with 5Ω resistance Startup – 35mV; Operational down to 25mV
20
Power Obtained at Storage Capacitor Output Power (μW)
320 310 300 290
RT = 5Ω
280 270 260
• •
VT = 100mV
2.5
3
3.5
4
VSTO (V)
4.5
5
Obtained power stays constant from 2.4V – 5V Verifies operation of ZCS block
21
Comparison with state-of-the-art Parameter
Lhermet ISSCC 2007
Doms ISSCC 2009
Carlson VLSI 2009
EnOcean
This work
Process
0.35μm
0.35μm
0.13μm
n/a
0.35μm
Min. input voltage
1V
0.6V
20mV
20mV
25mV (35mV to startup)
External voltage?
None
2V battery
Minimum of 650mV
None
None
Output Voltage
1.75V-4.3V
2V
1V regulated
4V-4.5V
1.8V regulated
Peak efficiency
50% (just boost converter)
70% (just boost converter)
52% (end-to-end)
20% (end-to-end)
58% (end-to-end)
Maximum Power Tracking?
No
Yes
No
No
Yes
22
Conclusions • Batteryless thermoelectric energy harvesting interface circuit with 35mV startup voltage
• Provides end-to-end efficiency of 58% with maximum power point tracking
• Optimized interface circuits are a key enabler of self powered systems
Acknowledgements : MIT Energy Initiative 23
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