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A TECHNIQUE FOR ACCURATE FREQUENCY RESPONSE MEASUREMENT OF INTEGRATED CONTINUOUS-TIME FILTERS Shanthi Pavan & Tonse Laxminidhi Department of Electrical Engineering Indian Institute of Technology, Madras Email : [email protected] ABSTRACT We present a technique to accurately characterize the frequency response of high frequency on-chip continuous-time filters. When compared to conventional methods of measurement, the proposed technique shows two orders of magnitude improvement in accuracy. Experimental results are shown for a 75 MHz fifth order Chebyshev Gm-C ladder filter designed in a 0.35 µm CMOS process and packaged in a 40 pin dual-in-line package. 1. INTRODUCTION

instruments. The test buffers, IC package and board parasitics have a frequency response that must be “de-embedded” in order to obtain the true filter response. The signal path T1-TB1-T3 is referred to as the “direct path” and the path T1-filter-TB2-T2 is called the “filter path”. The following assumptions are conventionally made regarding the test-setup a. TB1 & TB2 are matched. b. The measurement paths at the outputs of TB1 & TB2 are identical. c. The input impedance of TB1 & TB2 is negligible.

High frequency active filters are integral parts of several systemson-chip (SOC) like ethernet transceivers and disk drive read channels, accomplishing tasks like anti-aliasing and partial channel equalization. These filters are not stand alone devices, but intended to be embedded parts of a complete on-chip analog front end. Hence, they are not designed to drive the package and board parasitics. Characterization of these blocks presents a challenge due to the following. Due to space and pin count considerations, it is not possible to have dedicated calibration structures on the chip (as is the common practice in the microwave literature). The test procedure has to be as “non-invasive” of the main signal path as possible.

+ TB1 - +

Direct Path T3 Vdd

d. The reverse transmissions of the filter, TB1 & TB2 are negligible in the frequency range of interest. Assumption (a) is reasonable. (b) is a bit harder to achieve, since the designer has little control over the package. (c) can be enforced by design, and is necessary anyway as the test-buffers should not load the signal path. As for (d), the usually used active filter and test buffer topologies can easily achieve reverse isolations of 90-100 dB even at high frequencies. The signal flow graph (SFG) of the test setup, used to calculate H f  is shown in Fig. 2. Hin is the transfer function of the input path, i.e, from vi to the filter input. H f is the transfer function of the filter and Hb is the transfer function from the test buffer input to the balun (T2, T3) output.

vo,dir

Hb

50 Ω

Vo,dir

Test Buffer vi

T1

T2 FILTER

+ TB2 - + Test Buffer

CHIP

Vdd

vo,fil 50 Ω

Filter Path

Vi

Hin Hf

Hb

Vo,fil

Fig. 1. Conventional on-chip filter measurement test setup.

Fig. 2. Signal flow graph of the conventional test setup.

The usual technique [1] employed for on-chip filter characterization is shown in Fig. 1. It has become routine to have fully differential on-chip signal paths. T1 converts the singleended stimulus (from the test equipment) into a fully differential signal that excites the filter. Since the filter is not designed to drive external loads, two nominally identical on-chip test buffers TB1 and TB2 are used. These test-buffers, which are biased with sufficiently large currents so that external loads can be driven, are only activated during characterization. T2 and T3 convert the testbuffer outputs into single-ended signals that are measured by the test

If the SFG of Fig. 2 is valid, it is seen that the frequency V f response of the filter is given by H f f   Vo f il  f  . In practice, o dir the filter path and buffer path are treated as two independent 2port networks and a Vector Network Analyzer (VNA) is used to measure the S-parameters of the filter path and direct path. It can be V f S f shown that H f f   Vo f il  f   S21 f il  f  . The setup described above o dir 21 dir has the advantage of simplicity. Apparently, filters with very high bandwidth can be measured even with a very low-cost package, since all package and board parasitics are calibrated out. This

This paper, where we propose a novel method that significantly improves measurement accuracy, is organized as follows. Section 2 examines the limitations of the conventional measurement technique. The proposed technique and implementation are discussed in Section 3. Experimental results on a 75 MHz 5th order singly-terminated Chebyshev Gm-C ladder filter implemented in a 0.35 µm CMOS process are shown in Section 4. The filter, packaged in a 40 pin DIP, is characterized by the conventional and proposed techniques. We show that the proposed technique significantly extends the frequency range where accurate measurements become possible. Conclusions are given in Section 5.

−40 −50

board with package

−60 −70 |S21|(dB)

technique has been the de facto method used to characterize filters by several workers over the years. From the measured magnitude responses reported, it is seen that the test technique enables a very accurate characterization of the passband response (where H f f  is large). However, in the experience of the authors, as well as experimental results reported in the literature (for example [1] [2] [3] [4]), the accuracy of the measurement in the stop-band of the filter is poor. Typically, the measured H f f  does not reduce beyond -50 dB even at high frequencies, and is quite sensitive to the package and test board. This is attributed to the “quality of the testsetup”, implicitly assuming that the filter itself has no problems. It is therefore seen that there is a need for a characterization technique that is accurate in the filter stopband, and robust with respect to package properties.

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Fig. 3. Isolation of the filter path with and without the packaged IC.

k1 Hb k2 Hin

k2 Hf k1

2. LIMITATIONS OF THE CONVENTIONAL MEASUREMENT TECHNIQUE

The signal flow graph considering package and board feedthrough is shown in Fig. 4. k1 , k2 and k3 model the package feedthrough terms, where we assume that the output ports of TB1 and TB2 are symmetric with respect to the input port. This is not necessary, but makes the expressions less tedious. Solving the signal flow graph, and neglecting higher powers of k1 , k2 and k3

300

Frequency (MHz)

Vi

An implicit assumption behind the calculations used to derive H f f  in the measurement technique of Fig. 1 is that there is no coupling between the input and outputs of the direct and filter paths. While this is accurate at low frequencies, the isolation between the three ports (input, direct-path output and filter-path output) decreases with frequency. This makes sense, since inductive coupling (through the bond-wires and PCB traces) and capacitive coupling (through the pin-to-pin & PCB inter-trace capacitance) increases with frequency. Fig. 3 shows the measured isolation of the filter path of the test PCB used in this work. The lower curve is the isolation of the board, without the packaged IC. The upper curve is the measured isolation of the PCB with the IC package, but without the die. It can be expected that the situation gets worse when the chip is mounted, since there will be additional coupling through the bondwires. From the above discussion, it is seen that the package is the dominant contributor of port-to-port coupling. Note specifically that the isolation from input to output is only about 55 dB at 500 MHz. This means that, with this particular test setup, a filter with a stop-band attenuation better than 55 dB at 500 MHz cannot be measured accurately, since direct feedthrough from the input dominates the filter path output. It is clear, therefore, that any characterization technique must account for (or eliminate) spurious coupling through the package.

200

Vo,dir k3 Hb

k3 Vo,fil

Fig. 4. Signal flow graph with finite package isolation.

(since they are small), we obtain Vo f il f  Vi f 



Hin H f Hb  k1 Hin  k2 Hin Hb2 H 2f  Hin Hb2 H f  k3 Hin Hb

Vo dir f  Vi f 



(1)

Hin Hb  k1 Hin  k2 Hin Hb2  Hin Hb2 H f  k3 Hb H f Hin

(2)

Clearly the ratio of (1) and (2) is no longer H f . Note particularly, that in the filter stopband (when H f is very small), the filter path output is dominated by direct feedthrough ( k1 Hi  k3 Hi Hb Vi ), resulting in a stopband response which is in considerable error. ki ’s typically increase with frequency, while H f decreases with frequency - hence the conventional technique can lead to gross measurement errors in the filter stopband. In the passband, however, the feedthrough terms can be neglected and the ratio of (1) and (2) is approximately H f . 3. PROPOSED MEASUREMENT TECHNIQUE AND IC IMPLEMENTATION In this section, we present an improved measurement technique where the feedthrough in the package is effectively cancelled. The basic idea behind the technique is the following. If the filter gain

CHIP

Fig. 6 shows the simplified schematic of the test-buffer and the associated switches S f p and S f n . When the control bit B is high, transistors Ms2 and Ms4 are ON, while Ms1 and Ms3 are off. The opposite situation occurs when B is high. The source follower stage at the input results in a very high input impedance, which is almost fully capacitive. This (small) capacitance can be taken into account during the filter design process. Notice that the input impedance of the buffer remains the same regardless of which of switch pairs are ON. The testbuffer output is a current that is terminated with a resistance on the test-board. Rd is a damping resistor that prevents common-mode oscillation of the cascode with the package inductance.

Sdp Sdn

+ TB1 - +

Sdp Sfp Sfn

FILTER

+ TB2 - +

Sfp

op

Bond pads

Fig. 5. On-chip portion of proposed technique. Vdd

is multiplied by 1, we see from (1) that the term due to the filter (Hin H f Hb ) changes sign, while all the terms due to package feedthrough (except k2 Hin Hb2 H f , which can be neglected in the stopband) remain the same. Thus, the difference of the filter path transfer functions measured with the filter as is, and with the filter gain multiplied by 1 is largely free from feedthrough terms. Since the filter and testbuffers are fully differential, multiplication of the filter gain by 1 can be accomplished by a simple switch network that effectively crosses the filter output wires. The on-chip portion of the proposed technique is shown in Fig. 5. The off-chip portion remains identical to that shown in Fig. 1. Each test-buffer has two pairs of switches at the input. Considering the filter-path, two pairs of switches (labelled S f p and S f n ) are added between the filter and TB2. When the switches S f p are turned on, they enable the direct connection of the filter to TB2. Turning on the two inner switches S f n instead is equivalent to multiplying the gain of the filter by -1. Note that S f p and S f n are not closed simultaneously. A similar arrangement is provided in the buffer path. Each pair of switches is controlled by an external digital signal. It is necessary (and straightforward) to ensure that the input impedance of the test buffers remains the same irrespective of which pair of switches is turned on. The proposed technique calls for 4 measurements - two for the filter-path and two for the buffer-path. The filter-path transfer functions measured when Sd p and Sdn are ON are denoted by H f il p and H f il n respectively. H f il p is approximately given by the right hand side of (1). Replacing H f with H f in (1) gives H f il n . From this, we see that H f il

p  H f il n



2Hi H f Hb 1  k2 Hb 

(3)

The direct feedthrough terms get eliminated as their phase does not change when the filter gain changes sign. A similar set of measurements is made on the direct-path, where the resulting transfer functions are Hdir p and Hdir n . Using (2), and proceeding in a manner analogous to the derivation of (3), we see that Hdir p  Hdir n  2Hi Hb 1  k2 Hb H f 

(4)

Using (3) and (4), the filter response can be obtained as Hf





H f il p  H f il n Hdir p  Hdir n S21 f il p  S21 f iln S21 dirp  S21 dirn

om

Vdd

(5)

The approximation above is justified since the feedthrough terms are very small compared to unity.

B Ms1

ip

Rd M5

M6

M3

M4

M1

in

Vdd

B Ms3

Switches

ip

Ms4

Ms2 B

in

M2

I

Test Buffer

B

Switches

Fig. 6. Simplified schematic of the test buffer and polarity switches.

4. EXPERIMENTAL RESULTS A fifth order Chebyshev Gm-C ladder filter with 1 dB passband ripple, and a band edge of 75 MHz implemented in a 0.35 µm CMOS process was chosen as a test vehicle to validate the proposed technique. The architecture of the filter was based on [2]. The aim here is to obtain an accurate stop-band measurement that is robust with respect to the package properties. Fig. 7 and Fig. 8 show the die photograph and the package cavity respectively. The chip was packaged in a 40 pin DIP and mounted on a two-layer test board for measurement. A VNA was used to measure the S-parameters of the direct and filter paths. Note that the filter has stopband attenuation of 90 dB at 400 MHz, which is 30 dB smaller than the isolation of the package ! The measured passband detail is shown in Fig. 9, for the conventional and proposed techniques. It is seen that the measured passband response of the filter is virtually identical in both techniques. This is to be expected, since package isolation is high at low frequencies (within the filter passband). Fig. 10 compares the effectiveness of conventional and proposed measurement techniques for two different packages. (One was a 40 pin DIP, while the other was the same 40 pin DIP with a copper strip stuck on to the top of the package, thereby reducing high frequency isolation). From Fig. 10, it is seen that the conventional measurement is in error beyond about 150 MHz. Moreover, the measured stopband response is sensitive to package characteristics. In contrast, the

Buffer B

Buffer A

Current Dist & Fixed Gm Bias

FILTER Filter Path

Direct Path

Magnitude Response (dB)

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Fig. 7. Chip die photograph.

Fig. 9. Measured passband detail.

Fig. 8. Photograph of the die mounted in the package cavity.

Magnitude Response (dB)

0

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−40

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−100

proposed technique is seen to be almost insensitive to the package, while being accurate to 400 MHz, where the attenuation of the filter is 85 dB. The deviation from the ideal response beyond this frequency is due to higher order terms neglected in the derivation of the technique, as well as mismatches in the filter and buffer paths. Note that even better accuracy can be obtained by using a better package, as well as increasing the gains of the test-buffers. Thus, the proposed technique can be extended to higher frequency filters, packaged in correspondingly higher performance packages. 5. CONCLUSIONS The conventional technique used for characterizing the frequency response of on-chip continuous time filters has poor accuracy in the filter stop-band due to signal feedthrough in the package. An improved method that effectively removes the feedthrough component was presented. Measurement results on a 75 MHz fifth order Chebyshev active ladder filter packaged in a 40-pin DIP demonstrate the effectiveness of the proposed technique. 6. REFERENCES [1] B. Nauta, “A CMOS transconductance-C filter technique for very high frequencies,” IEEE J. Solid-State Circuits, vol. 27,

Proposed −120 0

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Ideal 500

Frequency (MHz) Fig. 10. Comparison of conventional and proposed measurement techniques.

no. 2, pp. 142–153, 1992. [2] S. Pavan, Y. Tsividis, and K. Nagaraj, “Widely programmable high-frequency continuous-time filters in digital CMOS technology,” IEEE J. Solid-State Circuits, vol. 35, no. 4, pp. 503–511, 2000. [3] J. Harrison and N. Weste, “A 500 MHz CMOS antialias filter using feed-forward op-amps with local commonmode feedback,” in IEEE International Solid-State Circuits Conference, Digest of Technical Papers ISSCC, 2003, pp. 132– 483. [4] P. Pandey, J. Silva-Martinez, and X. Liu, “A 500 MHz OTA-C 4th order lowpass filter with class AB CMFB in 0.35 µm CMOS technology,” in Proceedings of the IEEE Custom Integrated Circuits Conference,, 2004, pp. 57–60.