Clocked and Asynchronous Instruction Pipelines - Semantic Scholar
Washington University in St. Louis
Washington University Open Scholarship All Computer Science and Engineering Research
Computer Science and Engineering
Report Number: WUCS-93-32 1993-01-01
Clocked and Asynchronous Instruction Pipelines Authors: Mark A. Franklin and Tienyo Pan Clocked (synchronous) and self-timed (asynchronous) represent the two prinicipal methodologies associated with timing control and synchronization of digital systems. In this paper, clocked and the asynchronous instruction pipelines are modeled and compared. The approach which yields the best performance is dependent on technology parameters, operating range and pipeline algorithm characteristics. Design curves are presented which permit selection of the best approach for a given application and technology environment.
Follow this and additional works at: http://openscholarship.wustl.edu/cse_research Part of the Computer Engineering Commons, and the Computer Sciences Commons Recommended Citation Franklin, Mark A. and Pan, Tienyo, "Clocked and Asynchronous Instruction Pipelines" Report Number: WUCS-93-32 (1993). All Computer Science and Engineering Research. http://openscholarship.wustl.edu/cse_research/321
Department of Computer Science & Engineering - Washington University in St. Louis Campus Box 1045 - St. Louis, MO - 63130 - ph: (314) 935-6160.
Washington University Open Scholarship All Computer Science and Engineering Research
Computer Science and Engineering
Report Number: WUCS-93-32 1993-01-01
Clocked and Asynchronous Instruction Pipelines Authors: Mark A. Franklin and Tienyo Pan Clocked (synchronous) and self-timed (asynchronous) represent the two prinicipal methodologies associated with timing control and synchronization of digital systems. In this paper, clocked and the asynchronous instruction pipelines are modeled and compared. The approach which yields the best performance is dependent on technology parameters, operating range and pipeline algorithm characteristics. Design curves are presented which permit selection of the best approach for a given application and technology environment.
Follow this and additional works at: http://openscholarship.wustl.edu/cse_research Part of the Computer Engineering Commons, and the Computer Sciences Commons Recommended Citation Franklin, Mark A. and Pan, Tienyo, "Clocked and Asynchronous Instruction Pipelines" Report Number: WUCS-93-32 (1993). All Computer Science and Engineering Research. http://openscholarship.wustl.edu/cse_research/321
Department of Computer Science & Engineering - Washington University in St. Louis Campus Box 1045 - St. Louis, MO - 63130 - ph: (314) 935-6160.
