Combined Input and Output All-Optical Variable ... - Semantic Scholar
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IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 17, NO. 6, JUNE 2005
Combined Input and Output All-Optical Variable Buffered Switch Architecture for Future Optical Routers Haijun Yang, Student Member, IEEE, and S. J. Ben Yoo, Senior Member, IEEE
Abstract—We present a novel optical packet switching fabric architecture incorporating both input single-stage and output multistage all-optical variable delay buffers as combined input and output queues. For a given optical buffer size (1000 B), the proposed architecture, which has combined input and output optical variable buffer queues with optimum partition, achieves packet loss rates (3.4E-5) that are three orders of magnitude lower than the case without the variable buffers and two orders of magnitude lower than the cases with input or output optical queues alone. Index Terms—All-optical packet switching (OPS), all-optical variable buffer, optical router, slow light, switching fabric architecture.
I. INTRODUCTION
T
HE EXPLOSIVE growth of the Internet traffic and the emerging diverse services are driving the demands for the next-generation switching systems that accommodate huge data-centric traffic at the packet level granularity. In particular, all-optical packet switching (OPS) [1] is an attractive approach to build compact and power-efficient all-optical switching systems with greater flexibility and switching capacity toward seamless integration of data and optical networking. The optical switch fabric architectures, especially the buffering strategies, directly influence the performance and scalability of OPS routers. Recent reports on variable buffers included innovative “slow light” [2] all-optical buffer technologies using electromagnetically induced transparency [3] or microresonators [4] as well as various optical switching fabric architectures exploiting such all-optical variable delay technologies [5]–[7]. Inclusion of variable all-optical buffers enhances performance of OPS routers in terms of packet loss rate, buffering delay, and jitter [5], [6]. In this letter, we propose a novel OPS architecture with combined input single-stage and output multistage all-optical variable delay buffers. The simulation results demonstrate that the newly proposed OPS architecture achieves much lower packet loss rates at relatively high traffic load levels under the optimized input–output buffer capacity partition. II. ALL-OPTICAL VARIABLE DELAY BUFFERS In [5], we proposed both the single-stage [Fig. 1(a)] and the multistage [Fig. 1(b)] all-optical variable delay buffer-to-buffer Manuscript received December 31, 2004; revised February 4, 2005. The authors are with the Department of Electrical and Computer Engineering, University of California, Davis, CA 95616 USA (e-mail: yoo@ece. ucdavis.edu). Digital Object Identifier 10.1109/LPT.2005.846482
Fig. 1. (a) Single-stage all-optical variable delay buffer component, (b) multistage all-optical variable delay buffer array, (c) IQ-OPS architecture, and (d) OQ-OPS architecture.
optical packets in a particular wavelength or in a set of wavelengths , respectively, based on the novel “slow light” technologies. The single-stage all-optical variable delay buffer components can be placed on the input-side of OPS architectures serving as input first-in first-out (FIFO) queues to selectively buffer the incoming optical packets, which cannot be switched to the desired output ports due to contention [5]. Fig. 1(c) shows the input-queued OPS (IQ-OPS) architecture applied to a switching fabric architecture that includes tunable wavelength converters (T_WCs), an arrayed waveguide grating router (AWGR), and fixed wavelength converters (F_WCs) [8]. However, packet switch architectures with input FIFO queuing suffer from the head-of-line (HOL) blocking problem, which leads to both high buffering latency and limited maximum throughput [9]. Alternatively, the multistage all-optical variable delay buffer arrays can be placed on the output-side of the OPS switch fabric serving as output queues to provide flexible variable delay for outgoing optical packets in order to resolve contention at the output ports [5]. Fig. 1(d) shows the output-queued OPS (OQ-OPS) architecture. OQ-OPS forward the optical packet to its desired output port as soon as it arrives with selective variable buffers at the output port in case of contention, which not only overcomes the HOL blocking associated with IQ-OPS, but also provides much lower buffering latency and jitter compared with IQ-OPS. However, for a fixed total buffer capacity , an OQ-OPS architecture with a -stage output buffer has a reduced buffer capacity for each stage compared with of IQ-OPS, which reduces the effective buffering capability of OQ-OPS.
1041-1135/$20.00 © 2005 IEEE
YANG AND YOO: COMBINED INPUT AND OUTPUT ALL-OPTICAL VARIABLE BUFFERED SWITCH ARCHITECTURE
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TABLE I SIMULATION CONFIGURATIONS
Fig. 2. Combined IQ and OQ OPS architecture with both input single-stage and output multistage all-optical variable delay buffer (CIOQ-OPS).
III. COMBINED IQ- AND OQ-OPS ARCHITECTURES This letter proposes the combined IQ- and OQ-OPS (CIOQ-OPS) architecture to enhance buffering capability and to increase switching throughput while maintaining low buffering latency and jitter. Fig. 2 shows the CIOQ-OPS architecture incorporating both input single-stage and output multistage all-optical variable buffers on the input-side and the output-side, respectively. The architecture has input and output ports, each carwavelength channels. Each wavelength channel on the rying input port is served by one single-stage all-optical buffer component, and each wavelength channel on the output port is served by one multistage all-optical buffer array. The proposed CIOQ-OPS architecture consists of five stages: input-channel-demultiplexer (demux)-stage, input-buffering-stage, switching-stage, output-buffering-stage, and output-channel-multiplexer (mux)stage. In the input-channel-demux-stage, the fixed optical buffers compensate for the time the OPS router takes to make switching decisions, and the demultiplexer separates the wavelength channels. In the input-buffering-stage, the single-stage all-optical variable buffer components buffer incoming optical packets in order to resolve packet contention at the output ports. In the switching-stage, the switch fabric architecture consists of AWGR, and a set of F_WC a set of T_WC, one [8]. This achieves nonblocking switching by tuning the output wavelength of the T_WC to an appropriate wavelength based on the wavelength-dependent routing characteristics of the AWGR so that the desired connection between the input wavelength on the input port and the output wavelength on the output port is established. The F_WC is necessary for converting this wavelength to the wavelength desired at the output of the switch fabric. In the output-buffering-stage, the multistage all-optical variable buffer arrays buffer optical packets arriving from different inputs at the same time in different stages in order to resolve packet contention for the same output port/wavelength channel. In the output-channel-mux-stage, multiple wavelength channels are grouped in one fiber. Fig. 2 illustrates the buffer component arrangements for each input–output port. Label in input-buffer-matrix indicates that the labeled buffer component is designed to buffer packets from the input channel . Label in output-buffer-matrix indicates that the labeled buffer stage is designed to buffer packets from the channel of input port .
Fig. 3.
Packet loss rate.
When multiple optical packets from different input wavelength channels are contending for the same output switch port, all packets carried in different wavelengths can be switched to the same output port simultaneously and buffered in different stages of the multistage all-optical buffer arrays. If the output buffer is fully used, the packets will be queued in the input buffer. IV. SIMULATION STUDIES Simulation studies proceeded at a high traffic load of 0.7 under asynchronous variable length self-similar traffic input to investigate the performance of the newly proposed CIOQ-OPS architecture including the combined input single-stage and output multistage wavelength-selective all-optical variable buffers. The total buffer size, i.e., the sum size of all the input–output buffer stages, is set at the same value in each simulation case for fair comparison of OPS architectures. Table I lists switch fabric simulation configurations, where IQ-OPS denotes the input FIFO-queued OPS architecture [Fig. 1(c)]; OQ-OPS denotes the output-queued OPS architecture [Fig. 1(d)]; and CIOQ-OPS denotes the combined IQand OQ-OPS architecture with single-stage and multistage all-optical variable buffers [Fig. 2(a) and (b)]. A. Optimized IQ/OQ Buffer Capacity Partition Fig. 3 demonstrates that an optimum input versus output buffer size ratio exists for lowest packet loss rates under fixed total buffer capacity values. For total buffer capacity of 1000 B, the CIOQ-OPS achieves the lowest packet loss rate of 3.4E-5 when the ratio of buffer capacity assigned to IQ is approximately 0.5, i.e., the total buffer capacity is equally split between assigned to IQ and OQ. The minimum packet loss rate drops significantly from 6.1E-4 to 3.4E-5 as the total buffer capacity increases from 600 to 1000 B equally distributed between IQ and OQ.
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IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 17, NO. 6, JUNE 2005
indicate that the combined input single-stage all-optical buffer component and output multistage wavelength-selective buffer arrays may effectively reduce the packet loss rate and increase the switch throughput. 2) Packet Buffering Delay and Jitter Analysis: Fig. 4(b) and (c) demonstrates that CIOQ-OPS achieves shorter buffering latency and smaller jitter compared to IQ-OPS under the given buffer capacity values. This indicates that CIOQ-OPS effectively improves the performance of IQ-OPS in terms of the buffering latency and jitter by reducing the HOL blocking effect and shaping the incoming bursty traffic. V. CONCLUSION This letter has presented a new OPS architecture incorporating the combined input single-stage and output multistage all-optical variable buffers. The simulation results indicate the newly proposed OPS architecture achieves much lower packet loss rate under the optimized input–output buffer size allocation at a high traffic load. The performance improvement is typically by one or two orders of magnitude compared to the previous OPS architectures with all-optical variable delay buffers with a reasonable optical buffer size ( 1000 B). REFERENCES
Fig. 4.
(a) Packet loss rate, (b) buffering latency, and (c) buffering jitter.
B. Performance Evaluation 1) Packet Loss Rate Analysis: Fig. 4(a) shows that, for a buffer partition ratio of 0.5 and total buffer capacity of 1000 B, CIOQ-OPS achieves the lowest packet loss rate (3.4E-5) when compared with both the IQ-OPS (4.4E-3) and OQ-OPS (1.20E-2). This value is orders of magnitude lower than the 0-B case with no variable optical buffer, indicating the effectiveness of all optical variable buffers. The CIOQ-OPS packet loss rate drops more rapidly as the total buffer capacity increases to 1000 B. The packet loss rate simulation results of Fig. 4(a)
[1] S. Yao, B. Mukherjee, S. J. B. Yoo, and S. Dixit, “All-optical packetswitching for metropolitan area networks: Opportunities and challenges,” IEEE Commun. Mag., vol. 39, no. 3, pp. 142–148, Mar. 2001. [2] A. V. Turukhin, V. S. Sudarshanam, M. S. Shahriar, J. A. Musser, B. S. Ham, and P. R. Hemmer, “Observation of ultraslow and stored light pulses in a solid,” Phys. Rev. Lett., vol. 88, no. 2, p. 023602, 2002. [3] P. C. Ku, C. J. Chang-Hasnain, and S. L. Chuang, “Variable semiconductor all-optical buffers,” Electron. Lett., vol. 38, no. 24, pp. 1581–1583, Nov. 2002. [4] P. C. Ku, C. J. Chang-Hasnain, J. Kim, and S. L. Chuang, “Semiconductor all-optical buffers using quantum dots in resonator structures,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2003) , Atlanta, GA, 2003. [5] H. Yang and S. J. B. Yoo, “A new optical switching fabric architecture incorporating rapidly switchable all-optical variable delay buffer,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2004), Los Angeles, CA, 2004, Paper ThV2. [6] , “New optical switching fabric architecture incorporating load balanced parallel rapidly switching all-optical variable delay buffer arrays,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2005), Anaheim, CA, 2005, Paper OME75. [7] L. Wosinska, J. Haralson, L. Thylén, J. Öberg, and B. Hessmo, “Benefit of implementing novel optical buffers in an asynchronous photonic packet switch,” in Proc. Eur. Conf. Optical Communication (ECOC 2004), Stockholm, Sweden, 2004, Paper Th2.6.5. [8] S. J. B. Yoo, H. J. Lee, Z. Pan, J. Cao, Y. Zhang, K. Okamoto, and S. Kamei, “Rapidly switching all-optical packet routing system with optical-label swapping incorporating tunable wavelength sonversion and a uniform-loss cyclic frequency AWGR,” IEEE Photon. Technol. Lett., vol. 14, no. 8, pp. 1211–3, Aug. 2002. [9] M. Hlunchyj and M. Karol, “Queueing in high-performance packet switch,” IEEE J. Sel. Areas Commun., vol. 6, no. 12, pp. 1587–1597, Dec. 1988.
IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 17, NO. 6, JUNE 2005
Combined Input and Output All-Optical Variable Buffered Switch Architecture for Future Optical Routers Haijun Yang, Student Member, IEEE, and S. J. Ben Yoo, Senior Member, IEEE
Abstract—We present a novel optical packet switching fabric architecture incorporating both input single-stage and output multistage all-optical variable delay buffers as combined input and output queues. For a given optical buffer size (1000 B), the proposed architecture, which has combined input and output optical variable buffer queues with optimum partition, achieves packet loss rates (3.4E-5) that are three orders of magnitude lower than the case without the variable buffers and two orders of magnitude lower than the cases with input or output optical queues alone. Index Terms—All-optical packet switching (OPS), all-optical variable buffer, optical router, slow light, switching fabric architecture.
I. INTRODUCTION
T
HE EXPLOSIVE growth of the Internet traffic and the emerging diverse services are driving the demands for the next-generation switching systems that accommodate huge data-centric traffic at the packet level granularity. In particular, all-optical packet switching (OPS) [1] is an attractive approach to build compact and power-efficient all-optical switching systems with greater flexibility and switching capacity toward seamless integration of data and optical networking. The optical switch fabric architectures, especially the buffering strategies, directly influence the performance and scalability of OPS routers. Recent reports on variable buffers included innovative “slow light” [2] all-optical buffer technologies using electromagnetically induced transparency [3] or microresonators [4] as well as various optical switching fabric architectures exploiting such all-optical variable delay technologies [5]–[7]. Inclusion of variable all-optical buffers enhances performance of OPS routers in terms of packet loss rate, buffering delay, and jitter [5], [6]. In this letter, we propose a novel OPS architecture with combined input single-stage and output multistage all-optical variable delay buffers. The simulation results demonstrate that the newly proposed OPS architecture achieves much lower packet loss rates at relatively high traffic load levels under the optimized input–output buffer capacity partition. II. ALL-OPTICAL VARIABLE DELAY BUFFERS In [5], we proposed both the single-stage [Fig. 1(a)] and the multistage [Fig. 1(b)] all-optical variable delay buffer-to-buffer Manuscript received December 31, 2004; revised February 4, 2005. The authors are with the Department of Electrical and Computer Engineering, University of California, Davis, CA 95616 USA (e-mail: yoo@ece. ucdavis.edu). Digital Object Identifier 10.1109/LPT.2005.846482
Fig. 1. (a) Single-stage all-optical variable delay buffer component, (b) multistage all-optical variable delay buffer array, (c) IQ-OPS architecture, and (d) OQ-OPS architecture.
optical packets in a particular wavelength or in a set of wavelengths , respectively, based on the novel “slow light” technologies. The single-stage all-optical variable delay buffer components can be placed on the input-side of OPS architectures serving as input first-in first-out (FIFO) queues to selectively buffer the incoming optical packets, which cannot be switched to the desired output ports due to contention [5]. Fig. 1(c) shows the input-queued OPS (IQ-OPS) architecture applied to a switching fabric architecture that includes tunable wavelength converters (T_WCs), an arrayed waveguide grating router (AWGR), and fixed wavelength converters (F_WCs) [8]. However, packet switch architectures with input FIFO queuing suffer from the head-of-line (HOL) blocking problem, which leads to both high buffering latency and limited maximum throughput [9]. Alternatively, the multistage all-optical variable delay buffer arrays can be placed on the output-side of the OPS switch fabric serving as output queues to provide flexible variable delay for outgoing optical packets in order to resolve contention at the output ports [5]. Fig. 1(d) shows the output-queued OPS (OQ-OPS) architecture. OQ-OPS forward the optical packet to its desired output port as soon as it arrives with selective variable buffers at the output port in case of contention, which not only overcomes the HOL blocking associated with IQ-OPS, but also provides much lower buffering latency and jitter compared with IQ-OPS. However, for a fixed total buffer capacity , an OQ-OPS architecture with a -stage output buffer has a reduced buffer capacity for each stage compared with of IQ-OPS, which reduces the effective buffering capability of OQ-OPS.
1041-1135/$20.00 © 2005 IEEE
YANG AND YOO: COMBINED INPUT AND OUTPUT ALL-OPTICAL VARIABLE BUFFERED SWITCH ARCHITECTURE
1293
TABLE I SIMULATION CONFIGURATIONS
Fig. 2. Combined IQ and OQ OPS architecture with both input single-stage and output multistage all-optical variable delay buffer (CIOQ-OPS).
III. COMBINED IQ- AND OQ-OPS ARCHITECTURES This letter proposes the combined IQ- and OQ-OPS (CIOQ-OPS) architecture to enhance buffering capability and to increase switching throughput while maintaining low buffering latency and jitter. Fig. 2 shows the CIOQ-OPS architecture incorporating both input single-stage and output multistage all-optical variable buffers on the input-side and the output-side, respectively. The architecture has input and output ports, each carwavelength channels. Each wavelength channel on the rying input port is served by one single-stage all-optical buffer component, and each wavelength channel on the output port is served by one multistage all-optical buffer array. The proposed CIOQ-OPS architecture consists of five stages: input-channel-demultiplexer (demux)-stage, input-buffering-stage, switching-stage, output-buffering-stage, and output-channel-multiplexer (mux)stage. In the input-channel-demux-stage, the fixed optical buffers compensate for the time the OPS router takes to make switching decisions, and the demultiplexer separates the wavelength channels. In the input-buffering-stage, the single-stage all-optical variable buffer components buffer incoming optical packets in order to resolve packet contention at the output ports. In the switching-stage, the switch fabric architecture consists of AWGR, and a set of F_WC a set of T_WC, one [8]. This achieves nonblocking switching by tuning the output wavelength of the T_WC to an appropriate wavelength based on the wavelength-dependent routing characteristics of the AWGR so that the desired connection between the input wavelength on the input port and the output wavelength on the output port is established. The F_WC is necessary for converting this wavelength to the wavelength desired at the output of the switch fabric. In the output-buffering-stage, the multistage all-optical variable buffer arrays buffer optical packets arriving from different inputs at the same time in different stages in order to resolve packet contention for the same output port/wavelength channel. In the output-channel-mux-stage, multiple wavelength channels are grouped in one fiber. Fig. 2 illustrates the buffer component arrangements for each input–output port. Label in input-buffer-matrix indicates that the labeled buffer component is designed to buffer packets from the input channel . Label in output-buffer-matrix indicates that the labeled buffer stage is designed to buffer packets from the channel of input port .
Fig. 3.
Packet loss rate.
When multiple optical packets from different input wavelength channels are contending for the same output switch port, all packets carried in different wavelengths can be switched to the same output port simultaneously and buffered in different stages of the multistage all-optical buffer arrays. If the output buffer is fully used, the packets will be queued in the input buffer. IV. SIMULATION STUDIES Simulation studies proceeded at a high traffic load of 0.7 under asynchronous variable length self-similar traffic input to investigate the performance of the newly proposed CIOQ-OPS architecture including the combined input single-stage and output multistage wavelength-selective all-optical variable buffers. The total buffer size, i.e., the sum size of all the input–output buffer stages, is set at the same value in each simulation case for fair comparison of OPS architectures. Table I lists switch fabric simulation configurations, where IQ-OPS denotes the input FIFO-queued OPS architecture [Fig. 1(c)]; OQ-OPS denotes the output-queued OPS architecture [Fig. 1(d)]; and CIOQ-OPS denotes the combined IQand OQ-OPS architecture with single-stage and multistage all-optical variable buffers [Fig. 2(a) and (b)]. A. Optimized IQ/OQ Buffer Capacity Partition Fig. 3 demonstrates that an optimum input versus output buffer size ratio exists for lowest packet loss rates under fixed total buffer capacity values. For total buffer capacity of 1000 B, the CIOQ-OPS achieves the lowest packet loss rate of 3.4E-5 when the ratio of buffer capacity assigned to IQ is approximately 0.5, i.e., the total buffer capacity is equally split between assigned to IQ and OQ. The minimum packet loss rate drops significantly from 6.1E-4 to 3.4E-5 as the total buffer capacity increases from 600 to 1000 B equally distributed between IQ and OQ.
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IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 17, NO. 6, JUNE 2005
indicate that the combined input single-stage all-optical buffer component and output multistage wavelength-selective buffer arrays may effectively reduce the packet loss rate and increase the switch throughput. 2) Packet Buffering Delay and Jitter Analysis: Fig. 4(b) and (c) demonstrates that CIOQ-OPS achieves shorter buffering latency and smaller jitter compared to IQ-OPS under the given buffer capacity values. This indicates that CIOQ-OPS effectively improves the performance of IQ-OPS in terms of the buffering latency and jitter by reducing the HOL blocking effect and shaping the incoming bursty traffic. V. CONCLUSION This letter has presented a new OPS architecture incorporating the combined input single-stage and output multistage all-optical variable buffers. The simulation results indicate the newly proposed OPS architecture achieves much lower packet loss rate under the optimized input–output buffer size allocation at a high traffic load. The performance improvement is typically by one or two orders of magnitude compared to the previous OPS architectures with all-optical variable delay buffers with a reasonable optical buffer size ( 1000 B). REFERENCES
Fig. 4.
(a) Packet loss rate, (b) buffering latency, and (c) buffering jitter.
B. Performance Evaluation 1) Packet Loss Rate Analysis: Fig. 4(a) shows that, for a buffer partition ratio of 0.5 and total buffer capacity of 1000 B, CIOQ-OPS achieves the lowest packet loss rate (3.4E-5) when compared with both the IQ-OPS (4.4E-3) and OQ-OPS (1.20E-2). This value is orders of magnitude lower than the 0-B case with no variable optical buffer, indicating the effectiveness of all optical variable buffers. The CIOQ-OPS packet loss rate drops more rapidly as the total buffer capacity increases to 1000 B. The packet loss rate simulation results of Fig. 4(a)
[1] S. Yao, B. Mukherjee, S. J. B. Yoo, and S. Dixit, “All-optical packetswitching for metropolitan area networks: Opportunities and challenges,” IEEE Commun. Mag., vol. 39, no. 3, pp. 142–148, Mar. 2001. [2] A. V. Turukhin, V. S. Sudarshanam, M. S. Shahriar, J. A. Musser, B. S. Ham, and P. R. Hemmer, “Observation of ultraslow and stored light pulses in a solid,” Phys. Rev. Lett., vol. 88, no. 2, p. 023602, 2002. [3] P. C. Ku, C. J. Chang-Hasnain, and S. L. Chuang, “Variable semiconductor all-optical buffers,” Electron. Lett., vol. 38, no. 24, pp. 1581–1583, Nov. 2002. [4] P. C. Ku, C. J. Chang-Hasnain, J. Kim, and S. L. Chuang, “Semiconductor all-optical buffers using quantum dots in resonator structures,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2003) , Atlanta, GA, 2003. [5] H. Yang and S. J. B. Yoo, “A new optical switching fabric architecture incorporating rapidly switchable all-optical variable delay buffer,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2004), Los Angeles, CA, 2004, Paper ThV2. [6] , “New optical switching fabric architecture incorporating load balanced parallel rapidly switching all-optical variable delay buffer arrays,” in Proc. IEEE/OSA Optical Fiber Communication Conf. (OFC 2005), Anaheim, CA, 2005, Paper OME75. [7] L. Wosinska, J. Haralson, L. Thylén, J. Öberg, and B. Hessmo, “Benefit of implementing novel optical buffers in an asynchronous photonic packet switch,” in Proc. Eur. Conf. Optical Communication (ECOC 2004), Stockholm, Sweden, 2004, Paper Th2.6.5. [8] S. J. B. Yoo, H. J. Lee, Z. Pan, J. Cao, Y. Zhang, K. Okamoto, and S. Kamei, “Rapidly switching all-optical packet routing system with optical-label swapping incorporating tunable wavelength sonversion and a uniform-loss cyclic frequency AWGR,” IEEE Photon. Technol. Lett., vol. 14, no. 8, pp. 1211–3, Aug. 2002. [9] M. Hlunchyj and M. Karol, “Queueing in high-performance packet switch,” IEEE J. Sel. Areas Commun., vol. 6, no. 12, pp. 1587–1597, Dec. 1988.
