D Converters in Mixed-Signal Circuit
Testing of Embedded A/D Converters in Mixed-Signal Circuit Naim Ben-Hamida, Bechir Ayari and Bozena Kaminska Ecole Polytechnique de Montreal, P.0. Box 6079, Station A Montrdal,
Abstract
the digital subcircuit is available, or by inverting its transfer function in the frequency or time domains. The inverse function in the frequency domain is need when the FFT test is applied, whereas the time domain inverse function can be used in histogram testing and in Walsh transform diagnosis, as well as in FPT testing.
In this paper, a complete functional testing of embedded ADC is presented. The integral non-linearity error, INLE, differential non-linearity error, DNLE, offset error, OSE, gain error and the signal-to-noise ratio, SNR are tested. The problem related to the propagation of the analog signal to the input of the ADC and the observation of the digital output of the converter at the output of the digital circuit are discussed. The two means for functional testing are discussed: the histogram and he FFT. To observe the outputs of the ADC at the digital circuit, the inverse function of the digital circuit is computed. This can be done by inverting the transfer function of the digital circuit whenever it is available. In the other case, when the digital circuit structure is available, the inverse of the digital circuit is found by boolean function manipulation.
2.1 Boolean function manipulation
In order to present a complete test for an ADC embedded in a mixedsignal circuit, some performances have to be measured at the output of the mixed-signal circuit. These performances are: the integral non-linearity error INLE, differential nonlinearity error, DNLE, offset error, OSE, gain error, GE, the signal-to-noise ratio, SNR and the effective number of bits, KNOB [l]. They are measured by different means: the histogram; which is appropriate for DNLE [I] measurement, the FFf technique, which is used for SNR measurement [3], the static performance measurements which are performed at DC level. INLE, DNLE, GE and OSE can be considered as static as well as dynamic performances, whereas the SNR is a dynamic performance.
2.1.1 Vectors generation for ADC bit observations In our approach, we try to observe one bit of the ADC at a given PO (primary output). Then, the BDD corresponding to this PO is computed with the following assumptions: The digital inputs connected to the ADC are pro?.^^^^ rt uiII~Is.‘ ,l1:CC^-,.^rl.. 45,.- +I.,. -.I...* ‘:”IIpLJ, .-..I ^ auu ^..A .I.^ ^^^:---A t,. LGx.G” I‘y ll”lll UIG v,u=jl LllC ..^I..^.. “‘lI”C.7 m>Ig,IIF;u ,” +I.^“L‘P-ZJL; inputs can be either D or X. Then, when the desired ADC bit is reached while generating the BDDs, node D is returned. Terminal node X is returned when any other output of the ADC is reached. When a PI. (primary input) of the mixed circuit is reached, its corresponding BDD is returned. It is interesting to note that the BDD is computed for each gate traversed.
The main contribution in this paper is the complete functional test of an embedded ADC without circuit modification. In fact, up to now a mixed circuit has been partitioned into digital and analog subcircuits in the test mode. It was therefore considered that the ADC inputs and outputs are accessible. Since it is not always possible to modify the circuit, due to performance degradation and pin-count limitations, we have to test a mixed circuit as an entity and which is without modifications. Thus, this work is an extension of the work presented in [2], where we introduced a technique for structural testing of analog and digital blocks of a mixed circuit without circuit modification. Here, our objective is to propose an approach for complete testing of an embedded ADC without any modification.
When the root node of the BDD generated at a primary output is different from node D, it is impossible to observe the desired ADC bit at the PO considered. Recall here that we do not have any idea about the values taken by the other ADC bits, and D is first in BDD ordering. The whole set of assignments which allows observation of the desired bit is obtained by XORing the functions corresponding to the BDDs connected to the high and low edges of the root node D. In this case, any assignment to the mixed-signal circuit inputs which creates a path leading to terminal node one in the computed BDD allows observation of the ADC output/bit. Note here, that by making D first in the BDD ordering, the whole set is obtained easily.
testing of embedded ADC
2.2 Testing embedded ADC by transfer function manipulation
The most famous methods for dynamic testing of ADC’s [S] are the code density histogram method and the spectral analysis with FFI. Histogram data are used to compute all bit-transition levels, and hence determine linearity, gain, and offset errors [S]. FFf data are used to characterize the linearity and noise properties of the ADC in the frequency domain. The two methods are useful in measuring the ADC DNLE and INLE using a sine wave with unknown amplitude and offset. The FFT method alone is used to compute the signal-to-noise ratio (SNR) and the effective number of bits. Some attempts have been made to use either the histogram method or the FFI method alone to fully characterize the ADC.
Usually, the digital circuit at the output of the ADC is a digital filter. This digital filter can be specified by its transfer function in Z domain or in the frequency domain, or by its circuit structure at the gate level, as discussed earlier. Since we do not have direct access to the outputs of the ADC, we have to draw conclusions about the ADC outputs by observing the digital filter outputs. This can be done by transfer function manipulation. Transfer function manipulation complexity depends on the testing technique. For the FFI and histogram experiments, the considered mixed circuit is composed of a band-pass filter connected to a seven bit ADC and at the output a fourth order Butterworth band-pass filter, Figure 1.
All the classical techniques for ADC testing and diagnosis can be appiied to an embedded ADC testing. But first we have to consider the propagation of the analog signal through the analog subcircuit and observation of the digital code at the output of the digital circuit. The propagation of the analog signal to the input of the ADC is performed easily. In fact, since the subcircuit under test is the ADC, all the remaining subcircuits are considered to be fault free. For digital code propagation from the ADC outputs to the outputs of the digital subcircuit, we need to find the inverse function of the digital subcircuit. This inverse function can be found either by boolean function manipulation, when only tbe structure of
1063-6404/96
$5.00
0 1996 IEEE
Proceedings of the 1996 International Conference on Computer Design (ICCD '96) 1063-6404/96 $10.00 © 1996 IEEE
for embedded ADC testing
In this section, boolean function manipulations for ADC outputs observation is presented. Using OBDD manipulation, test vectors for digital code propagation are transferred from the output of the ADC to the output of digital subcircuit. These codes are used for OSE, GE, DNLE, INLE, SNR, GTE and ENOB computation using the histogram and FFI methods. The Walsh transform is also applied for DNLE diagnosis and structural testingBoolean function manipulation is used to observe the result of the A/D conversion at the output of the digital circuit when a sine wave is applied at the primary input of the mixed circuit.
Il. Introduction
2. Functional
PQ, Canada, H3C3A7
Figure I A seven bit ADad
v in a mtxed cucmt
In the case of inverse function determination using boolean function manipulation, we considered one of the ISCAS85 or ISCAS89 benchmark circuits as a digital circuit.
135
2.2.1 Histogram
testing
Histogram testing constitutes a process for estimating the probability density function PDF. In our case, we only have access to the digital filter outputs. Thus we should build the histogram of the sinewave at the output of the digital filter and then draw conclusions about the histogram of the digital sinewave at the output of the ADC. This means that the PDF of the sinewave at the output of the ADC will be estimated by measuring the PDF at the output of the digital filter. In general, if the digital filter impulse response is h, then y is the convolution between x and h, y=h*x, where y and x are the outputs and inputs of the filter in the time domain. Then, the output of the digital filter, y for a given frequency, can be expressed as y (kr)
tion vectors needed for the record construction is 1526 for the ~88.0 benchmark circuit and 2048 for the cl908 one. Figure 5 shows the FFT of the collected samples at the outputs of the ADC in case of fault-free and faulty ADC, the amount of the fault is O.lLSB at the third bit. The SNDR (equation (9)) for the fault-free circuit is SNDR=41.6dB and in the case of the faulty ADC SNDRz358976dB. The ENOB in the fault-free case is 6.878 bits while the effective number of bits in the faulty case is 6.122 bits. Since the analog circuit is a band-pass filter it is not possible to measure the static performance. In fact, all the DC components are cut by this filter. _...-_,_r^ml_r-ar ,“. .d /
= Bsin (wkT + 4) , where B=G.A. G is the gain at that fre-
quency and t$ is the phase imposed by the filter. Since we have to take our sample in an integer number of periods of the input signal, the phase of y does not have any effects on the estimated PDF. Then, the PDF of x can be deduced from the PDF of y as follows: PDF(y)
1 = ‘+ / 2 n*r (GA) - (Gx) 2
=
+pdf(x)
= Gxpdf(y)
(1)
‘.: I/
-&.“..
.,;
le.“-
..A..-.
..“:
Figure 5 FFT of 512 ADC output codes for fault (a) and fault-free converter(b) Figure 6 shows the FFT of the output codes with 3 LSB second-harmonic distortion when the data are taken at the output of the ADC (Figure 6.a) and .WIIC,, ..L-- Ll^.. ^_^ *“,*^..I +I-,. _..+....t “I,c+L, A;&+.,, ‘C;,tar Lucy tic LMG,, a, LUGtJ”qJUL L,lL “,&LLal 1IIcII.
“.”
1
’ .wA.w
, .,“F
“b I
,
,,A”
.
I ..d
Figure 6 FFT of the output of ADC (a) and the output of the digital filter (b) for a faulty ADC
Figure 2 Fault-free and faulty histograms of a 7 bits ADC Thus, histogram testing can be performed at the output of the digital filter, and the INLE, the DNLE and the other performances can be tested. Figure 3 and Figure 4 shows the DNLE and INLE in case of fault-free ADC (a) and faulty ADC (b). A 10% LSB fault is injected at the third bit. The INLE and DLNE are computed from the histogram.
According to Figure 6 the harmonic error is more observable at the output of the ADC then the output of the digital filter. In fact the fourth order Buttenvorth band-pass filter attenuates the second harmonic by 20dB. Then n\,r.n ar ._ _1~. -..*-... 0~ ^C.L^ h nrr lb ;^ 3,.70u3 ?7 no>D ..,L.:,+I.ChTnD a~ ,,+,Ln _..+_,.+ the anun me oupu~ LOGr.\y~ ~111~~ LIIG.x~iui\ LIIGVUL~L of the digital filter is 36.852. The ENOB for Figure 13.a is 6.12 bits while the ENOB for Figure 13.b is 6.298 bits
3. Conclusion A technique for test vector generation for ADC outputs observation at the digital circuit is introduced. This technique is based on boolean function manipulations based on OBDD (ordered binary decision diagram) representation. Also, the transfer function manipulation for FFT, histogram and Walsh transform testing of an embedded ADC are introduced. Thus, we have shown that an embedded ADC can be easily tested by the conventional test techniques whenever the digital circuit structure or its transfer function is available.
References 0:
/
_
.I
‘m
v
.”
/m
.m
I ..,
J
,I:,I
Figure 4 lNL% for fault-free ADC (a) id
Faulty?&
(b)
It is clear that, when all the ADC bits are observable at the digital circuit outputs, the DNLE and the INLE of the ADC are exactly the same, when the data are collected at the ADC outputs and at the digital circuit outputs. In our case, the effect of the 10% LSB error in the third bit have caused SO%LSB DNLE and INLE. 2.2.2 ml- testing The FFT of the outputs, x, of the ADC can be easily deduced from the FFT of the outputs, y, of the digital filter if its transfer function is available. Then, the FFT of x is given by equation (2) where H(i) is the transfer function of the digital filter.
FIT(y)
= FFT(h(x))
*FFT(x)
= yg
(2)
Since we have the FFI of x, the SNDR, the ENOB and the GTE of the ADC can be easily computed. The FFT testing needs less samples than the histogram. In our case, we take a record of 512 samples. This means that the number of observa-
[l] M. MAHONEY “DSP-Based Testing of Analog and mixed-signal circuits” IEEE Computer Society Press, 1990. PI B. Ayari, N. Ben-Hamida and B. Kaminska, “Automatic Test Vector Generation for Mixed-Signal Circuits”, The European Conference on Design Automation, PARIS, Marsh 1995, pp. 458463. t31 M. V. Bossche, Schoukens, and J. Rennboog “Dynamic testing and Diagnosis of A/D converters” IEEE Transactions on Circuits and Systems, August 1986, pp. 775-785. 141 A. Charoenrook and M. Soma “A Fault Diagnosis Technique for Flash ADC’s”, International Test Conference 1993, pp. [51 M. F. W A G D Y “Diagnosing ADC Nonlinearity at the Bit Level” IEEE iransactions on instrumentation and Measurements, December 1989, pp. 1139-1141. 61 J. BLAIR “Histogram Measurement of ADC Nonlinearities using Sine Waves” IEEE Transactions on Instrumentation and Measurements, June 1994, pp.373-383. [71 M. F. W A G D Y AND S. S. A W A D “Determining ADC Effective Number of Bits Via Histogram Testing” IEEE Transactions on Instrumentation and Measurements, August 1991, pp. 770-772.
136
Proceedings of the 1996 International Conference on Computer Design (ICCD '96) 1063-6404/96 $10.00 © 1996 IEEE
Abstract
the digital subcircuit is available, or by inverting its transfer function in the frequency or time domains. The inverse function in the frequency domain is need when the FFT test is applied, whereas the time domain inverse function can be used in histogram testing and in Walsh transform diagnosis, as well as in FPT testing.
In this paper, a complete functional testing of embedded ADC is presented. The integral non-linearity error, INLE, differential non-linearity error, DNLE, offset error, OSE, gain error and the signal-to-noise ratio, SNR are tested. The problem related to the propagation of the analog signal to the input of the ADC and the observation of the digital output of the converter at the output of the digital circuit are discussed. The two means for functional testing are discussed: the histogram and he FFT. To observe the outputs of the ADC at the digital circuit, the inverse function of the digital circuit is computed. This can be done by inverting the transfer function of the digital circuit whenever it is available. In the other case, when the digital circuit structure is available, the inverse of the digital circuit is found by boolean function manipulation.
2.1 Boolean function manipulation
In order to present a complete test for an ADC embedded in a mixedsignal circuit, some performances have to be measured at the output of the mixed-signal circuit. These performances are: the integral non-linearity error INLE, differential nonlinearity error, DNLE, offset error, OSE, gain error, GE, the signal-to-noise ratio, SNR and the effective number of bits, KNOB [l]. They are measured by different means: the histogram; which is appropriate for DNLE [I] measurement, the FFf technique, which is used for SNR measurement [3], the static performance measurements which are performed at DC level. INLE, DNLE, GE and OSE can be considered as static as well as dynamic performances, whereas the SNR is a dynamic performance.
2.1.1 Vectors generation for ADC bit observations In our approach, we try to observe one bit of the ADC at a given PO (primary output). Then, the BDD corresponding to this PO is computed with the following assumptions: The digital inputs connected to the ADC are pro?.^^^^ rt uiII~Is.‘ ,l1:CC^-,.^rl.. 45,.- +I.,. -.I...* ‘:”IIpLJ, .-..I ^ auu ^..A .I.^ ^^^:---A t,. LGx.G” I‘y ll”lll UIG v,u=jl LllC ..^I..^.. “‘lI”C.7 m>Ig,IIF;u ,” +I.^“L‘P-ZJL; inputs can be either D or X. Then, when the desired ADC bit is reached while generating the BDDs, node D is returned. Terminal node X is returned when any other output of the ADC is reached. When a PI. (primary input) of the mixed circuit is reached, its corresponding BDD is returned. It is interesting to note that the BDD is computed for each gate traversed.
The main contribution in this paper is the complete functional test of an embedded ADC without circuit modification. In fact, up to now a mixed circuit has been partitioned into digital and analog subcircuits in the test mode. It was therefore considered that the ADC inputs and outputs are accessible. Since it is not always possible to modify the circuit, due to performance degradation and pin-count limitations, we have to test a mixed circuit as an entity and which is without modifications. Thus, this work is an extension of the work presented in [2], where we introduced a technique for structural testing of analog and digital blocks of a mixed circuit without circuit modification. Here, our objective is to propose an approach for complete testing of an embedded ADC without any modification.
When the root node of the BDD generated at a primary output is different from node D, it is impossible to observe the desired ADC bit at the PO considered. Recall here that we do not have any idea about the values taken by the other ADC bits, and D is first in BDD ordering. The whole set of assignments which allows observation of the desired bit is obtained by XORing the functions corresponding to the BDDs connected to the high and low edges of the root node D. In this case, any assignment to the mixed-signal circuit inputs which creates a path leading to terminal node one in the computed BDD allows observation of the ADC output/bit. Note here, that by making D first in the BDD ordering, the whole set is obtained easily.
testing of embedded ADC
2.2 Testing embedded ADC by transfer function manipulation
The most famous methods for dynamic testing of ADC’s [S] are the code density histogram method and the spectral analysis with FFI. Histogram data are used to compute all bit-transition levels, and hence determine linearity, gain, and offset errors [S]. FFf data are used to characterize the linearity and noise properties of the ADC in the frequency domain. The two methods are useful in measuring the ADC DNLE and INLE using a sine wave with unknown amplitude and offset. The FFT method alone is used to compute the signal-to-noise ratio (SNR) and the effective number of bits. Some attempts have been made to use either the histogram method or the FFI method alone to fully characterize the ADC.
Usually, the digital circuit at the output of the ADC is a digital filter. This digital filter can be specified by its transfer function in Z domain or in the frequency domain, or by its circuit structure at the gate level, as discussed earlier. Since we do not have direct access to the outputs of the ADC, we have to draw conclusions about the ADC outputs by observing the digital filter outputs. This can be done by transfer function manipulation. Transfer function manipulation complexity depends on the testing technique. For the FFI and histogram experiments, the considered mixed circuit is composed of a band-pass filter connected to a seven bit ADC and at the output a fourth order Butterworth band-pass filter, Figure 1.
All the classical techniques for ADC testing and diagnosis can be appiied to an embedded ADC testing. But first we have to consider the propagation of the analog signal through the analog subcircuit and observation of the digital code at the output of the digital circuit. The propagation of the analog signal to the input of the ADC is performed easily. In fact, since the subcircuit under test is the ADC, all the remaining subcircuits are considered to be fault free. For digital code propagation from the ADC outputs to the outputs of the digital subcircuit, we need to find the inverse function of the digital subcircuit. This inverse function can be found either by boolean function manipulation, when only tbe structure of
1063-6404/96
$5.00
0 1996 IEEE
Proceedings of the 1996 International Conference on Computer Design (ICCD '96) 1063-6404/96 $10.00 © 1996 IEEE
for embedded ADC testing
In this section, boolean function manipulations for ADC outputs observation is presented. Using OBDD manipulation, test vectors for digital code propagation are transferred from the output of the ADC to the output of digital subcircuit. These codes are used for OSE, GE, DNLE, INLE, SNR, GTE and ENOB computation using the histogram and FFI methods. The Walsh transform is also applied for DNLE diagnosis and structural testingBoolean function manipulation is used to observe the result of the A/D conversion at the output of the digital circuit when a sine wave is applied at the primary input of the mixed circuit.
Il. Introduction
2. Functional
PQ, Canada, H3C3A7
Figure I A seven bit ADad
v in a mtxed cucmt
In the case of inverse function determination using boolean function manipulation, we considered one of the ISCAS85 or ISCAS89 benchmark circuits as a digital circuit.
135
2.2.1 Histogram
testing
Histogram testing constitutes a process for estimating the probability density function PDF. In our case, we only have access to the digital filter outputs. Thus we should build the histogram of the sinewave at the output of the digital filter and then draw conclusions about the histogram of the digital sinewave at the output of the ADC. This means that the PDF of the sinewave at the output of the ADC will be estimated by measuring the PDF at the output of the digital filter. In general, if the digital filter impulse response is h, then y is the convolution between x and h, y=h*x, where y and x are the outputs and inputs of the filter in the time domain. Then, the output of the digital filter, y for a given frequency, can be expressed as y (kr)
tion vectors needed for the record construction is 1526 for the ~88.0 benchmark circuit and 2048 for the cl908 one. Figure 5 shows the FFT of the collected samples at the outputs of the ADC in case of fault-free and faulty ADC, the amount of the fault is O.lLSB at the third bit. The SNDR (equation (9)) for the fault-free circuit is SNDR=41.6dB and in the case of the faulty ADC SNDRz358976dB. The ENOB in the fault-free case is 6.878 bits while the effective number of bits in the faulty case is 6.122 bits. Since the analog circuit is a band-pass filter it is not possible to measure the static performance. In fact, all the DC components are cut by this filter. _...-_,_r^ml_r-ar ,“. .d /
= Bsin (wkT + 4) , where B=G.A. G is the gain at that fre-
quency and t$ is the phase imposed by the filter. Since we have to take our sample in an integer number of periods of the input signal, the phase of y does not have any effects on the estimated PDF. Then, the PDF of x can be deduced from the PDF of y as follows: PDF(y)
1 = ‘+ / 2 n*r (GA) - (Gx) 2
=
+pdf(x)
= Gxpdf(y)
(1)
‘.: I/
-&.“..
.,;
le.“-
..A..-.
..“:
Figure 5 FFT of 512 ADC output codes for fault (a) and fault-free converter(b) Figure 6 shows the FFT of the output codes with 3 LSB second-harmonic distortion when the data are taken at the output of the ADC (Figure 6.a) and .WIIC,, ..L-- Ll^.. ^_^ *“,*^..I +I-,. _..+....t “I,c+L, A;&+.,, ‘C;,tar Lucy tic LMG,, a, LUGtJ”qJUL L,lL “,&LLal 1IIcII.
“.”
1
’ .wA.w
, .,“F
“b I
,
,,A”
.
I ..d
Figure 6 FFT of the output of ADC (a) and the output of the digital filter (b) for a faulty ADC
Figure 2 Fault-free and faulty histograms of a 7 bits ADC Thus, histogram testing can be performed at the output of the digital filter, and the INLE, the DNLE and the other performances can be tested. Figure 3 and Figure 4 shows the DNLE and INLE in case of fault-free ADC (a) and faulty ADC (b). A 10% LSB fault is injected at the third bit. The INLE and DLNE are computed from the histogram.
According to Figure 6 the harmonic error is more observable at the output of the ADC then the output of the digital filter. In fact the fourth order Buttenvorth band-pass filter attenuates the second harmonic by 20dB. Then n\,r.n ar ._ _1~. -..*-... 0~ ^C.L^ h nrr lb ;^ 3,.70u3 ?7 no>D ..,L.:,+I.ChTnD a~ ,,+,Ln _..+_,.+ the anun me oupu~ LOGr.\y~ ~111~~ LIIG.x~iui\ LIIGVUL~L of the digital filter is 36.852. The ENOB for Figure 13.a is 6.12 bits while the ENOB for Figure 13.b is 6.298 bits
3. Conclusion A technique for test vector generation for ADC outputs observation at the digital circuit is introduced. This technique is based on boolean function manipulations based on OBDD (ordered binary decision diagram) representation. Also, the transfer function manipulation for FFT, histogram and Walsh transform testing of an embedded ADC are introduced. Thus, we have shown that an embedded ADC can be easily tested by the conventional test techniques whenever the digital circuit structure or its transfer function is available.
References 0:
/
_
.I
‘m
v
.”
/m
.m
I ..,
J
,I:,I
Figure 4 lNL% for fault-free ADC (a) id
Faulty?&
(b)
It is clear that, when all the ADC bits are observable at the digital circuit outputs, the DNLE and the INLE of the ADC are exactly the same, when the data are collected at the ADC outputs and at the digital circuit outputs. In our case, the effect of the 10% LSB error in the third bit have caused SO%LSB DNLE and INLE. 2.2.2 ml- testing The FFT of the outputs, x, of the ADC can be easily deduced from the FFT of the outputs, y, of the digital filter if its transfer function is available. Then, the FFT of x is given by equation (2) where H(i) is the transfer function of the digital filter.
FIT(y)
= FFT(h(x))
*FFT(x)
= yg
(2)
Since we have the FFI of x, the SNDR, the ENOB and the GTE of the ADC can be easily computed. The FFT testing needs less samples than the histogram. In our case, we take a record of 512 samples. This means that the number of observa-
[l] M. MAHONEY “DSP-Based Testing of Analog and mixed-signal circuits” IEEE Computer Society Press, 1990. PI B. Ayari, N. Ben-Hamida and B. Kaminska, “Automatic Test Vector Generation for Mixed-Signal Circuits”, The European Conference on Design Automation, PARIS, Marsh 1995, pp. 458463. t31 M. V. Bossche, Schoukens, and J. Rennboog “Dynamic testing and Diagnosis of A/D converters” IEEE Transactions on Circuits and Systems, August 1986, pp. 775-785. 141 A. Charoenrook and M. Soma “A Fault Diagnosis Technique for Flash ADC’s”, International Test Conference 1993, pp. [51 M. F. W A G D Y “Diagnosing ADC Nonlinearity at the Bit Level” IEEE iransactions on instrumentation and Measurements, December 1989, pp. 1139-1141. 61 J. BLAIR “Histogram Measurement of ADC Nonlinearities using Sine Waves” IEEE Transactions on Instrumentation and Measurements, June 1994, pp.373-383. [71 M. F. W A G D Y AND S. S. A W A D “Determining ADC Effective Number of Bits Via Histogram Testing” IEEE Transactions on Instrumentation and Measurements, August 1991, pp. 770-772.
136
Proceedings of the 1996 International Conference on Computer Design (ICCD '96) 1063-6404/96 $10.00 © 1996 IEEE
