dvcon 2016 slaying the uvm reuse dragon poster

Slaying the UVM Reuse Dragon

Issues and Strategies for Achieving UVM Reuse Mike Baird, Willamette HDL, [email protected] Bob Oden, Mentor Graphics, [email protected]

AHB to SPI ChipLevel Test Bench

AHB to WB Block Level Test Bench hdl_top

WB to SPI Block Level Test Bench hvl_top

hvl_top

wb_monitor_bfm BFM tasks

ahb2wb_env

wb_driver_bfm BFM tasks

wb_agent

hdl_top

hvl_top

ahb2wb_config

top_level_ sequence

test_top

wb_config

Interface sequences

Reuse

spi_monitor_bfm

test_top

test_top

ahb2spi_config

ahb2wb_config

wb2spi_config

wb2spi_env

spi_config

spi_agent

Reuse

wb2spi_config

BFM tasks

spi_driver_bfm

Interface sequences

BFM tasks

wb_config

ahb_config

spi_if

wb_if

Reuse

scoreboard

Reuse

ahb2spi_env wb2spi_env

ahb2wb_env

scoreboard

wb2spi DUT

ahb2wb DUT Env Coverage Predictor

Env Coverage Predictor

Shared WB Monitor

wb_if

ahb_if

wb_driver_bfm

ahb_driver_bfm

wb_agent

ahb_agent

top_level_ sequence

BFM tasks

hdl_top

top_level_ sequence

wb_monitor_bfm

Interface sequences

BFM tasks

BFM tasks Interface sequences

wb_monitor_bfm

ahb_monitor_bfm

BFM tasks

BFM tasks

wb_if

class test_top // UVM test for block level simulations virtual function void build_phase(uvm_phase phase); string interface_names[] = {AHB_BFM, WB_BFM} ; super.build_phase(phase); configuration.initialize(BLOCK, "uvm_test_top.environment", interface_names ); endfunction

1- test class initializes top level configuration

BFM tasks

ahb_if

ahb2wb

wb2spi

spi_if

BFM tasks

spi_driver_bfm

ahb_driver_bfm BFM tasks

class test_top // UVM test for block level simulations virtual function void build_phase(uvm_phase phase); string interface_names [] ={ WB_BFM, SPI_BFM } ; super.build_phase(phase); configuration.initialize(BLOCK, "uvm_test_top.environment", interface_names); endfunction

spi_monitor_bfm

ahb_monitor_bfm

ahb2spi

BFM tasks

1 - test class initializes top level configuration

class test_top // UVM test for chip level simulations virtual function void build_phase(uvm_phase phase); string interface_names[] = { AHB_BFM, WB_BFM, SPI_BFM } ; super.build_phase(phase); configuration.initialize(CHIP, "uvm_test_top.environment",interface_names); endfunction

1 – test classs initializes top level configuration class ahb2wb_configuration function void initialize(uvmf_sim_level_t sim_level, string environment_path, string interface_names [], uvm_reg_block register_model = null, uvmf_active_passive_t interface_activity[] = null);

class ahb2spi_configuration function void initialize(uvmf_sim_level_t sim_level, string environment_path, string interface_names [], uvm_reg_block register_model = null, uvmf_active_passive_t interface_activity[] = null); if (register_model == null) begin reg_model = ahb2spi_reg_block::type_id::create("reg_model"); reg_model.build(); enable_reg_adaptation = 1; wb2spi_config.enable_reg_prediction = 1; end

if ( sim_level == BLOCK ) begin ahb_config.initialize( ACTIVE, {environment_path,".a_agent"}, interface_names[0]); wb_config.initialize ( ACTIVE, {environment_path,".b_agent"}, interface_names[1]); end else if ( sim_level == CHIP ) begin ahb_config.initialize( ACTIVE, {environment_path,".a_agent"}, interface_names[0]); 2 – ahb2wb_config.initialize(sim_level, {environment_path, ".ahb2wb_env"}, wb_config.initialize ( PASSIVE,{environment_path,".b_agent"}, interface_names[1]); end else if ( sim_level == SYSTEM ) begin { interface_names[0], interface_names[1]} ); chip level ahb_config.initialize( PASSIVE, {environment_path,".a_agent"}, interface_names[0]); wb2spi_config.initialize(sim_level, {environment_path, ".wb2spi_env"}, configuration wb_config.initialize ( PASSIVE, {environment_path,".b_agent"}, interface_names[1]); { interface_names[1], interface_names[2]}, end else begin reg_model.wb2spi); Initializes block `uvm_fatal("CONFIGURATION", ”. . . endfunction level configuration end endfunction POSTER TEMPLATE BY:

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class wb2spi_configuration function void initialize(uvmf_sim_level_t sim_level, string environment_path, string interface_names[], uvm_reg_block register_model = null, uvmf_active_passive_t interface_activity[] = null ); if ( sim_level == BLOCK ) begin wb_config.initialize( ACTIVE, {environment_path,".wb_agent"}, interface_names[0]); spi_config.initialize( ACTIVE, {environment_path,".spi_agent"}, interface_names[1]); end else if ( sim_level == CHIP ) begin wb_config.initialize( PASSIVE, {environment_path,".wb_agent"}, interface_names[0]); spi_config.initialize( ACTIVE, {environment_path,".spi_agent"}, interface_names[1]); end else if ( sim_level == SYSTEM ) begin wb_config.initialize( PASSIVE, {environment_path,".wb_agent"}, interface_names[0]); spi_config.initialize( PASSIVE, {environment_path,".spi_agent"}, interface_names[1]); end else begin `uvm_fatal("CONFIGURATION", . . . end

if (register_model == null) begin reg_model = wb2spi_reg_block::type_id::create("reg_model"); reg_model.build(); enable_reg_adaptation = 1; 3 – chip level enable_reg_prediction = 1; configuration end else begin $cast(reg_model,register_model); Initializes block enable_reg_prediction = 1; level configuration end endfunction