Electromagnetic Energy Harvesting
Science Applications International Corporation
Engineering Programs 5998 Alcalá Park San Diego, CA 92110
10260 Campus Point Drive San Diego, CA 92121
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Final Design Review May 5, 2009 Submitted to: Dr. Thomas Schubert Professor of Electrical Engineering Submitted by: Hanner Hart, Kelty Lanham, and Michael Sass
Abstract The SAIC-‐sponsored team designed a system that harvests S-‐Band radio frequency energy and provides power for an 8-‐bit PIC flash microcontroller. The ultimate goal was to have the capability to capture ambient radio frequency energy from traditional S-‐Band transmission sources, such as shipboard radar systems and radiolocation devices. The final design contains two primary subsystems: a single non-‐radiating edge fed microstrip patch antenna and a 7-‐stage charge pump circuit utilizing S-‐Band Schottky diodes. The final design also contains a supercapacitor-‐based energy storage and distribution system, but this subsystem is not vital to the overall device operation. Due to the technical complexity of the design, only the primary subsystems were physically built. These two subsystems were constructed onto a self-‐fabricated printed circuit board using a unique process developed by the team. This report contains a detailed overview of the final design of the University of San Diego’s capstone senior design project. The contents of this report will meticulously discuss the final system design at the circuit diagram level, as well as detail all simulation and test results. The process used to develop the final printed circuit board, as well as the test results achieved with this device, are included as well. The team’s success at meeting the minimum project standards is fully discussed. Finally, an outgoing budget assessment detailing the financial status of the project is fully disclosed.
Important Notice:
At the time of preparing the Final Design Review, the team is still in the process of final construction and testing of the design. As a result, an addendum will be submitted no later than Friday at 2:00 pm detailing the team’s final progress toward construction and testing.
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Table of Contents 1 - Introduction ................................................................................................................................................. 6 Background .................................................................................................................................................................. 6 Survey of Existing Markets and Research .................................................................................................. 6 Potential of RF Energy Harvesting ................................................................................................................. 7 SAIC Interest in RF Energy Harvesting ........................................................................................................ 8
2 – Project Concept........................................................................................................................................ 9 3 – Functional Specifications ................................................................................................................. 10 Project Outcome ..................................................................................................................................................... 10 Design Specifications ........................................................................................................................................... 11
4 – Overview of Final System Design ............................................................................................... 12 Statement of Final Design Approach .......................................................................................................... 12 Statement of Final System Development ................................................................................................. 12
5– RF Harvesting Subsystems ............................................................................................................... 16 Primary Subsystem I -‐ Antenna Subsystem ........................................................................................... 16 Overview of Technical Description………….…….………..…………………………………………16 Design Approach…………………………………….…….………..…………………...……………………16 Technical Description……………………………….…….………..…………………………………………19 System Analysis Results………………………….…….………..…………………………………………22 Primary Subsystem II -‐ Rectification Subsystem ................................................................................ 27 Overview of Technical Description………….…….………..…………………………………………27 Design Approach…………………………………….…….………..…………………………………………28 Technical Description……………………………….…….………..…………………………………………30 System Analysis Results………………………….…….………..…………………………………………32 Secondary Subsystem -‐ Energy Storage and Distribution Subsystem ................................... 37 Overview of Technical Description………….…….………..…………………………………………37 Design Approach…………………………………….…….………..…………………………………………38 Technical Description……………………………….…….………..…………………………………………39 System Analysis Results………………………….…….………..…………………………………………40
6 – Embedded System ................................................................................................................................. 43 7 – Personnel.. .................................................................................................................................................. 44 8 – Test Plan…. ................................................................................................................................................. 45 9 – Schedule…. .................................................................................................................................................. 51 10 – Budget…….. .............................................................................................................................................. 55 3
References......... ................................................................................................................................................ 57 Appendices A B C D
Resumes Calculations – Matlab Code Component Data Sheets Self-‐Fabrication of Printed Circuit Board – Detailed Procedure
List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 Figure 32 Figure 33
Block Diagram of System ..................................................................................................... 9 Overall System Design ........................................................................................................ 14 Ultiboard Representation of Final System PCB Layout I ....................................... 15 Ultiboard Representation of Final System PCB Layout II ..................................... 15 Basic Model of an Edge Fed Patch Antenna ................................................................ 16 ITS Broadband Spectrum Survey Graph ...................................................................... 18 Two-‐Dimensional View of Microstrip Patch Antenna ............................................ 20 Three-‐Dimensional View of Microstrip Patch Antenna ......................................... 21 Antenna Return Loss vs. Frequency .............................................................................. 23 Antenna Swept Gain vs. Frequency ............................................................................... 23 Antenna VSWR vs. Frequency .......................................................................................... 24 Real Part of Antenna Input Impedance .......................................................................... 24 Imaginary Part of Antenna Input Impedance ............................................................ 25 Antenna Radiation Pattern ............................................................................................... 25 Smith Chart ............................................................................................................................. 26 Antenna Near Field Three-‐Dimensional Plot ............................................................. 26 Antenna Far Field Three-‐Dimensional Plot ................................................................ 27 Rectification Subsystem ..................................................................................................... 28 One-‐Stage Voltage Doubler ............................................................................................... 29 10 MHz Charge Pump Design ........................................................................................... 33 Transient Analysis for 10 MHz Charge Pump Design ............................................. 33 Bread Boarded Rectification Test Circuit .................................................................... 34 Oscilloscope Output for Rectification Test Circuit ................................................... 35 7-‐Stage Charge Pump Circuit Operating at 3.25 GHz .............................................. 36 Transient Analysis for 7-‐Stage Charge Pump at 3.25 GHz .................................... 37 Various Supercapacitors .................................................................................................... 38 Energy Storage and Distribution Subsystem Diagram ........................................... 41 LTC3225 Demonstration Board Configuration ......................................................... 42 Antenna Subsystem Generic Test Setup ...................................................................... 47 Simulation of 5-‐Stage Charge Pump .............................................................................. 49 Oscilloscope Results of 5-‐Stage Charge Pump ........................................................... 49 Gantt Chart for Fall Semester ........................................................................................... 53 Gantt Chart for Spring Semester ..................................................................................... 54 4
List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11
Major Design Specifications ....................................................................................................... 11 Microstrip Patch Antenna Characteristics ......................................................................... 17 Patch Antenna Substrate Specifications .............................................................................. 19 Overview of Theoretical Antenna Specifications ........................................................... 19 Theoretical Rated Input Characteristics to Rectification Circuitry ..................... 20 Results from Simulation of Microstrip Patch Antenna ............................................... 22 Specifications of Rectification Components ...................................................................... 31 Supercapacitor Advantages and Disadvantages ............................................................ 39 Microchip PIC10F202 Flash Microcontroller Specifications .................................. 43 Proposed Testing Conditions and Theoretical Results .............................................. 47 Critical Design Review Updated Budget ............................................................................. 55
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1 – Introduction Within the curriculum of the Senior Design and Practice course at the University of San Diego, a traditional capstone design project providing a solution to a realistic problem must be completed. To satisfy this requirement, a device that harvests S-‐Band radio frequency energy and provides power to an embedded system was designed. This project was worked on by three Senior Electrical Engineering students: Hanner Hart, Kelty Lanham, and Michael Sass. Although sponsored by Science Applications International Corporation (SAIC) and loosely based on a United States Patent [1] assigned to SAIC, all of the design work has been completed within the laboratory facilities at the University of San Diego. Dr. Gerald C. Gerace, an SAIC Deputy Division Manager within Division 048, acted as mentor and principle project advisor. Mr. Ronald Rahmel and Mr. Andrew Spector also advised the undergraduate team. Funding for the project up to the amount of $700 was approved by the Manager of SAIC’s Division 048, Dr. Steven P. Auerbach. A research grant proposal was submitted to the University of San Diego’s Associated Students and approved. However, due to the team remaining under budget, this additional funding was not needed.
Background Within the past decade, a wide range of wireless devices have been introduced that provide efficient and practical solutions to consumer, industrial, and military needs. Unfortunately, with existing technology, wireless devices are constrained by the amount of time they can be operated independent of centralized power sources. As a result, the usefulness of wireless devices, as well as the potential range of applications, is severely restricted by relatively slow advancements in rechargeable battery technology. As a result, a clear market need exists that either allows wireless devices to operate for longer durations away from centralized power sources or increases the amount of power that can be supplied to a wireless device.
Survey of Existing Markets and Research Currently, many technologies have been developed that attempt to overcome the limitations imposed on wireless devices. For example, recent advancements in rechargeable batteries and electric double-‐layer capacitors (i.e. supercapacitors), as well as technologies that harvest solar energy and exploit the piezoelectric effect have been effective at satisfying a large portion of the established market need. Within the recent past, rechargeable battery capacity has been increasing by approximately 6% per year [2], and, as a result, the amount of time a wireless device can be used portably without being re-‐energized has improved. However, this only provides a partial solution to the inherent problem with powering wireless devices. Products that solely exploit 6
improvements in battery life still present severe restrictions for applications that require long periods of independent operation away from centralized power sources. Solar power technology has also developed into a viable solution for many industrial, commercial, and military applications. Nonetheless, at the current level of technology, solar power provides an inadequate solution for many wireless devices due to multiple seemingly insurmountable constraints. Some of these limitations include a solar cell’s location relative to the sun, time of operation, and weather conditions, as well as the relatively high price per watt of power. Moreover, many wireless applications do not have access to sunlight due to their embedded location within structures. Within the scientific community, much research has been devoted recently to developing piezoelectric energy harvesting devices. This technology exploits certain materials’ ability to induce an electric potential after the application of a mechanical disturbance. For example, it is theoretically possible to design a device that can take advantage of applied pressure to a human kneecap during normal movement and use this mechanical motion to induce an electric potential. Many mechanical systems inherently create vibrational motion during operation, and consequently, this energy could be harvested.
Potential of RF Energy Harvesting Around 1891, the famous inventor and engineer Nikola Tesla proposed that radio frequency energy could be used to wirelessly power devices [3]. Currently, passive radio frequency identification systems (such as RFID tags) are the only large scale implementation of the technology. Powering embedded systems, and to some extent wireless sensor networks, requires significantly more power than a simple passive device like an RFID tag; however, in recent years, the technology has been researched for applications that require monitoring of a sensor network. In most of these applications, the location of the sensors (inside a rigid structure, for instance) does not allow for other forms of energy harvesting. Furthermore, providing sufficient wiring to the sensor network would be extremely costly and cumbersome [4]. For example, the United States Navy purchased a system that allowed technicians to monitor the structural integrity of aircraft wings. Basically, wireless sensors were placed throughout an aircraft’s wing, and a technician uses a handheld device to wirelessly transmit power, as well as information, to the sensors. Once receiving power, each individual sensor transmits data back to the technician [5]. Harvesting radio frequency energy has also been discussed for monitoring the structural integrity of bridges, as well as overseeing environmental conditions within a sealed space (a nuclear reactor compartment, for instance) [4]. In most of these cases, the sensor network does not need to be run continuously, and, as a result, intentional power transmissions can be sent at specific times to power the devices.
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SAIC Interest in RF Energy Harvesting It is important to note that radio frequency energy harvesting is a relatively new area of research within the field of electrical engineering. As a result of the unproven capabilities of the technology, SAIC’s initial interest came about as a result of its potential for integration with unmanned aerial vehicles, and many of the team’s design decisions through the year took this specific application into account. To date, RF energy harvesting technology has focused mostly on low-‐powered applications. However, as the efficiency of the designed harvesting circuitry is increased, use with device’s requiring high power demands, such as an unmanned aerial vehicle, becomes a possibility. A high efficiency also allows for the possibility of harvesting ambient radio frequency energy to power certain wireless devices. According to Dr. Marlin H. Mickle, Professor of Electrical Engineering at the University of Pittsburgh and researcher in the area of wireless networks and energy harvesting, “When we talk about ambient [radio frequency] energy…we’re showing that we can make it work” [5]. It was the undergraduate design team’s goal to power a typical embedded system (such as a PIC microcontroller) by designing a device that has the capability of harvesting ambient S-‐Band radio frequency energy in the San Diego metropolitan area. Relevant sections of this report will demonstrate how the design team’s project, a virtual “proof of concept” of RF energy harvesting, provides the initial research and development work necessary for integrating radio frequency energy harvesting technology with unmanned aerial vehicles in the future. At the conclusion of our project, we still feel that the technology has much promise for many applications, including unmanned aerial vehicles.
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2 – Project Concept The team designed a system that harvests S-‐Band radio frequency energy and provides power for an 8-‐bit PIC flash microcontroller. The design contains two main subsystems, each having very specific purposes. Using a custom designed microstrip patch antenna optimized specifically for a narrow portion of the S-‐Band (3.25 GHz), the device captures electromagnetic energy from the surrounding environment. Then, the alternating current signal is efficiently rectified via a 7-‐stage charge pump circuit that utilizes S-‐Band Schottky diodes. A secondary subsystem acts as a backup power supply by storing energy in supercapacitors. Then, when insufficient energy is captured from the receiving antenna to directly power the microcontroller, this secondary subsystem distributes stored energy to the attached embedded system. A block diagram of the designed system is shown below in Figure 1.
Figure 1. Block Diagram of System
Please note that energy can still be provided for the microcontroller without the secondary energy storage and distribution subsystem. Due to the technical complexity of the design, the final developed system only includes the two primary subsystems that are described above. For the final developed device, these two subsystems were integrated onto a self-‐ fabricated printed circuit board. SAIC’s main technical interest in radio frequency energy harvesting technology centers around a desire to potentially harvest military directional radar energy to increase the amount of time an unmanned aerial vehicle (UAV) can stay airborne. Unfortunately, integrating the team’s design into a solution for UAV’s is outside the scope of SAIC’s funding commitment, as well as being far too technically advanced for undergraduate engineering students. As a result, the team’s main objective focused on proving that S-‐Band radio frequency energy harvesting can be feasible for powering a very simple device. The team also focused our efforts on improving the overall AC to DC energy conversion efficiency. The successes realized toward attaining these two objectives provide a foundation for SAIC to continue future research and development in the area of radio frequency energy harvesting. 9
3 – Functional Specifications Project Outcome Since the work SAIC asked us to perform was mostly research and development into an emerging technology, establishing what defined a successful project was essential to ensuring that the team was able to deliver an appropriate solution. As a result, at the Preliminary Design Review stage, certain minimum design goals were established upon completion of the project. As the team’s understanding of realistic project outcomes improved with time, these minimum design goals were updated at the Critical Design Review phase, as well as before the Final Design Review. The following were the minimum design goals that were agreed upon:
An antenna will be custom designed, built, and tested that effectively captures an appropriate amount of RF energy
The antenna will be optimized for the frequency band selected
A rectification circuit will be designed, built, and tested that converts the input AC signal into a DC signal
The rectification circuit will be optimized to have the highest efficiency possible to increase overall system performance
An energy storage and distribution subsystem will be designed that utilizes electric double-‐layer capacitors (supercapacitors)
The energy storage subsystem will be able to provide a constant output voltage/current
Furthermore, it was determined that if these minimum standards were reached, the following additional design goals would be attempted.
The entire system will be self-‐fabricated onto a printed circuit board
The system will be used to power an embedded system performing a nominal task
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Design Specifications The major design specifications for each subsystem are listed below in Table 1. Specifics about each one of these subsystems, and the justification for these design specifications can be found within the RF Harvesting Subsystems section. These specifications were decided upon during the project’s Critical Design Review phase. They were drastically refined between the Preliminary and Critical Design Review stages. Table 1. Major Design Specifications
Rectification Energy Storage / Distribution
Secondary Subsystems
Antenna
Primary Subsystems
Description of Specification Resonant Frequency
3.25 GHz
Bandwidth
> 3000 kHz
Antenna Gain
6 dBi
Polarization
Linear
Radiation Pattern
3 dB Directivity
Effective Area
4.12 x 10-‐3 m2
Input Frequency
3.25 GHz
Output Frequency
0.0 Hz (DC Signal)
Input Voltage Range
0.50 V – 3.68 V
Output Voltage
3.3 V
Power ĨĨŝĐŝĞŶĐLJ͕ɻrectification
> 80%
Output Voltage
4.8 V
Output Current
> 20 µA
Power Efficiency, ɻenergy storage
> 65%
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Specification
4 – Overview of Final System Design The S-‐Band RF energy harvesting device consists of two primary subsystems and a secondary subsystem. The first primary subsystem is the receiving antenna, which is solely responsible for capturing all of the RF energy that is used to power the integrated embedded system. The second primary subsystem is the rectification circuitry, which will efficiently convert the time varying input energy into a constant output voltage. The secondary subsystem is the energy storage and distribution system, which is responsible for acting as a power backup by storing captured energy in super capacitors. The overall device can operate effectively without the secondary subsystem, although some flexibility is lost in its operation.
Statement of Final Design Approach A circuit schematic of the final design, including the two primary subsystems and the secondary subsystem, is included on the following page as Figure 2. Due to the technical complexity of the team’s overall design, only the two primary subsystems were actually built and tested. The final design was fabricated on a single printed circuit board using National Instruments’ Ultiboard.
Statement of Final System Development Due to time and funding constraints toward the end of the spring semester, the team determined that it would be more efficient to self-‐fabricate the final printed circuit board. After consulting several engineers and hobbyists, a specialized, unique procedure was developed by the team to carry out the printed circuit board fabrication process. Please reference Appendix D for a copy of the team’s detailed fabrication procedure. Although somewhat time consuming, self-‐fabrication allowed the team to make revisions to the printed circuit board layout without having to wait for a manufacturer to produce a new board. Since high frequency circuit design was a fairly foreign technical area for the team, many revisions of the final design were made. Please see the Test Plan for more specific discussion of the iterations that led to the final printed circuit board layout and design. Two separate three-‐dimensional views of the final printed circuit board layout can be viewed in Figure 3 and 4 on page 15. The final printed circuit board was fabricated onto two separate types of material. The first was a standard double-‐sided copper clad board with 1 oz copper. The second was Rogers Corporation RT/duroid 5880 (see Primary Subsystem I – Antenna Subsystem for more details). Besides the difference in the materials used, the layout and design of each printed circuit board is identical. The final printed circuit board contains 40 mil traces with through hole components. Due to the high frequency signals that were being transmitted through the circuitry, the team 12
took special care to minimize the number of traces on the board. The final printed circuit board design also contains a conductive ground plane. This ground plane is electrically connected (through a via) to copper cladding surrounding the circuitry on the board’s top layer. The top layer copper cladding allows for any fringe field effects from the high frequency signal to be dissipated into the ground plane, without interfering with the circuitry’s operation.
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Figure 2. Overall System Design Including Primary and Secondary Subsystems 14
Figure 3. Ultiboard Representation of Final System PCB Layout I
Figure 4. Ultiboard Representation of Final System PCB Layout II
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5 - RF Harvesting Subsystems The following section provides a detailed overview of the two primary subsystems, as well as the secondary subsystem. Each subsystem is discussed in its own subsection. For each one, a brief overview of the technical solution is initially provided to give a short summary of the subsystem’s purpose. Next, insight into the design approach and alternative designs that were considered are discussed in depth. Moreover, a detailed technical description of each subsystem is included. Finally, system analysis results that were accomplished to date are included for each subsystem.
Primary Subsystem I - Antenna Subsystem Overview of Technical Description The antenna subsystem consists of a custom designed single patch antenna with a quarter-‐wave edge fed microstrip transmission line. The linearly polarized antenna was optimized to resonate efficiently at 3.25 GHz. Within the context of the overall system design, the antenna subsystem harvests the radio frequency power and transfers this power to the rectification circuitry. Design Approach A microstrip patch antenna consists of a radiating patch that rests above a dielectric substrate backed by a thin conductive ground plane. The radiating patch element can be designed to take the form of any number of planar geometries, including squares, rectangles, circles, and ellipses. These planar shapes have also been successfully wrapped around a three-‐ dimensional structure. Since an antenna is a reciprocal device, it can be used to radiate (i.e. transmit) electromagnetic energy or capture (i.e. receive) electromagnetic energy. A basic conceptual model of a standard rectangular patch antenna is shown in Figure 5 [6].
Figure 5. Basic model of an edge fed patch antenna [6] 16
For a typical patch antenna, the width dimension represents the two radiating edges, whereas the length represents the non-‐radiating edges of the conductive patch. Note that fringing fields exist along both of the radiating edges, and they add in phase [6]. The current distribution is the highest at the center of the width (i.e. all along the length dimension). The current becomes smaller as the width approaches each non-‐radiating edge. Moreover, the electric field is zero in the center of the patch, maximum at the left radiating edge, and minimum at the right radiating edge. As a result, the antenna experiences maximum directivity perpendicular to the radiating element [7]. The concept behind microstrip patch antennas was first introduced to the academic community in 1953 and began to have practical implications for antenna design work in the 1970’s [6]. Today, microstrip patch antennas have been successfully designed for use with cellular telephones, satellite radio receivers, missile and weapons guidance systems, as well as a wide variety of other applications [8]. A summary of the main advantages and disadvantages of microstrip patch antennas can be found below in Table 2. Table 2. Microstrip Patch Antenna Characteristics [6]
Advantages
Disadvantages
Lightweight
Narrow Bandwidth
Low Profile (Aerodynamic)
Limited Maximum Gain
Easy to Design and Construct
Poor Directivity
Inexpensive to Fabricate
Susceptible to High Losses
Easily Integrated with Existing Electronics
Low Power Handling
Multiple Resonating Frequencies Possible
Only Practical at Higher Frequencies
Matching Network/Feed Line Fabricated with Poor Antenna-‐Feed Isolation Antenna
In order to authoritatively discuss the feasibility of integrating an RF harvesting device with certain existing technologies (such as a UAV), the antenna subsystem cannot, under any circumstance, impede the operational capabilities of its host. For an application such as a UAV, microstrip patch antennas, with their planar structure, provide the perfect geometry for the aerospace environment, as it does not interfere with the UAV’s aerodynamics. Many antenna designs were initially considered for the harvesting device, including dipole, log periodic, Yagi-‐ 17
Uda, and horn designs. However, none of these antenna designs provide the low profile necessary for integration with a UAV. Since high-‐powered military radars provide the most obvious potential RF energy source for military UAV’s, harvesting high frequency energy is fundamental to the antenna subsystem. Unfortunately, besides microstrip patch antennas, the possibility for a compact antenna array of multiple elements simply did not exist for any other antenna type studied. Although the team’s goal is not to provide an application-‐specific RF harvesting solution, in order to make a confident opinion as to the feasibility of integrating the technology with a UAV, it was decided that an antenna with similar specifications to one that would be used with a UAV was required. These facts, as well as the relative simplicity of fabricating a patch antenna, led the team to choose a patch antenna design. The resonant frequency of the designed microstrip patch antenna was selected using the Institute for Telecommunication Sciences Broadband Spectrum Survey Data for San Diego [9]. This survey, conducted in 1995, revealed that the highest power density on Point Loma (by many order of magnitudes), exists in the S-‐Band, specifically between approximately 3.2 – 3.35 GHz. This power density, calculated to be 49.16 W/m2, is the result of high-‐powered shipboard radar systems and radiolocation transmissions within close proximity to the coast near Point Loma (see Appendix B for information on this calculation). Due to the conclusions the team made after studying the Broadband Spectrum Survey data, as well as the close correlation between the S-‐Band and military radar systems (many radar systems, such as the AN/SPY-‐1D radar system operate in this band), it was decided that the team would focus on harvesting energy near 3.25 GHz. The Broadband Spectrum Survey data for this portion of the S-‐Band is reproduced below in Figure 6.
Figure 6. ITS Broadband Spectrum Survey Received Signal Level Graph for 3.1 -‐ 3.7 GHz [9]
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Purchasing, rather than designing and constructing an antenna subsystem was also seriously considered for the RF energy harvesting device. However, due to limited budget constraints and potential integration issues with commercially available antenna designs, it was decided that a single microstrip patch antenna could be designed, simulated, and constructed with little monetary expense. Furthermore, it was determined that the necessary design resources, as well as dedicating one team member to this task, would not detract from the overall design process. Technical Description The microstrip patch antenna was constructed using Rogers Corporation RT/duroid© 5880 High Frequency Laminate. RT duroid is a commonly selected material for microstrip and stripline circuit applications. More importantly, this specific laminate has an extremely low loss tangent, and has a constant dielectric constant over a wide range of high frequencies. A layer of electrodeposited copper cladding comes standard on both sides of the laminate. A summary of the relevant specifications of Rogers Corporation RT/duroid© 5880 can be found in Table 3 below. A more exhaustive list of specifications has been provided in the laminate’s data sheet, reproduced in Appendix C.
Table 3. Patch Antenna Substrate Specifications
ŝĞůĞĐƚƌŝĐŽŶƐƚĂŶƚ͕ɸr
2.20 ± 0.02 spec.
>ŽƐƐdĂŶŐĞŶƚ͕ƚĂŶɷ
0.0009
Height of Dielectric Substrate
3.175 mm
Copper Cladding
1 oz. (35 µm)
Using Matlab and a set of universal equations describing the properties of microstrip patch antennas, the critical properties of the designed antenna were theoretically calculated. These calculations can be found in Table 4. The Matlab code that was written to efficiently determine these values can be reviewed in Appendix B, and the equations that were used to write the functions was verified in multiple academic papers. Please note that the actual substrate specifications found in Table 3 were used to determine these calculations, as well.
Table 4. Overview of Theoretical Antenna Specifications
Microstrip Patch Antenna Width
36.49 mm
Microstrip Patch Antenna Length
27.75 mm 19
Ground Plane Width
36.51 mm
Ground Plane Length
27.77 mm
Antenna Input Impedance
100.0 ё
Antenna Gain
6.0 dBi
Polarization
Linear
A microstrip patch antenna can be designed with a wide variety of feed arrangements, including bottom fed coax feeds and microstrip transmission line feeds. Since the energy from the antenna will enter the rectification circuitry directly, it was determined that a quarter-‐ wavelength non-‐radiating microstrip transmission line feed would be an efficient method to transfer power from the antenna subsystem to the rectification circuitry. The quarter-‐ wavelength feed was selected to ensure that the entire incoming signal could be reproduced accurately. This microstrip transmission line was calculated to have a width of 2.90 mm and a length of 8.62 mm. The transmission line is centered along the midpoint of the patch antenna width (i.e. along one of the radiating edges). Ansoft Designer SV, a planar electromagnetic solver and simulation software widely used in industry, was used to determine these calculations. An input impedance of 100 ёǁas assumed for designing the microstrip transmission line in Ansoft Designer SV. A two dimensional view of the designed patch antenna is shown below in Figure 7.
Figure 7. Two-‐Dimensional View of Microstrip Patch Antenna 20
A three dimensional view of the microstrip patch antenna is shown below in Figure 8. Note that the “wire box” structure represents the dielectric substrate. The exact specifications for the selected high frequency laminate were used when creating the microstrip patch antenna in Ansoft Designer SV. Also note that the ground plane is missing from the three dimensional view of the antenna, although it was included in the design layers within Ansoft Designer SV.
Figure 8. Three-‐Dimensional View of Microstrip Patch Antenna
Based on the theoretical calculations for the microstrip patch antenna, the input characteristics to the rectification subsystem were determined, and these values are summarized below in Table 5. These calculations rely upon the assumption that the designed antenna will have a minimum bandwidth of 3000 kHz, as this was the bandwidth of the antenna used to collect the Broadband Spectrum Survey data in the S-‐Band [9]. This ensures the integrity of the input power calculations that much of the design is based on. Although microstrip patch antennas typically suffer from a narrow bandwidth, a simple patch design will yield a bandwidth of approximately 1% to 5% of the resonant frequency [8]. For an antenna designed to operate at 3.25 GHz, this results in a bandwidth of 32.5 MHz to 162.5 MHz, which is many order of magnitudes greater than the minimum required bandwidth. Table 5. Theoretical Rated Input Characteristics to Rectification Circuitry
Input Power to Rectification Circuitry
135.20 mW
Input Voltage to Rectification Circuitry
3.68 V
Input Current to Rectification Circuitry
36.74 mA
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Also, please note that these calculations assume a constant power density, which will obviously not be the case while harvesting from ambient sources. However, these calculated input characteristics provide a baseline that can be used to compare actual measured values against. These calculations also do not take into account losses that will undoubtedly be observed in the microstrip transmission line and radiating element. Nonetheless, these input characteristics are much greater than the minimum specifications needed to successfully power the attached low-‐powered embedded system. System Analysis Results Ansoft Designer SV, a free version of the professional Ansoft Designer software suite, was used in order to begin simulating the proposed microstrip antenna design. Many software programs were considered for this task, including Sonnet Lite, Agilent ADS Momentum, and Zeland Inc.’s IE3D. In fact, all four programs were downloaded and fully researched. In the end, the team decided to use Ansoft Designer SV due to its powerful range of capabilities, intuitive interface, and exceptional graphical simulation results. After building and testing the designed microstrip patch antenna, the dimensions were modified slightly from theory in order to achieve the desired simulation results. These changes, as well as all relevant simulated data collected, are summarized in Table 6. Table 6. Results from Simulation of Microstrip Patch Antenna
Microstrip Patch Antenna Width
35.80 mm
Microstrip Patch Antenna Length
28.50 mm
Microstrip Transmission Line Width
2.90 mm
Microstrip Transmission Line Length
8.62 mm
Return Loss
-‐10.21 dB at 3.22 GHz
Gain
6.08 dBi at 3.22 GHz
VSWR
1.89 at 3.22 GHz
Antenna Input Impedance
100.60 + j0.0 ёat 3.25 GHz
The return loss specifies the amount of power that is reflected in a transmission line due to a device being connected to the transmission line. As a result, it is important to minimize the 22
return loss at the resonant frequency. The current design provides a minimum return loss of -‐ 10.21 dB at 3.22 GHz, which is extremely close to the desired resonant frequency of 3.25 GHz. A graph of the return loss vs. frequency is shown below in Figure 9.
Figure 9. Antenna Return Loss vs. Frequency
The simulated gain for the designed microstrip patch antenna was 6.08 dBi at 3.22 GHz. At 3.25 GHz, the gain was 5.97 dBi. A graph of the gain vs. frequency is reproduced below in Figure 10.
Figure 10. Antenna Swept Gain vs. Frequency
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The voltage standing wave ratio (VSWR) is the ratio of the amplitude of a standing wave at a maximum along the transmission line to the amplitude of a standing wave at a minimum along the same transmission line. A VSWR approaching 1.0 is desired for the microstrip patch antenna design at the resonant frequency. At 3.22 GHz, the simulation yielded a VSWR of 1.89. These results can be found below in Figure 11.
Figure 11. Antenna VSWR vs. Frequency
The real part of the antenna input impedance was designed to be 100.0 ё͘dŚĞ simulated real part of the input impedance was determined to be 100.60 ёĂƚϯ͘Ϯϱ',nj͘ graph of the real part of the input impedance vs. frequency is shown below in Figure 12.
Figure 12. Real Part of Antenna Input Impedance 24
The imaginary part of the antenna input impedance was designed to be 0.0 ё͘dŚĞ simulated imaginary part of the input impedance was determined to be 0.0 ёĂƚϯ͘Ϯϱ',nj͘ graph of the imaginary part of the input impedance vs. frequency is shown below in Figure 13.
Figure 13. Imaginary Part of Antenna Input Impedance
A radiation pattern shows the directionality of an antenna. From the simulation radiation pattern, shown below in Figure 14, it is clear that the designed microstrip patch antenna is highly directional. It is desired to have a microstrip patch antenna that radiates in one half of the hemisphere, resulting in a 3 dB directivity [7]. Clearly, the current design has room for improvement on satisfying the specification. However, all efforts will be made during construction to vary the dimensions of the ground plane, as well as the shape of the ground plane, which, according to theory, will help the antenna’s directionality.
Figure 14. Antenna Radiation Pattern 25
A Smith Chart was generated using Ansoft Designer SV. This Smith Chart has been reproduced below in Figure 15. Although it was not utilized for any of the specified design calculations, it was included in this report due to its historical significance and usefulness in impedance matching. The powerful capabilities of Ansoft Designer SV helped match the antenna transmission line to the patch element.
Figure 15. Smith Chart
The near field and far field of an antenna describes the regions around the radiating source and the relative importance of the fields within each region. Typically, the near field is represented by the region where the radius is less than the wavelength, and the far field represents the region where the radius is greater than the wavelength [10]. The near field and far field simulated results are shown below in Figures 16 and 17, respectfully.
Figure 16. Antenna Near Field Three-‐Dimensional Plot
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Figure 17. Antenna Far Field Three-‐Dimensional Plot
Note that the far field graphic shows that the field is at a maximum at the midpoint between the two non-‐radiating edges of the microstrip patch antenna. Moreover, this shows that the antenna radiates energy perpendicular to the planar antenna surface, which was predicted by theory. Although the simulation results attained from Ansoft Designer SV were not ideal, they helped optimize the theoretical calculations for the microstrip patch antenna. The team plans to begin constructing the designed antenna, and making needed changes during testing of the antenna.
Primary Subsystem II - Rectification Subsystem Overview of Technical Description The rectification subsystem consists of a 7-‐stage charge pump utilizing Schottky diodes. A Linear Technology LT1965 Low Dropout Linear Regulator is placed at the output to the charge pump circuitry to ensure a proper voltage across the input to the energy storage and distribution subsystem. Within the context of the overall system design, the rectification subsystem converts the time varying input sinusoid from the antenna subsystem and converts the signal to a direct current (DC) form [4]. During this conversion, the voltage is also increased. Before entering the energy storage and distribution subsystem, the output voltage is regulated to a steady value. Figure 18 below is a schematic of the overall rectification design.
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C7 560p
C6 560p Antenna
D3A BAT63
C3 560p
D2A BAT63
C2 560p
D4B BAT63
D3B BAT63
D2B BAT63
D1B BAT63
D1A BAT63
D4A BAT63
C4 560p
C5 560p
C8 560p
C1 560p
Rectification/Charge Pump
Figure 18. Rectification Subsystem
Design Approach This design is based on the principles behind diodes and capacitors, and their behaviors when configured into a charge pump circuit. Charge pumps work in stages that progressively increase the output voltage in a DC form [4]. By increasing the number of stages of the charge pump it is theoretically possible to deliver any needed output voltage. The only constraint is that the circuit must obey Ohm’s law. In other words, by increasing voltage, current is sacrificed. The first stage of the design is shown in Figure 19. This circuit is a voltage doubler that operates as follows: 1. Assume a sinusoidal input, Vin=A Sin(Zt) and a peak amplitude larger than Vth of the two diodes. 2. With the first positive semi-‐cycle after Vin=Vth capacitor C1 begins to charge and continues to charge until the peak voltage of A-‐Vth is reached. At that moment Vc1=A-‐ Vth. 3. When the semi-‐cycle begins to decrease, the capacitor C1 retains its charge because it has no discharge path. At this point both diodes are behaving as open circuits. 4. When Vin enters the negative semi-‐cycle diode D2 operates as a short circuit allowing the negative terminal of capacitor C1 to connect to Vin and begins to charge the same way that the other plate of C1 charged.
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5. At this point capacitor C1 has the charge of Vin on both plates and a total charge of 2Vin [4]. 6. To accommodate a load at the output, an output capacitance, C2 must be added. Capacitor C2 removes the ripple from the output when a load is present [11].
C1
D1
Vin
C2
D2
Figure 19. One-‐Stage Voltage Doubler
Now, the concept of the doubler circuit can be expanded into “n” stages by cascading charge pumps until the desired output voltage is reached. However, when this circuit is applied to a load, that load will drain charge from the capacitors and decrease the output voltage. The charge drain per period is [4]: (1) Therefore, the output voltage depends on the load placed on the circuit and the current load must be taken into account when computing what the output voltage will be. The output voltage of an ideal n-‐stage charge pump is: (2) Where C is the stage capacitances, f is the input frequency, Iload is the load current and n is the number of stages in the charge pump. The above equation assumes ideal diodes and does not take into account the turn-‐on voltage required and other losses that are associated with diodes. When diodes are operated in the reverse-‐biased mode (these diodes are reverse-‐ biased 50% of the time), they exhibit parasitic capacitances and inverse current saturation. Those effects are outside the scope of this project and only cause a minimal difference in the 29
output voltage. Therefore, they can be effectively ignored. One effect not taken into account that cannot be ignored is the diode turn-‐on voltage, which, using Schottky diodes is 0.3 V. The following equation is the result: (3) It is also prudent at this time to discuss other designs that were considered and why this specific design was chosen. First of all, there are many different designs of charge pumps that could have been used. Each one has its own advantages and disadvantages. The design that was decided upon has very good low-‐voltage operation in comparison to some other designs. There are also other designs that use MOSFET transistors instead of diodes. These designs work well for applications at lower frequencies because the MOSFET is built with a “built in diode.” The diode is not actually built in, but rather an intrinsic trait of all transistors. These internal diodes are very powerful, but are slow to operate. This would not work in the high frequency range of the S-‐Band. MOSFETs also require a Drain to Source resistance to provide a control voltage. This parasitic resistance would further reduce the efficiency of the system. Technical Description The rectification system was self-‐fabricated onto a printed circuit board that also includes the microstrip patch antenna. A Faraday cage separates the antenna from the rectification circuitry, ensuring that neither subsystem electrically interferes with the other. All components needed for the rectification circuitry come in a through hole mount package. Through hole components are easier to use than surface mount. Surface mount components were originally going to be used, but the idea was abandoned due to technical difficulties in the construction phase. To determine the values for the capacitors, many variables were taken into effect. The major variable was the amount of energy that was to be harvested by the antenna system, then the requirements for the energy storage system. For these calculations, a value of 500 mV output from the antenna was assumed. The minimum requirement for the LTC3225 supercapacitor charger is 2.8 V and at least 20 µA. The system was designed to deliver 3 V and 3 mA to the energy storage system. These values were determined by evaluating the other systems. Knowing that the antenna will provide 500 mV at 36.74 mA, it was determined that the rectification system should be designed to deliver 3 V. This is 0.2 V above the minimum. This value was decided on to take into account any losses and to give a slight buffer if the antenna does not deliver exactly 500 mV. The 36.74 mV input current was then halved to give a worst case scenario for losses. Then using Ohm’s law, it was determined that 3.03 mA would 30
be delivered to the energy storage system. Using equation (3) and solving for C it was determined that the capacitance must be 34.6 pF. However, after simulating the circuit, it was determined that the capacitor values were too small. As a result, 560 pF capacitors were used. Next, diodes had to be found that would work in the S-‐Band. The problem with such high frequencies is that the time that a standard diode takes to transition from its forward to reverse bias state is longer that one period at 3.25 GHz. Therefore, diodes with a very fast switching time had to be used. Also, since this project operates at very low voltage levels, Schottky diodes were used. Schottky diodes use a metal-‐semiconductor junction instead of a semiconductor-‐semiconductor junction. This allows the junction to operate much faster and gives a forward voltage drop of 0.15 -‐ 0.45 V instead of 0.7 -‐ 1.7 V of normal diodes[11]. The specifications for the specific parts that were used in the final design can be found in Table 7 below. Table 7. Specifications of Rectification Components
Capacitor
Component
Schottky Diode
Specification Manufacturer
PROSPERITY DIELECTRIC
Part Number
MA0603XR-‐561K-‐500PR
Size Code
DO-‐15
Capacitance
560pF
Rated Voltage
50 VDC
Mounting
Through Hole
Temperature Tolerance
X7R
Manufacturer
Avago Technologies
Part Number
5082-‐2835
Package
DO-‐15
Forward Voltage
0.34 V
Maximum Frequency
12 GHz
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At this point, the output of the system is determined by the input received from the antenna. All of the calculations were done assuming minimum power values. But the antenna has the ability to deliver up to 3.6 V. If this happens, the output of the rectification system will be nearly 16 V. The maximum input for the LTC3225 Supercapacitor charger is 5.5 V. Therefore, a voltage regulator was put in series with the rectification circuit. The LT1965 Low Dropout Linear Regulator allowed an input of 1.8-‐20 V and was configured to output the exact voltage required for the PIC microcontroller. The output was configured at 3.3 V to allow the LTC3225 to operate at its’ highest efficiency (see data sheet in appendix C). The output from the LT1965 was then delivered directly to the supercapacitor charger. If the power level ever drops below the needed power for the microcontroller, the charge that is stored in the supercapacitor energy storage system will take over to power the device until normal operating power is restored. The LT1965 linear regulator was ordered to deliver a constant 3.3 V out and only requires two capacitors to be attached to it to regulate the input and output ripple and to provide a proper input voltage to the device. System Analysis Results The rectification system was initially designed and tested in National Instrument’s Multisim 10.1. Multisim is software that is available to the group on the laboratory computers provided by the University of San Diego. The group members are all familiar with the software from use in other labs in the engineering department. Multisim is also very capable of simulating circuits. The included database of components includes the components that were selected for the design, making simulating very easy. Another benefit of using Multisim is that it can transfer the circuit to Ultiboard, which is a printed circuit board design program. The ability to transfer this information ensures that the traces made when making the PCB will be accurate and connect correctly to the components. Ultiboard was used to finalize the design incorporating all the primary subsystems. The first tests of the design were done in Multisim at 10 MHz to confirm that the system worked properly. It was important to test at lower frequencies because there are more challenges to designing circuits in the higher frequency S-‐Band. Having the knowledge that the circuit works before converting it to high frequency allows for easier diagnostics and troubleshooting of the circuit. Figure 20 below is the circuit designed in Multisim for 10 MHz and the results. Figure 21 shows the transient analysis for the circuit.
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Figure 20. 10 MHz Charge Pump Design
Figure 21. Transient Analysis for 10 MHz Charge Pump Design
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This simulation demonstrates that the theory behind the charge pump is feasible. Different values of capacitors and different diodes were used for the simulation to account for the lower frequency. Also in this simulation, only five stages were used to simplify the design. A 1 kё load resistor is added to simulate the attached load to the circuit. Theoretically the above circuit should have an output of five times the input: (4) Where Vin is 0.5Volts giving an output of 2.5 V But after equation (3) must now be analyzed:
As shown, the calculated output voltage is 0.30024 V less than the theoretical output. This is mainly due to the loss of the diodes of 0.3 V. But there is also a difference between the theoretical output and the measured output from Multisim. (5) These losses are mostly caused by diode parasitic capacitances and inverse current saturation. These losses are rather high for this simulation, but that is mainly due to a poor simulation of the diodes. Better diodes would produce better results. The next step was to bread board this test circuit using components that are available in the lab. Diodes with a Vth of 0.34 V were used with 5 µF capacitors. Figure 22 below is a photograph of the test circuit built on the bread board.
Figure 22. Bread Boarded Rectification Test Circuit 34
The input delivered to this circuit is 500 mV RMS at 10.0 MHz. This was delivered with an Agilent 33250A Function Generator. The output was then read on an Agilent MSO6012A Mixed Signal Oscilloscope. The output of the test circuit is shown in Figure 23. The yellow trace is the input of 500 mV at 10 MHz and the green trace is the output. The output was measured to be 2.030 V with a ripple too small for the oscilloscope to detect.
Figure 23. Oscilloscope Output for Rectification Test Circuit
These test values are closer to the theoretical value of 2.199 V with a voltage difference of This measurement is a much better simulation of the actual performance of a charge pump circuit. The 169 mV voltage drop is a much more accurate representation of losses due to diode parasitic capacitance and inverse current saturation. The final stage of the system analysis was simulating the design at 3.25 GHz. For this simulation, the actual components that were used for the final system were simulated. It was also determined that seven stages would have to be used instead of five to achieve the required output. This was determined by plugging in N values into equation (3) and solving for C. When N was less than 7, the values for the capacitance were negative, and therefore impossible. Striving to keep the amount of stages at a minimum, seven were used. Then, the capacitor value was approximated to the nearest manufactured value, which was 560 pF. The output was then calculated using equation (3) to be
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Again, this is nearly 200 mV less than what the output theoretical output of, using equation (4) Causing a voltage difference of, This can be attributed to the voltage loss from the diodes and other small losses in the circuit. Notice that the forward voltage of this diode is only 190 mV. A circuit diagram of the 7-‐ stage charge pump design can be seen below in Figure 24. Also, this circuit was simulated in Multisim using the results from the above equations, and can be reviewed in Figure 25 on the next page.
Figure 24. 7-‐Stage Charge Pump at 3.25 GHz
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Figure 25. Transient Analysis for 7-‐Stage Charge Pump Circuit Operating at 3.25 GHz
This simulation proves that the design will work. With 500 mV input the system outputs 3.1448V. Now using equation (5), Again, there are discrepancies between the calculated value and the measured value due to the diode parasitic capacitance and inverse current saturation. In this test, however, the difference in output voltage is much closer. This is because the components used were of better quality and were designed to work under these conditions. This design was then transferred first to a breadboard, then to a printed circuit board for testing. When bread-‐boarded, the system output was 3.14V, which is nearly identical to the values that were determined using Multisim. The final testing process was to build the circuit on a printed circuit board. The first few attempts used surface mount components to minimize overall board size. But the team quickly learned that surface mount construction was difficult and decided to change the design to use through hole components. When the board was finally assembled and tested, with an input of 500mV the output was 3.05VDC. The cause of this additional loss is most likely due to losses in the traces on the board. The team is currently working on an updated board design that will minimize trace length, and in theory provide better efficiency. These results will be presented in the addendum that will be submitted on Friday, May 8th.
Secondary Subsystem - Energy Storage and Distribution Subsystem Overview of Technical Description The energy storage and distribution subsystem consists of a Linear Technology LTC3225 Supercapacitor Charger with two supercapacitors connected in series which acts as a secondary 37
subsystem and is not vital to the overall functionality of the RF energy harvesting device. Various Schottky diodes, resistors, capacitors, and DC1220B Supercapacitor Charger Demonstration Board are necessary for the subsystem to perform as desired. Within the context of the overall system design, the energy storage and distribution subsystem is responsible for storing harvested energy and distributing the energy to the embedded system. Under normal operating conditions, the supercapacitors store charge and act as a backup power supply. If insufficient energy is captured by the antenna subsystem and rectified with the rectification subsystem, the charge stored on the supercapacitors provides the necessary voltage required to power the embedded system. Design Approach The design team determined that using supercapacitors will prove to be the most effective approach to the team’s specific design requirements. Supercapacitors, as shown in figure 26, are electromagnetic double-‐layer capacitors that provide thousands of times the storage capacity of a typical capacitor. They are passive electronic components that store energy electrostatically between a solid electrode and oppositely charged electrolyte ions by creating a voltage potential difference. Supercapacitors are extremely high power devices, however have a very low energy density. Although the technology has been around for many years, in recent years supercapacitor technology has provided much higher energy densities in a much smaller package, allowing for inclusion in a wider array of applications. Unfortunately, the energy densities of supercapacitors are still typically only one-‐fifth to one-‐tenth that of rechargeable batteries. However, there is no risk of overcharging a supercapacitor, and they can be fully charged in seconds. Supercapacitors can also be charged and discharged millions of times before needing to be replaced, making them an ideal choice for applications where access to the energy storage component is extremely costly and time consuming [12].
Figure 26. Various Supercapacitors.
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Throughout the design phase, supercapacitors have proven to be the optimal energy storage system. The team ruled out using a rechargeable battery early on primarily due to the complex charging characteristics for most rechargeable batteries. Furthermore, due to the variable nature of ambient radio frequency energy, the risk of applying an overvoltage to a rechargeable battery could jeopardize the functionality of the entire device. Since rechargeable batteries use an electro-‐chemical process, the number of times they can be recharged is limited. Supercapacitors are capable of tolerating the immediate energy demands, versus a rechargeable battery, thus also preventing a decline in charge capacity over the battery life [12]. These shortcomings associated with rechargeable batteries would severely hinder the functionality of the design as well as the benefits of radio frequency energy harvesting. The design team determined that a supercapacitor design is far more appropriate for the design specific applications and will allow for greater functionality of the final product. Table 8. Supercapacitor Advantages and Disadvantages [3]
Advantages
Disadvantages
High Power Density
Low Energy Density (1/5th to 1/10th of Rechargeable Battery)
Rapid Charging Rate
Rapid Discharge Rate
Unlimited Cycle Life
Low Cell Voltages (Requires Series Connections)
Straightforward Charging Methods
Only Partial Use of Energy Spectrum
Low Impedance
High Cost of Price per Watt
Technical Description Due to the rapid discharge rate of supercapacitors and the inconsistency of energy available, a system that provides a constant output voltage assists the RF energy harvesting system in continually powering the embedded system. The final design makes use of a programmable LTC3225 Supercapacitor Charger chip that ensures that this design is functional. Since the amount of energy captured from the receiving antenna varies with time, this chip acts as a backup power supply when sufficient energy is not available for harvesting and supplies a constant output voltage to the embedded system. The LTC3225 Supercapacitor Charger has been put on the market within the last year by Linear Technology which charges two series supercapacitors with an voltage input range of 2.8 V to 5.5 V while providing a constant output voltage that can be programmed to either 4.8 V or 39
5.3 V by setting the VSEL pin low or high, respectively. Low input noise, low quiescent current, and low external parts count make the LTC3225 ideal for small, battery-‐powered applications. With its special design, the LTC3225 maintains relatively constant input current form the lowest possible input noise. Automatic cell balancing ensures that overcharging cannot occur and maintains equal voltages across each supercapacitor (selectable to 2.4 V or 2.65 V). The charging current is also programmable up to 150 mA, and a very low 20 µA quiescent current [14]. When sufficient energy is available and being harvested it is delivered from the linear regulator which outputs a programmed voltage of 3.3 V based off of minimum voltage and current values collected by the receiving antenna and rectified through the rectification subsystem. This voltage is first supplied to the regulated dual cell LTC3225 Supercapacitor Charger chip. The chip provides charge current to a set of two 1 F supercapacitors in series and regulates a programmed constant voltage charge of 4.8 V across the supercapacitors. After they have been charged, the output voltage of the linear regulator is supplied directly to the embedded system that performs a nominal task such as blinking an LED. The linear regulator is programmed to output a constant voltage of 3.3 V, contingent upon sufficient energy available, in order to protect the integrity of the LTC3225 as well as the embedded system. At times when the energy available is too low, the LTC3225 acts as a backup power supply for the embedded system. When insufficient energy is being harvested, the linear regulator enters shutdown mode, thus removing the input voltage to the LTC3225. With the input supply to the supercapacitor charger eliminated, the LTC3225 enters a low current state, drawing less than 1 µA from the supercapacitors which have already been charged. At this point the LTC3225 begins to discharge the 4.8 V fixed output voltage from the charged supercapacitors where it is then output to the embedded system. The design team is using two supercapacitors in series both at a value of 1 F. Along with these supercapacitors, the charger chip configuration includes a ceramic flying capacitor of 1 µF that is low equivalent series resistance (ESR) which controls the strength of the charge pump and a 0.22 µF capacitor. Other components include a 60.4 k ёŽŶƚŚe charging current programming pin which sets the input charging current at a lower value, a 100 k ёƉƵůů-‐up resistor, and two BAT63-‐07WE6811 Schottky diodes [15]. All components were soldered to a demonstration board from Linear Technology to ensure that everything was functioning properly during the testing phase since it was virtually impossible to test the chip due to its 3 mm x 2 mm dimensions and DFN (Dual Flat No-‐Lead) packaging. The following figure shows the energy storage subsystem with the LTC3225 Supercapacitor Charger integrated with the DC1220B Demonstration Board.
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Figure 27. Energy storage and distribution subsystem
System Analysis Results The overall secondary subsystem is designed to be integrated between the DC1220B Demonstrations Board (3 in x 3 in dimensions) and the self-‐fabricated printed circuit board that includes the antenna and rectification subsystems connected with rubber spaces at the corners. The first board is the demo board with the LT3225 Supercapacitor Charger at the center with exposed pad (Pin 11) soldered to a low impedance ground plane for optimal thermal performance. Only specific electrical components mentioned in earlier paragraphs are used in the integration of the LTC3225 and demonstration board with those accompanying components soldered to the board as in the following figure:
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Figure 28. LTC3225 demonstration board configuration [15]
The second board is a through hole printed circuit board made of RT/duroid© 5880 High Frequency Laminate which the team self fabricated. This PCB was designed to have the voltage regulator mounted on it with a jumper wire connecting it to the LTC3225 and a jumper wire connecting the rectification circuitry to the LTC3225 demo board. Along with the linear regulator, the rectification circuitry as well as the embedded system is designed to be mounted on this board with the receiving antenna on the same side of this board. In the final design, the product package contains the two boards stacked upon one another in multiple PCB layers.
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6 - Embedded System An 8-‐bit PIC flash microcontroller was selected during the Critical Design Review phase as the attached embedded system that would be powered by the RF energy harvesting system. However, due to additional technical issues with integrating this microcontroller into the final design, the team made the decision to merely bypass the microcontroller and directly power a light emitting diode instead. This change did not affect the final success toward meeting the stated project outcomes. Furthermore, with additional time to overcome some technical challenges not initially realized, the team’s final developed system could still be integrated with the selected microcontroller.
During the Critical Design Review phase, care was taken to select the most simplistic microcontroller, as well as one with a wide operating voltage range. The team decided that a Microchip PIC10F202 flash microcontroller would be ideal. The device uses a Harvard architecture, and the microcontroller can be programmed using either C or assembly language. Microchip provides a development platform, including a C compiler. This software could be used to program the microcontroller’s flash memory to power an attached LED, although a programmer chip would probably be required. All relevant specifications for the microcontroller that was selected can be found in Table 9 below. Appendix C also contains additional specifications for the microcontroller. Table 9. Microchip PIC10F202 Flash Microcontroller Specifications
Specification Description
Specification Value
Operating Voltage Range
2.0 V – 5.5 V
Operating Current
< 175 µA
Standby Current
100 nA
Maximum Operating Speed
4 MHz Internal Oscillator
Number of I/O Pins
4
Flash Program Memory
512 bytes
Data Memory
24 bytes
Package
6-‐pin SOT-‐23 (3 lead plastic surface mount)
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7 – Personnel In order to adequately meet the specified project goals, three team members were selected. Although all three individuals have similar educational backgrounds, each team member brings a distinct set of technical interests and skills to the project group. As a result, each team member was primarily accountable for specific portions of the design, although each team member spent considerable time working on each of the subsystems. Below is a brief description of each team member’s educational background, as well as the specific responsibilities he was assigned throughout the project. Please note that Hanner Hart’s area of responsibility was changed to Energy Storage Specialist, and Michael Sass’s area of responsibility was changed to Antenna Specialist. This change was made after the Preliminary Design Review due to the formal coursework with applied electromagnetics. Energy Storage Specialist: Hanner Hart Hanner Hart has a very strong background in the area of hardware development. He has demonstrated firm skills in hardware related coursework as well as shown a propensity for the design and analysis of electronic circuits. Some of Hanner’s coursework has included electronic circuit design, electrical power, systems logic design, communication principles and circuits, applied mathematics, as well as signals and systems where he showed a firm understanding of conceptual and tangible concepts. His skills in these areas include computer simulation, principles in electricity and magnetism, and communication theory. Hanner has been assigned the primary responsibility of designing and testing the energy storage and distribution subsystem, although helped in the design and fabrication of each subsystem. A resume for Hanner can be found in Appendix A. Hardware Developer: Kelty Lanham
Kelty Lanham is a senior-‐level Electrical Engineering student at the University of San Diego. He has had great success in hardware design as well as software development. Kelty has had success in hardware related coursework as well as in lab sessions and design projects. He has shown a particular aptitude for designing circuits incorporating amplifiers, filters and logical systems. His skills include computer simulation design as well as discrete circuit implementation and testing. Kelty has experience from previous design projects including designing a thermostat circuit and digital alarm clock. He is also proficient in assembly language and VHDL programming languages, and, as a result, has been in charge of the programming needs within the project. For these reasons, Kelty was chosen as the hardware designer. He has been primarily responsible for the design, testing, and integration of the advanced rectification circuit, although helped in the design and fabrication of each subsystem. h A resume for Kelty can be found in Appendix A. 44
Antenna Specialist: Michael Sass
Michael Sass has a strong interest in digital and analog communications systems, as well as signal processing techniques. Michael has developed a strong theoretical background in applied mathematics and electromagnetics. He also has a firm understanding of the analysis and design of analog filters and amplifiers, as well as digital logic devices. As a licensed Extra Class Amateur Radio Operator, Michael has developed practical experience in building and testing antennas and related communications equipment. One of his main strengths continues to be his high level of work ethic and ability to work well within a team, both as a leader and follower. As a result of these specific interests and skills, Michael was assigned primary responsibility for designing and testing the antenna subsystem. Michael has been accountable for ensuring successful integration of the antenna subsystem with the remaining subsystems, although helped in the design and fabrication of each subsystem. A resume for Michael can be found in Appendix A.
8 – Test Plan Due to the complexity level of the RF harvesting system design relative to the experience level of the design team, it was of paramount importance that the test plan was developed in such a way that each primary subsystem was tested separately before attempting integration. As a result, the following test plan includes a detailed overview of all stages of testing that were conducted for both primary subsystems. Moreover, a detailed plan for how to begin testing and integration of the secondary subsystem is overviewed, as well.
Antenna Subsystem Testing Stage 1: Microstrip Patch Antenna Simulation Before attempting construction of the microstrip patch antenna, Ansoft Designer SV was used to optimize the dimensions of the antenna. This ensured that the theoretical calculations that were made regarding the antenna dimensions actually yielded the desired antenna design specifications. Please reference the Antenna Subsystem section for detailed information on all simulation results that were attained. It is important to note that although the Ansoft Designer SV is a powerful tool for verifying theoretical calculations and the feasibility of the antenna design specifications, the majority of the time testing the antenna subsystem should be during, and after, actual construction of the patch antenna. For example, the dimensions of the ground plane have a major effect on the desired design specifications. However, varying the ground plane dimensions using Ansoft Designer SV is not ideal. All results that were obtained from Stage 1 testing can be found in the section titled Primary Subsystem I – Antenna Subsystem.
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Stage 2: Construction of Microstrip Patch Antenna Construction of the microstrip patch antenna was completed in April. Basically, the radiating patch was cut out of the top layer of electrodeposited copper foil on the RT/duroid substrate and matched to the precise dimensions that were calculated and simulated. A band saw was used to actually cut the antenna pattern out of the material. Two microstrip patch antennas were built simultaneously. One of the antennas was used as a transmitting antenna. This antenna was placed on a non-‐conductive plastic backing for mechanical stability. Furthermore, using magnet wire and some basic connectors, the transmitting antenna can be fed directly into laboratory test equipment. The second antenna was used as the receiving antenna, although the team decided to incorporate the antenna subsystem directly onto the printed circuit board. As a result, the initial receiving antenna that was made was not used in the final device. At the time of this writing, we are still in the process of finishing construction of the final printed circuit board results. The addendum to this report will contain more specific information about the final receiving antenna. Unfortunately, the laboratory test equipment available in the Department of Engineering will not easily allow for generating a 3.25 GHz source signal. However, Dr. Ernest Kim, Associate Professor of Electrical Engineering at USD, has given the design team permission to use the following two pieces of test equipment: HP 8756A Scalar Network Analyzer HP 8620C Sweep Oscillator Data sheets for these two testing devices can be found in Appendix C. These two devices allow the team to generate a 3.25 GHz signal to effectively test the antenna subsystem. A basic conceptual overview of the testing configuration can be seen below in Figure 29. The transmitting antenna’s coax feed will be inputted into the network analyzer.
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Transmitting Antenna
Receiving Antenna Figure 29. Antenna Subsystem Generic Test Setup [17]
The distance the receiving antenna will be from the transmitting source will be varied to attempt to reproduce the input voltage specification for the rectification circuitry, as well as the conditions that were realized through the Broadband Spectrum Survey data. The theoretical output characteristics for both of these two extremes can be found below in Table 10. Table 10. Proposed Testing Conditions and Theoretical Results
Conditions Required for Minimum Design Specifications
Conditions Required to Mimic Broadband Spectrum Survey Data
Antenna Output Power
2.66 mW
1.38 W
Antenna Output Voltage
0.52 V
3.5 V
Power Density
0.968 W/m2
50.20 W/m2
Distance from Transmitting Source
1.0 m
0.15 m
Transmit Power
3.0 W
3.5 W
The receiving antenna will also be rotated and the directivity of the antenna will be determined. From these measurements, a radiation pattern for the antenna can be compared against the radiation pattern that was generated in Ansoft Designer SV. To date, these calculations have not been performed as the team is still in the process of fabricating our final printed circuit board. Detailed information about antenna testing will be included in the addendum discussed above. 47
Stage 3: Integration with Rectification Circuitry As described above, the team decided to produce a printed circuit board that fully integrates the antenna subsystem with the rectification subsystem. The team initially underestimated the complexity of dealing with high frequency circuit design, so it has taken many iterations of our printed circuit design. The major integration issue with inputting the antenna directly into the rectification circuitry is matching the impedances on the transmission line coming off of the receiving antenna. The team plans to use a stub to correct any issues that might arrive during final construction and testing. Information regarding integration issues between these two subsystems will also be included in the report’s addendum.
Rectification Subsystem Testing Stage 1: Simulate simple circuit To begin testing the rectification subsystem, National Instruments’ Multisim 10.1 will be used. This software is available to the team in the Loma 207 laboratory and all team members have extensive knowledge of the program from previous labs. In Multisim’s library are all the components that will be used for designing the rectification circuit. Multisim allows for a variety of testing, including voltage, current and transient analysis, all of which will be used in this phase of the design. First, a simpler variant of the design will be tested at a lower frequency. This is to prove that the design, in essence, will be effective. A five-‐stage charge pump will be tested at 10MHz. The output voltage and current will be measured as well as performing a transient analysis. These values will then be compared against the simulated input power to obtain the efficiency of the system. See Figure 30 for simulation of five-‐stage charge pump.
48
Figure 30. Simulation of 5-‐Stage Charge Pump
Stage 2: Breadboarding Five Stage Charge Pump The next stage is to breadboard the circuit that was simulated above. The most important reason for this is to assure that the calculations done on the computer are accurate and depict how the system will operate. Another important reason to breadboard this simple circuit is to gain better understanding of how the system operates. By being able to easily switch out components and see the effects on the Oscilloscope, the team gains a better understanding of what each component does in the system and how they all interact. To do this testing an Agilent 33250A Function Generator and MSO6012A Oscilloscope were used. See Figure 31 below for the oscilloscope results from the test.
Figure 29. Oscilloscope Results of 5-‐Stage Charge Pump
49
Stage 3: Simulate and Test Seven Stage Charge Pump Stage three of testing the rectification circuit is simply to repeat stages one and two for the seven stage charge pump operating at 3.25 GHz. This is the most important stage of testing since it is the most important part of this subsystem. The major challenge of the rectification subsystem is designing the circuit itself. Multisim will be used just as in stage one to simulate the circuit and to perform the transient analysis. Then the circuit will be assembled and directly connected to a 500 mV input operating at 3.25 GHz. Stage 4: Integration After the rectification circuit is fully tested on its own, it can be integrated into the rest of the overall system. First it will be tested with the LT1965 linear regulator. This testing will input a variety of voltages into the rectification circuit and ensure that the output of the LT1965 is a constant 3.3 V. Next the LT3225 and its’ output will be connected. This test will ensure that the rectification circuit can provide enough power to pass through the components and power the output. Lastly the system will be integrated with the antenna and tested using intentional transitions.
Energy Storage and Distribution Subsystem Testing After selecting the LTC3225 as the optimal means of providing a constant voltage across the supercapacitors, the team realized that the chip was only commercially available in a DFN package. This packaging is made for mass production, and, as a result, is not conducive for easily testing in a laboratory setting at low quantities. However, after talking with a Linear Technologies representative, the team was able to receive a demonstration board free of charge. Unfortunately, the team realized early on that there was a threshold to the amount of testing that could be accomplished on the energy storage and distribution subsystem. This threshold was based on the success of the testing of the other two primary subsystems. As a result, all three team members focused primarily on constructing and testing the two primary subsystems. Due to the immense technical difficulties encountered with constructing and testing the two primary subsystems, only initial testing of the energy storage and distribution subsystem was undertaken. Since the energy storage and distribution subsystem is not essential to the overall operation of the RF energy harvesting device, the team decided collectively to focus completely on ensuring that the two primary subsystems would be integrated properly. Nonetheless, the team is still confident in the actual design of the energy storage and
50
distribution subsystem. With more time, integrating this secondary system with the two primary subsystems is entirely possible.
9 – Design Schedule
Based on specific design requirements and a timeline given for the final project, a detailed design schedule along with Gantt charts gives a fairly accurate agenda for the full two semesters of the Senior Design and Practice course. These Gantt charts were originally made during the Fall semester, and the team’s progress in achieving these goals has been continuously monitored by the course instructor during weekly progress reports. The preliminary design stages spanned the full length of the Fall 2008 semester while the final design stages lasted throughout the Spring 2009 semester. This detailed design schedule shows reasonably accurate time requirements in order to complete certain critical phases of the design. The preliminary design review phase was mostly completed on schedule. The only two goals that were not met during the preliminary design phase were choosing the specific supercapacitor values and ordering all components. It was not known at the time these goals were written (early in the fall semester) that a range of supercapacitor values would be tested, and a final value would not be selected until after the Critical Design Review. Furthermore, it was also not understood that the design would take many iterations before reaching the point of being able to purchase parts. However, we are currently at the end of the design and still have some portions of the project that have not been completed. During the spring semester, the design team spent the months of January and February behind schedule. The team did not anticipate the breadth and depth of the technical challenges that this project proposed, nor did the team realize the amount of technical background knowledge in analog circuit design and antenna theory that would be necessary to complete the final design. However, by the time of submission of the Critical Design Review, the team has dedicated much time to ensuring the design provides a solid foundation to begin construction and testing. After the Critical Design Review, the team realized that some of the goals set were unattainable due to the lack of time. Therefore, it was decided to focus in primarily on the two primary systems, the antenna and rectification circuit. This was decided upon because if completed, it would show the proof of concept. All three team members concentrated on the two primary systems to ensure their completion. The secondary systems were put on hold until the primary systems were complete. In the addendum, the team will discuss any progress that is made with the secondary systems. The Gantt charts that the team developed at the beginning of the fall semester, as well as the team’s progress in satisfying each goal, has been included on the next two pages in 51
Figures 36 and 37, respectively. Figure 36 includes an overview of the fall semester (Proposal Stage and Preliminary Design Review), and Figure 37 includes an overview of the spring semester (Critical Design Review and Final Design).
52
Figure 30. Gantt Chart for Fall Semester
53
Figure 31. Gantt Chart for Spring Semester 54
10 – Budget
The following table contains updated cost estimates for the design, development, and construction of the RF energy harvesting system. Table 11. Critical Design Review Updated Budget
Rectificatio n Subsystem
Energy Storage / Distribution Subsystem
Cost per Unit
Total Cost
$0.00
$0.00
Ansoft Designer SV Software
1
$0.00
$0.00
BAT63-‐07WE6811 Schottky Diodes
50
$0.77
$130.55
Linear Technology LT1965 Linear Regulator
5
$3.14
$15.70
MA0603XR-‐561K-‐500PR 560 pF Capacitor
50
$0.05
$2.50
Capacitors (Various)
15
N/A
$5
Linear Technology LTC 3225 Supercap Charger
4
$2.86
$11.44
Linear Technology LTC 3225 Demo Board
1
N/A
$0
Various Supercapacitors
8
N/A
$30
Capacitors (various capacitances)
22
N/A
$10
Resistors (various resistances)
20
N/A
$2
Microchip PIC10F202 Flash Microcontroller
5
$0.57
$2.85
Light Emitting Diode
5
$0.30
$1.50
Printed Circuit Board Fabrication Materials
5
N/A
$176.19
2
Total Shipping Costs To Date. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
$85.19
Total Tax To Date. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
$18.94
Miscellaneous
Quantity
RT/duroid© 5880 High Frequency Laminate
Sub
Ant enn a
Description of Cost
Total Cost Estimate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $491.86
55
Please note that the team was able to receive complimentary samples of the high frequency laminate from Rogers Corporation for use in constructing the antenna subsystem and the final printed circuit board. A demonstration board for the LTC 3225, which is regularly $125, was also donated to our group from Linear Technology for educational purposes. The cost estimate for these items reflects the great opportunities that our group was able to capitalize on. During the fall semester, SAIC reviewed the preliminary cost estimate that was included with the original Proposal and verbally agreed to fund the project up to our original cost estimate of $700. However, at the completion of the project, the team only spent $491.86. At the completion of the project, the design team lowered the project’s final cost from the Critical Design Review budget due to a more comprehensive understanding of the individual costs associated with purchasing components, as well as due to our decision to self-‐fabricate our own printed circuit boards. Since a larger funding commitment was not probable at the conclusion of the fall semester, the team applied at the start of the spring semester for a research grant from the University of San Diego’s Associated Students. The team was awarded additional funding from Associated Students. However, at the time this additional funding became available, the team did not feel that it was required. As a result, the funding was declined.
56
REFERENCES [1] Rahmel, Ronald S. and Gerald C. Gerace. Method and System for Energy Reclamation and Reuse. United States: Patent US 7268517 B2. 11 September 2007. [2] Shearer, John G., Charles E. Greene and Daniel W. Harrist. POWERING DEVICES USING RF ENERGY HARVESTING. United States: Patent PCT/US2006/021940. 14 December 2006. [3] Vujovic, Dr. Ljubo. Tesla Memorial Society of New York. 10 July 1998. 7 December 2008 . [4] Espejel, Juventino Delfino Roas. "RF to DC Power Generation." Master of Science Dissertation. University of Maryland, 2003. [5] Upson, Sandra. "Putting Wireless Power to Work." IEEE Spectrum June 2008. [6] Silver, J. P. (n.d.). Micro-‐strip Patch Antenna Primer. Retrieved February 22, 2009, from RF, RFIC & Microwave Theory, Design: http://www.zen118213.zen.co.uk/ [7] Moernaut, D. O. (n.d.). The Basics of Patch Antennas. Retrieved February 22, 2009, from Orban Microwave Products: http://www.orbanmicrowave.com/ [8] Microstrip patch antennas. (2008, January 5). Retrieved February 22, 2009, from Microwave
Encyclopedia: http://microwaves101.com/encyclopedia/antenna_ustrip.cfm [9] Frank H. Sanders, B. J. (1996). Broadband Spectrum Survey at San Diego, California. Institute
for Telecommunication Sciences. [10] Theory: Near-‐Field and Far-‐Field. Retrieved March 1, 2009, from Lulea University of Technology: http://www.sm.luth.se/~urban/master/Theory/3.html [11] Pylarinos, L. (2006, May 25). Charge Pumps: An Overview. University of Toronto, Canada. Retrieved from University of Toronto. [12] Tecate Group. (n.d.). Tecate Ultracapacitor Solutions. Retrieved March 1, 2009, from Ultracapacitor Solutions Home: http://www.tecategroup.com/ultracapacitors/ultracapacitors.php [13] Buchmann, Isidor. What's the Role of the Supercapacitor? July 2003. 3 November 2008 . [14] Linear Technology. (2008). LTC3225 150mA Supercapacitor Charger. Retrieved March 1, 2009, from Linear.com: 57
http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1042,C1098,P 84365,D26420 [15] Linear Technology. (2008, July 23). DC1220B Quick Start Guide -‐ LTC3225EDDB Low Profile Regulated Dual Cell SuperCAP Charger. Milpatas, California, United States of America. [16] Intel. (2000). Leaded Surface Mount Technology (SMT). Retrieved March 1, 2009, from Intel.com: http://www.intel.com/design/packtech/Ch_07.pdf [17] Zibrat, T. (2002, March 21). Test Results -‐ Round 2. Retrieved March 2, 2009, from K3TZ Ham Radio Experimentation Page: http://www.qsl.net/k3tz/
58
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix A
Resumes Hanner Hart Kelty Lanham Michael Sass
59 k
HANNER HAZEN HART 3665 PAUL JONES AVE. Ƈ SAN DIEGO, CA 92117 (208) 447-9919 [email protected] EDUCATION University of San Diego, San Diego, CA BS/BA in Electrical Engineering Minor in Mathematics
GPA: 2.99/4.0 Major GPA: 3.21/4.0 Expected Graduation: May ‘10
Relevant Coursework
Electrical Power Systems Logic Design (VHDL) Digital Logic Design Programming Circuits Communication Principles and Circuits
Microcomputers (8051) Electronics Signals & Systems Applied Mathematics Probability and Statistics Control Systems
DESIGN EXPERIENCE Microprocessor Fall ‘07 Designed and Analyzed a microprocessor with an Intel 8051 microcontroller. Programmed to act as a Digital Thermostat which analyzed and controlled temperature. Built the microprocessor from scratch, including soldering all chips. Digital Alarm Clock Spring ‘08 Designed alarm clock using a Xilinx Spartan 3-E FPGA . Programmed the design using Xilinx ISE Design Suite. Design featured accurate time and available alarm clock. Nifty Project Spring ‘06 Designed an automatic Golfing Tee using Nifty electric motors and parts. WORK EXPERIENCE University of San Diego San Diego, CA Computer Lab Assistant January ’06-Present Assisted students in Computer lab with Microsoft Word, Excel, and PowerPoint Documents. Helped students with their homework assignments. SKILLS
Computer Skills MATLAB MathCAD Maple C/C++
Electronic Workbench (Multisim & Ultiboard) VHDL AutoCAD
AFFILIATIONS University of San Diego Collegiate Football ƒ Division 1AA Mid-Major National Champions
Microsoft Office (Excel, Word, PowerPoint) Assembly Language (8051 Architecture)
Fall ’05-Present 2005, 2006
1349 B Goshen St San Diego, CA, 92110
Phone 831.234.7089 E-mail [email protected]
Kelty Lanham Education
[ September 2005-Present ]
University of San Diego
BA/BS Electrical Engineering/ Math Minor Expected Graduation: May 2010 Relevant Coursework
Electrical Power Systems Logic Design (VHDL) Digital Logic Design Applied Mathematics Programming Communication Principles and Circuits Microcomputers Electronics Signals & Systems Control Systems
Interests and activities
NROTC- Aug 2005-Present Future plans on entering the Navy to become a Naval Aviator.
Work experience
[ June-Aug 2004, 2005,2006 ]
Parreira Almond Processing Co Los Banos, CA
Electrical Engineer Assistant Working hand in hand with an electrical engineer to rewire and maintain the plant. Inc running/pulling wire, wiring motors, setting up controls, etc. [ June-‐Aug 2007 ] Moore and Sons Marine Engine Repair Santa Cruz, CA Assistant Mechanic
Worked with a mechanic to repair marine inboard, outboard and stern-‐ drive engines. [ Oct 2005-‐ Present ] USD Parking Services San Diego, CA
Parking Service Supervisor Supervised 22 people as well as office/administrative duties Security clearance
Available upon request
Michael D. Sass Phone: (952) 292-6369
5998 Alcalá Park Unit 6130 • San Diego, CA 92110
Email: [email protected]
Education University of San Diego, San Diego, CA BS/BA in Electrical Engineering Minor in Mathematics
GPA: 3.97 / 4.00 Expected Graduation: Dec ’10
Select Coursework (through Fall 2008) Applied Electromagnetics, Electrical Power, Communication Principles & Circuits, Electronics, Systems Logic Design (VHDL), Signals and Systems, Fourier Methods and Wavelets in Signal Processing, Microcomputers (8051),
Design Experience Digital Alarm Clock Project ƒ Designed around a Xilinx Spartan 3-E FPGA platform ƒ VHDL written using Xilinx ISE Design Suite
Spring 2008
Digital Thermostat Project ƒ Intel 8051 used to analyze and control temperature ƒ RS-232 compatible serial port and LCD display provided user interface ƒ DC motors simulated heating/air conditioning subsystems ƒ $VVHPEO\ODQJXDJHSURJUDPPLQJZULWWHQXVLQJ.HLOȝ9LVLRQ
Fall 2007
Work Experience University of San Diego San Diego, CA Mathematics Department Grader September ’06 – Present ƒ Grade sections of Calculus II & III, Differential Equations, and Applied Mathematics II
Skills ƒ C/C++ ƒ Electronics Workbench (Multisim & Ultiboard) MATLAB, Mathcad, & Maple
ƒ Assembly Language (8051 Architecture) ƒ VHDL ƒ AutoCAD
Awards & Affiliations Institute of Electrical and Electronics Engineers ƒ Outstanding EE Junior at USD [2008] ƒ Outstanding EE Sophomore at USD [2007] ETA KAPPA NU – Electrical and Computer Engineering Honor Society ƒ Member [Spring 2008 – Present] Naval Reserve Officers Training Corps, San Diego Consortium ƒ Company Executive Officer [Spring 2008] ƒ Platoon Commander [Fall 2007] Federal Communications Commission ƒ Licensed Extra class amateur radio operator [2006 – Present] k 2
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S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix B
Calculations – Matlab Code Main Code Functions: Microstrip Patch Antenna Dimensions Power Density Lab Testing Conditions
k 3
Main Code %S Band RF Energy Harvesting Team %February 18, 2009 %We have decided to create a microstrip patch antenna array in our project %This code will determine the relevant design specifications for a single %element of the antenna and ground plane (i.e. substrate) clear all %Input Specifications: %Operating Frequency = 3.25 [GHz] freq = 3.25E9; %Dielectric Constant of the ground plane substrate %Typical PCB = 4.6 +/- 0.2 dielectric = 4.6; %Height Above Substrate height_in_mm = 1.5; %[meters] height = height_in_mm * 1E-3; %Function to compute antenna / ground plane dimensions [antennaWidth, actualLength,lengthGroundPlane,widthGroundPlane] = antennaCalculations(freq,dielectric,height); stringWidth = sprintf('The microstrip patch antenna array element width is %d [mm]', antennaWidth); stringLength = sprintf('The microstrip patch antenna array element length is %d [mm]', actualLength); stringGroundWidth = sprintf('The ground plane (substrate) width is %d [mm]',widthGroundPlane); stringGroundLength = sprintf('The ground plane (substrate) length is %d [mm]',lengthGroundPlane); disp(stringWidth) disp(stringLength) disp(stringGroundWidth) disp(stringGroundLength) %Function to compute power density from Broadband Spectrum Survey powerIn_dBm = 20; %Gain [dBi] of Broadband Spectrum Survey equipment Gain = 3; powerDens = PowerDensity (freq, powerIn_dBm, Gain); stringPD = sprintf('The calculated power density is %d [W/m^2]', powerDens); disp(stringPD) %Gain of microstrip antenna [dBi] gainMicrostrip = 6; %Input antenna impedance = 75 [ohms]
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impedanceInput = 75; [voltageInput, powerInput, areaEffective] = InputVoltage (freq, powerDens, gainMicrostrip, impedanceInput); stringPowerInput = sprintf('The power input using Broadband Spectrum Survey data is %d [W]',powerInput); stringVoltageInput = sprintf('The voltage input Using Broadband Spectrum Survey data is %d [V]',voltageInput); disp(stringPowerInput) disp(stringVoltageInput) %Lab Setting Conditions %Gain of transmitter in dBi gainTransmitter = 15; %Power is expressed in watts powerTransmitter = 4; %Radius of harvesting antenna from transmitter [meters] radiusFromTransmitter = 0.45; [LabInputVoltage, LabInputPower, LabPowerDensity] = LabConditions (freq, impedanceInput, areaEffective, gainTransmitter, powerTransmitter, radiusFromTransmitter); stringLabPowerInput = sprintf('The power input using lab test conditions is %d [W]',LabInputPower); stringLabVoltageInput = sprintf('The voltage input using lab test conditions is %d [V]',LabInputVoltage); stringLabPowerDensity = sprintf('The power density using lab test conditions is %d [W/m^2]', LabPowerDensity); disp('') disp(stringLabPowerInput) disp(stringLabVoltageInput) disp(stringLabPowerDensity) %To mimic Broadband Spectrum Survey data at 3.25 [GHZ], transmit 4 [W] at a distance of 0.45 [m] %Military Operational Conditions %AN/SPY-1/D Radar (AEGIS Combat System) %Gain of transmitter in dBi gainTransmitter_M = 25; %Power is expressed in watts powerTransmitter_M = 4e6; %Radius of harvesting antenna from transmitter [meters] radiusFromTransmitter_M = 1000; [LabInputVoltage_M, LabInputPower_M, LabPowerDensity_M] = MilitaryConditions (freq, impedanceInput, areaEffective, gainTransmitter_M, powerTransmitter_M, radiusFromTransmitter_M); stringLabPowerInput_M = sprintf('The power input using military conditions is %d [W]',LabInputPower_M); stringLabVoltageInput_M = sprintf('The voltage input using military conditions is %d [V]',LabInputVoltage_M); stringLabPowerDensity_M = sprintf('The power density using military conditions is %d [W/m^2]', LabPowerDensity_M);
k 5
disp('') disp(stringLabPowerInput_M) disp(stringLabVoltageInput_M) disp(stringLabPowerDensity_M) %MQ-1 Predator Drone wing surface area = 11.5 [m^2] - See Wikipedia %Single patch surface area: 27 [mm] x 20 [mm] = 540 [um] %Assuming you could cover 75% of wing with patch antennas, you could have 16,000 patch antennas %Your input power to the system would be 16,000 * 0.2717 [W] = 4.34 [kW] at a distance of 1 [km] from transmitter %Increase the dielectric constant, you can decrease the patch element dimenions = more antennas = more power harvested!
Functions Microstrip Patch Antenna Dimensions %February 18, 2009 %Fucntion to determine dimensions of antenna and ground plane for %microstrip patch antenna element function [antennaWidth, actualLength,lengthGroundPlane,widthGroundPlane] = antennaCalculations(freq,dielectric,height) %Speed of Light [m/s] c = 3.0E8; %Antenna Width [meters] width = c/(2*freq*sqrt((dielectric+1)/2)); %Antenna Width [mm] antennaWidth = (width*1000); %Effective Dielectric Constant dielectricEffective = (dielectric+1)/2+((dielectric-1)/2)*(1+12*(height/antennaWidth))^(1/2); %Effective Length [meters] lengthEff = c/(2*freq*sqrt(dielectricEffective)); %Effective Length [mm] lengthEffective = (lengthEff *1000); %Length Extension [meters] intermed = 0.412*height; top = (dielectricEffective+0.3)*((antennaWidth/height)+0.264); delta = (intermed*top/((dielectricEffective-0.258)*((antennaWidth/height)+0.8))); %Length Extension [mm] deltaLength = (delta*1000); %Actual Length of Patch Antenna actualLength = (lengthEffective - 2*deltaLength);
%Ground Plane (Substrate) Dimensions
k 6
lengthGroundPlane = (6*height +actualLength); widthGroundPlane = (6*height +antennaWidth); end
Power Density %This function will return the power density when given the input power to %a system and an antenna's effective area function [powerDens] = PowerDensity(freq, powerIn_dBm, Gain) c= 3.0e8; powerInWatts = 1e-3*10^((powerIn_dBm)/10); wavelength = (c / freq); powerDens = (4*pi*powerInWatts)/((wavelength^2)*Gain); end
Lab Testing Conditions %This function will compute the input power/voltage to our system for the given lab testing conditions function [InputVoltage, InputPower, PowerDensity] = LabConditions (freq, impedanceInput, areaEffective, gainTransmitter, powerTransmitter, radiusFromTransmitter) gainDimensionless = 10^(gainTransmitter/10); PowerDensity = (powerTransmitter*gainDimensionless)/(4*pi*radiusFromTransmitter^2); InputPower = (PowerDensity*areaEffective); InputVoltage = sqrt(InputPower*impedanceInput); end
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S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix C
Component Data Sheets Antenna Subsystem Rogers Corporation RT/duroid© 5880 Rectification Subsystem 5082-‐2835 Schottky Diode LT1965 Linear Regulator MA0603XR-‐561K-‐500PR 560 pF Capacitor Energy Storage and Distribution Subsystem LTC3225 Supercapacitor Charger PIC10F200 Test Equipment HP 8756A Scalar Network Analyzer HP 8620C Sweep Oscillator k
8
Advanced Circuit Materials Division 100 S. Roosevelt Avenue Chandler, AZ 85226 Tel: 480-961-1382, Fax: 480-961-4533 www.rogerscorporation.com
Advanced Circuit Materials
D a t a S h ®
RT/duroid 5870 /5880 High Frequency Laminates
k
9
forced PTFE composites are designed for exacting stripline and mi crostrip circuit applications. Glass reinforcing microÀEHUVDUHUDQGRPO\RULHQWed to maximize beneÀWVRIÀEHUUHLQIRUFHPHQWLQWKH direc tions most valuable to circuit producers and in the ÀQDOFLUFXLWDSSOLFDWLRQ The dielectric constant of RT/duroid 5870 and 5880 laminates is uniform from panel to panel and is constant over a wide frequency range. Its low dissipation factor extends the usefulness of RT/duroid 5870 and 5880 to Ku-band and above. RT/duroid 5870 and 5880 laminates are easily cut, sheared and machined to shape. They are resistant to all solvents and reagents, hot or cold, normally used in etching printed circuits or in plating edges and holes. Normally supplied as a laminate with electrodeposited copper of ¼ to 2 ounces/ ft. WRǍP RQ both sides, RT/duroid 5870 and 5880 composites can also be clad with rolled copper foil for more critical electrical applications. Cladding with aluminum, copper or brass plate may also be speciÀHG 2
When ordering RT/duroid 5870 and 5880 laminates, it is important to specify dielectric thickness, tolerance, rolled or electrodeposited copper foil, and weight of copper foil required.
RT/duroid 5870 and 5880 glass microÀEHUUHLQ®
he information in this data sheet is intended to assist you in designing with Rogers’ circuit material laminates. It is not intended to and does not create any warranties express or implied, including any warranty of merchantability or ÀWQHVVIRUD particular purpose or thatthe results shown on this data sheet will be achieved by a user for a particular purpose. The user should determine the suitability of Rogers’ circuit material laminates for each application.
The world runs better with Rogers.®
k 10
®
Typical Values RT/duroid 5870/5880 Laminates
STANDARD THICKNESS: 0.005” (0.127mm), 0.031” (0.787mm) 0.010” (0.254mm), 0.062” (1.575mm) 0.015” (0.381mm), 0.125” (3.175mm) 0.020” (0.508mm),
STANDARD PANEL SIZE: 18” X 12” (457 X 305mm) 18” X 24” (457 X 610mm) 18” X 36” (457 X 915mm) 18” X 48” (457 X 1.224m)
STANDARD COPPER CLADDING: ¼ oz. (8 ȝP HOHFWURGHSRVLWHGFRSSHUIRLO òR] ȝP R] ȝP R] ȝP HOHFWURGHSRVLWHGDQG rolled copper foil.
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S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix D
Self-Fabrication of Printed Circuit Board – Detailed Procedure Developed April 25, 2009
k
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Self-Fabrication of Printed Circuit Board – Detailed Procedure Developed April 25, 2009 1. First, cut the copper clad board down to the desired size of the final printed circuit board. 2. Use Scotch Brite pads to clean off the copper board in conjunction with isopropyl solution (90% concentrate is preferred). Make sure entire board is defect free before continuing (i.e. no fingerprints, oxidation, glue, etc.). 3. Print the circuit board layout (from Ultiboard) onto a high gloss photo paper. It is important to use a laser jet printer and photo paper designed for a laser jet printer. It is desirable to cut the printed sheet down to a size slightly larger than the actual size of the final printed circuit board, as well. If the board contains a bottom layer, print a copy of that design out onto a separate piece of photo paper. 4. Place the high gloss paper over the copper layer. If a second layer exists, place that piece of paper over the bottom of the board. Place tape between the board and the high gloss paper. Only place tape on a portion of the copper board that will not have any traces or components. The tape will ensure that the high gloss paper does not move during the heating process. 5. Place a piece of regular paper on top of the gloss paper. Also place a piece of paper between the ironing surface and the copper board. Apply an iron set on the highest setting to the paper. Use the largest iron you can find, and make sure that no water is in the iron. 6. Apply the iron evenly across the entire board (i.e. move it around) with much pressure. Once you think you have applied it long enough, leave it on for a few more minutes to be sure. You want the entire toner ink to be transferred to the copper surface. This typically takes 20-‐30 minutes depending on the amount of toner that needs to be transferred from the paper to the board. 7. Place the copper board (and photo paper) into a tub of water. This will help loosen the paper from the copper board. Use a toothbrush to ensure that all paper is removed from the copper board. A large disposable Ziploc container can be used as the tub. 8. If there are some spots where the toner wasn’t fully transferred to the copper, use a fine tip Sharpie (or an etching pen) in those spots. The Sharpie has similar chemical properties as the toner. If large amounts of toner weren’t transferred, steps 1-‐7 will have to be repeated. 9. Place 1 part Muriatic Acid and 2 Parts Hydrogen Peroxide in another disposable Ziploc container. Place the Hydrogen Peroxide in the container first, and then add the Muriatic acid. Do NOT, under any circumstances, mix the solutions the other way around. Since Muriatic Acid is a toxic chemical, only mix the solutions in a location where the fumes can be vented, too. Do this outdoors if necessary. Also, you need approximately 1 oz. of Muriatic acid for 11 sq2 of 1 oz. 16
copper foil. Even though the acid will saturate quickly, do not use more than required. Use rubber gloves and safety glasses at all times while handling these chemicals. 10. Place the copper clad board in the etching solution and let it sit there for around 3-‐5 minutes. To speed up the etching process, use a sponge and rub the copper. You can heat the solution to around 100F to speed up the process, as well. 11. Note: It is important to ensure that portions of the copper that don’t have an etching on it should be cut off before placing in the solution. Large portions of copper that don’t have etchings will allow the chemical to reach the bottom layer and it could corrupt the entire process. 12. Once the etching process has been completed, remove the copper board and place in a tub of water. Leave in the water for approximately 5-‐10 minutes to ensure that all of the etching solution has been removed. 13. At this point, the only copper on the board should be where the toner was transferred onto the copper board. 14. Next, place the copper board in a solution of pure acetone (paint thinner). This process will remove the toner from the remaining copper. You might need to use a sponge/rag to rub off the toner. 15. Next, if available, use a Silicon Conformal Coating. This coating will prevent the PCB board from oxidizing. It will also reduce the chance of having cold solder joints. However, Silicon Conformal Coating typically takes 24-‐48 hours to fully dry. 16. Before soldering any chips, use a digital multimeter to check that there are no shorts between electrical connections on the copper traces.
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Engineering Programs 5998 Alcalá Park San Diego, CA 92110
10260 Campus Point Drive San Diego, CA 92121
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Final Design Review May 5, 2009 Submitted to: Dr. Thomas Schubert Professor of Electrical Engineering Submitted by: Hanner Hart, Kelty Lanham, and Michael Sass
Abstract The SAIC-‐sponsored team designed a system that harvests S-‐Band radio frequency energy and provides power for an 8-‐bit PIC flash microcontroller. The ultimate goal was to have the capability to capture ambient radio frequency energy from traditional S-‐Band transmission sources, such as shipboard radar systems and radiolocation devices. The final design contains two primary subsystems: a single non-‐radiating edge fed microstrip patch antenna and a 7-‐stage charge pump circuit utilizing S-‐Band Schottky diodes. The final design also contains a supercapacitor-‐based energy storage and distribution system, but this subsystem is not vital to the overall device operation. Due to the technical complexity of the design, only the primary subsystems were physically built. These two subsystems were constructed onto a self-‐fabricated printed circuit board using a unique process developed by the team. This report contains a detailed overview of the final design of the University of San Diego’s capstone senior design project. The contents of this report will meticulously discuss the final system design at the circuit diagram level, as well as detail all simulation and test results. The process used to develop the final printed circuit board, as well as the test results achieved with this device, are included as well. The team’s success at meeting the minimum project standards is fully discussed. Finally, an outgoing budget assessment detailing the financial status of the project is fully disclosed.
Important Notice:
At the time of preparing the Final Design Review, the team is still in the process of final construction and testing of the design. As a result, an addendum will be submitted no later than Friday at 2:00 pm detailing the team’s final progress toward construction and testing.
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Table of Contents 1 - Introduction ................................................................................................................................................. 6 Background .................................................................................................................................................................. 6 Survey of Existing Markets and Research .................................................................................................. 6 Potential of RF Energy Harvesting ................................................................................................................. 7 SAIC Interest in RF Energy Harvesting ........................................................................................................ 8
2 – Project Concept........................................................................................................................................ 9 3 – Functional Specifications ................................................................................................................. 10 Project Outcome ..................................................................................................................................................... 10 Design Specifications ........................................................................................................................................... 11
4 – Overview of Final System Design ............................................................................................... 12 Statement of Final Design Approach .......................................................................................................... 12 Statement of Final System Development ................................................................................................. 12
5– RF Harvesting Subsystems ............................................................................................................... 16 Primary Subsystem I -‐ Antenna Subsystem ........................................................................................... 16 Overview of Technical Description………….…….………..…………………………………………16 Design Approach…………………………………….…….………..…………………...……………………16 Technical Description……………………………….…….………..…………………………………………19 System Analysis Results………………………….…….………..…………………………………………22 Primary Subsystem II -‐ Rectification Subsystem ................................................................................ 27 Overview of Technical Description………….…….………..…………………………………………27 Design Approach…………………………………….…….………..…………………………………………28 Technical Description……………………………….…….………..…………………………………………30 System Analysis Results………………………….…….………..…………………………………………32 Secondary Subsystem -‐ Energy Storage and Distribution Subsystem ................................... 37 Overview of Technical Description………….…….………..…………………………………………37 Design Approach…………………………………….…….………..…………………………………………38 Technical Description……………………………….…….………..…………………………………………39 System Analysis Results………………………….…….………..…………………………………………40
6 – Embedded System ................................................................................................................................. 43 7 – Personnel.. .................................................................................................................................................. 44 8 – Test Plan…. ................................................................................................................................................. 45 9 – Schedule…. .................................................................................................................................................. 51 10 – Budget…….. .............................................................................................................................................. 55 3
References......... ................................................................................................................................................ 57 Appendices A B C D
Resumes Calculations – Matlab Code Component Data Sheets Self-‐Fabrication of Printed Circuit Board – Detailed Procedure
List of Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 Figure 28 Figure 29 Figure 30 Figure 31 Figure 32 Figure 33
Block Diagram of System ..................................................................................................... 9 Overall System Design ........................................................................................................ 14 Ultiboard Representation of Final System PCB Layout I ....................................... 15 Ultiboard Representation of Final System PCB Layout II ..................................... 15 Basic Model of an Edge Fed Patch Antenna ................................................................ 16 ITS Broadband Spectrum Survey Graph ...................................................................... 18 Two-‐Dimensional View of Microstrip Patch Antenna ............................................ 20 Three-‐Dimensional View of Microstrip Patch Antenna ......................................... 21 Antenna Return Loss vs. Frequency .............................................................................. 23 Antenna Swept Gain vs. Frequency ............................................................................... 23 Antenna VSWR vs. Frequency .......................................................................................... 24 Real Part of Antenna Input Impedance .......................................................................... 24 Imaginary Part of Antenna Input Impedance ............................................................ 25 Antenna Radiation Pattern ............................................................................................... 25 Smith Chart ............................................................................................................................. 26 Antenna Near Field Three-‐Dimensional Plot ............................................................. 26 Antenna Far Field Three-‐Dimensional Plot ................................................................ 27 Rectification Subsystem ..................................................................................................... 28 One-‐Stage Voltage Doubler ............................................................................................... 29 10 MHz Charge Pump Design ........................................................................................... 33 Transient Analysis for 10 MHz Charge Pump Design ............................................. 33 Bread Boarded Rectification Test Circuit .................................................................... 34 Oscilloscope Output for Rectification Test Circuit ................................................... 35 7-‐Stage Charge Pump Circuit Operating at 3.25 GHz .............................................. 36 Transient Analysis for 7-‐Stage Charge Pump at 3.25 GHz .................................... 37 Various Supercapacitors .................................................................................................... 38 Energy Storage and Distribution Subsystem Diagram ........................................... 41 LTC3225 Demonstration Board Configuration ......................................................... 42 Antenna Subsystem Generic Test Setup ...................................................................... 47 Simulation of 5-‐Stage Charge Pump .............................................................................. 49 Oscilloscope Results of 5-‐Stage Charge Pump ........................................................... 49 Gantt Chart for Fall Semester ........................................................................................... 53 Gantt Chart for Spring Semester ..................................................................................... 54 4
List of Tables Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11
Major Design Specifications ....................................................................................................... 11 Microstrip Patch Antenna Characteristics ......................................................................... 17 Patch Antenna Substrate Specifications .............................................................................. 19 Overview of Theoretical Antenna Specifications ........................................................... 19 Theoretical Rated Input Characteristics to Rectification Circuitry ..................... 20 Results from Simulation of Microstrip Patch Antenna ............................................... 22 Specifications of Rectification Components ...................................................................... 31 Supercapacitor Advantages and Disadvantages ............................................................ 39 Microchip PIC10F202 Flash Microcontroller Specifications .................................. 43 Proposed Testing Conditions and Theoretical Results .............................................. 47 Critical Design Review Updated Budget ............................................................................. 55
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1 – Introduction Within the curriculum of the Senior Design and Practice course at the University of San Diego, a traditional capstone design project providing a solution to a realistic problem must be completed. To satisfy this requirement, a device that harvests S-‐Band radio frequency energy and provides power to an embedded system was designed. This project was worked on by three Senior Electrical Engineering students: Hanner Hart, Kelty Lanham, and Michael Sass. Although sponsored by Science Applications International Corporation (SAIC) and loosely based on a United States Patent [1] assigned to SAIC, all of the design work has been completed within the laboratory facilities at the University of San Diego. Dr. Gerald C. Gerace, an SAIC Deputy Division Manager within Division 048, acted as mentor and principle project advisor. Mr. Ronald Rahmel and Mr. Andrew Spector also advised the undergraduate team. Funding for the project up to the amount of $700 was approved by the Manager of SAIC’s Division 048, Dr. Steven P. Auerbach. A research grant proposal was submitted to the University of San Diego’s Associated Students and approved. However, due to the team remaining under budget, this additional funding was not needed.
Background Within the past decade, a wide range of wireless devices have been introduced that provide efficient and practical solutions to consumer, industrial, and military needs. Unfortunately, with existing technology, wireless devices are constrained by the amount of time they can be operated independent of centralized power sources. As a result, the usefulness of wireless devices, as well as the potential range of applications, is severely restricted by relatively slow advancements in rechargeable battery technology. As a result, a clear market need exists that either allows wireless devices to operate for longer durations away from centralized power sources or increases the amount of power that can be supplied to a wireless device.
Survey of Existing Markets and Research Currently, many technologies have been developed that attempt to overcome the limitations imposed on wireless devices. For example, recent advancements in rechargeable batteries and electric double-‐layer capacitors (i.e. supercapacitors), as well as technologies that harvest solar energy and exploit the piezoelectric effect have been effective at satisfying a large portion of the established market need. Within the recent past, rechargeable battery capacity has been increasing by approximately 6% per year [2], and, as a result, the amount of time a wireless device can be used portably without being re-‐energized has improved. However, this only provides a partial solution to the inherent problem with powering wireless devices. Products that solely exploit 6
improvements in battery life still present severe restrictions for applications that require long periods of independent operation away from centralized power sources. Solar power technology has also developed into a viable solution for many industrial, commercial, and military applications. Nonetheless, at the current level of technology, solar power provides an inadequate solution for many wireless devices due to multiple seemingly insurmountable constraints. Some of these limitations include a solar cell’s location relative to the sun, time of operation, and weather conditions, as well as the relatively high price per watt of power. Moreover, many wireless applications do not have access to sunlight due to their embedded location within structures. Within the scientific community, much research has been devoted recently to developing piezoelectric energy harvesting devices. This technology exploits certain materials’ ability to induce an electric potential after the application of a mechanical disturbance. For example, it is theoretically possible to design a device that can take advantage of applied pressure to a human kneecap during normal movement and use this mechanical motion to induce an electric potential. Many mechanical systems inherently create vibrational motion during operation, and consequently, this energy could be harvested.
Potential of RF Energy Harvesting Around 1891, the famous inventor and engineer Nikola Tesla proposed that radio frequency energy could be used to wirelessly power devices [3]. Currently, passive radio frequency identification systems (such as RFID tags) are the only large scale implementation of the technology. Powering embedded systems, and to some extent wireless sensor networks, requires significantly more power than a simple passive device like an RFID tag; however, in recent years, the technology has been researched for applications that require monitoring of a sensor network. In most of these applications, the location of the sensors (inside a rigid structure, for instance) does not allow for other forms of energy harvesting. Furthermore, providing sufficient wiring to the sensor network would be extremely costly and cumbersome [4]. For example, the United States Navy purchased a system that allowed technicians to monitor the structural integrity of aircraft wings. Basically, wireless sensors were placed throughout an aircraft’s wing, and a technician uses a handheld device to wirelessly transmit power, as well as information, to the sensors. Once receiving power, each individual sensor transmits data back to the technician [5]. Harvesting radio frequency energy has also been discussed for monitoring the structural integrity of bridges, as well as overseeing environmental conditions within a sealed space (a nuclear reactor compartment, for instance) [4]. In most of these cases, the sensor network does not need to be run continuously, and, as a result, intentional power transmissions can be sent at specific times to power the devices.
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SAIC Interest in RF Energy Harvesting It is important to note that radio frequency energy harvesting is a relatively new area of research within the field of electrical engineering. As a result of the unproven capabilities of the technology, SAIC’s initial interest came about as a result of its potential for integration with unmanned aerial vehicles, and many of the team’s design decisions through the year took this specific application into account. To date, RF energy harvesting technology has focused mostly on low-‐powered applications. However, as the efficiency of the designed harvesting circuitry is increased, use with device’s requiring high power demands, such as an unmanned aerial vehicle, becomes a possibility. A high efficiency also allows for the possibility of harvesting ambient radio frequency energy to power certain wireless devices. According to Dr. Marlin H. Mickle, Professor of Electrical Engineering at the University of Pittsburgh and researcher in the area of wireless networks and energy harvesting, “When we talk about ambient [radio frequency] energy…we’re showing that we can make it work” [5]. It was the undergraduate design team’s goal to power a typical embedded system (such as a PIC microcontroller) by designing a device that has the capability of harvesting ambient S-‐Band radio frequency energy in the San Diego metropolitan area. Relevant sections of this report will demonstrate how the design team’s project, a virtual “proof of concept” of RF energy harvesting, provides the initial research and development work necessary for integrating radio frequency energy harvesting technology with unmanned aerial vehicles in the future. At the conclusion of our project, we still feel that the technology has much promise for many applications, including unmanned aerial vehicles.
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2 – Project Concept The team designed a system that harvests S-‐Band radio frequency energy and provides power for an 8-‐bit PIC flash microcontroller. The design contains two main subsystems, each having very specific purposes. Using a custom designed microstrip patch antenna optimized specifically for a narrow portion of the S-‐Band (3.25 GHz), the device captures electromagnetic energy from the surrounding environment. Then, the alternating current signal is efficiently rectified via a 7-‐stage charge pump circuit that utilizes S-‐Band Schottky diodes. A secondary subsystem acts as a backup power supply by storing energy in supercapacitors. Then, when insufficient energy is captured from the receiving antenna to directly power the microcontroller, this secondary subsystem distributes stored energy to the attached embedded system. A block diagram of the designed system is shown below in Figure 1.
Figure 1. Block Diagram of System
Please note that energy can still be provided for the microcontroller without the secondary energy storage and distribution subsystem. Due to the technical complexity of the design, the final developed system only includes the two primary subsystems that are described above. For the final developed device, these two subsystems were integrated onto a self-‐ fabricated printed circuit board. SAIC’s main technical interest in radio frequency energy harvesting technology centers around a desire to potentially harvest military directional radar energy to increase the amount of time an unmanned aerial vehicle (UAV) can stay airborne. Unfortunately, integrating the team’s design into a solution for UAV’s is outside the scope of SAIC’s funding commitment, as well as being far too technically advanced for undergraduate engineering students. As a result, the team’s main objective focused on proving that S-‐Band radio frequency energy harvesting can be feasible for powering a very simple device. The team also focused our efforts on improving the overall AC to DC energy conversion efficiency. The successes realized toward attaining these two objectives provide a foundation for SAIC to continue future research and development in the area of radio frequency energy harvesting. 9
3 – Functional Specifications Project Outcome Since the work SAIC asked us to perform was mostly research and development into an emerging technology, establishing what defined a successful project was essential to ensuring that the team was able to deliver an appropriate solution. As a result, at the Preliminary Design Review stage, certain minimum design goals were established upon completion of the project. As the team’s understanding of realistic project outcomes improved with time, these minimum design goals were updated at the Critical Design Review phase, as well as before the Final Design Review. The following were the minimum design goals that were agreed upon:
An antenna will be custom designed, built, and tested that effectively captures an appropriate amount of RF energy
The antenna will be optimized for the frequency band selected
A rectification circuit will be designed, built, and tested that converts the input AC signal into a DC signal
The rectification circuit will be optimized to have the highest efficiency possible to increase overall system performance
An energy storage and distribution subsystem will be designed that utilizes electric double-‐layer capacitors (supercapacitors)
The energy storage subsystem will be able to provide a constant output voltage/current
Furthermore, it was determined that if these minimum standards were reached, the following additional design goals would be attempted.
The entire system will be self-‐fabricated onto a printed circuit board
The system will be used to power an embedded system performing a nominal task
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Design Specifications The major design specifications for each subsystem are listed below in Table 1. Specifics about each one of these subsystems, and the justification for these design specifications can be found within the RF Harvesting Subsystems section. These specifications were decided upon during the project’s Critical Design Review phase. They were drastically refined between the Preliminary and Critical Design Review stages. Table 1. Major Design Specifications
Rectification Energy Storage / Distribution
Secondary Subsystems
Antenna
Primary Subsystems
Description of Specification Resonant Frequency
3.25 GHz
Bandwidth
> 3000 kHz
Antenna Gain
6 dBi
Polarization
Linear
Radiation Pattern
3 dB Directivity
Effective Area
4.12 x 10-‐3 m2
Input Frequency
3.25 GHz
Output Frequency
0.0 Hz (DC Signal)
Input Voltage Range
0.50 V – 3.68 V
Output Voltage
3.3 V
Power ĨĨŝĐŝĞŶĐLJ͕ɻrectification
> 80%
Output Voltage
4.8 V
Output Current
> 20 µA
Power Efficiency, ɻenergy storage
> 65%
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Specification
4 – Overview of Final System Design The S-‐Band RF energy harvesting device consists of two primary subsystems and a secondary subsystem. The first primary subsystem is the receiving antenna, which is solely responsible for capturing all of the RF energy that is used to power the integrated embedded system. The second primary subsystem is the rectification circuitry, which will efficiently convert the time varying input energy into a constant output voltage. The secondary subsystem is the energy storage and distribution system, which is responsible for acting as a power backup by storing captured energy in super capacitors. The overall device can operate effectively without the secondary subsystem, although some flexibility is lost in its operation.
Statement of Final Design Approach A circuit schematic of the final design, including the two primary subsystems and the secondary subsystem, is included on the following page as Figure 2. Due to the technical complexity of the team’s overall design, only the two primary subsystems were actually built and tested. The final design was fabricated on a single printed circuit board using National Instruments’ Ultiboard.
Statement of Final System Development Due to time and funding constraints toward the end of the spring semester, the team determined that it would be more efficient to self-‐fabricate the final printed circuit board. After consulting several engineers and hobbyists, a specialized, unique procedure was developed by the team to carry out the printed circuit board fabrication process. Please reference Appendix D for a copy of the team’s detailed fabrication procedure. Although somewhat time consuming, self-‐fabrication allowed the team to make revisions to the printed circuit board layout without having to wait for a manufacturer to produce a new board. Since high frequency circuit design was a fairly foreign technical area for the team, many revisions of the final design were made. Please see the Test Plan for more specific discussion of the iterations that led to the final printed circuit board layout and design. Two separate three-‐dimensional views of the final printed circuit board layout can be viewed in Figure 3 and 4 on page 15. The final printed circuit board was fabricated onto two separate types of material. The first was a standard double-‐sided copper clad board with 1 oz copper. The second was Rogers Corporation RT/duroid 5880 (see Primary Subsystem I – Antenna Subsystem for more details). Besides the difference in the materials used, the layout and design of each printed circuit board is identical. The final printed circuit board contains 40 mil traces with through hole components. Due to the high frequency signals that were being transmitted through the circuitry, the team 12
took special care to minimize the number of traces on the board. The final printed circuit board design also contains a conductive ground plane. This ground plane is electrically connected (through a via) to copper cladding surrounding the circuitry on the board’s top layer. The top layer copper cladding allows for any fringe field effects from the high frequency signal to be dissipated into the ground plane, without interfering with the circuitry’s operation.
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Figure 2. Overall System Design Including Primary and Secondary Subsystems 14
Figure 3. Ultiboard Representation of Final System PCB Layout I
Figure 4. Ultiboard Representation of Final System PCB Layout II
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5 - RF Harvesting Subsystems The following section provides a detailed overview of the two primary subsystems, as well as the secondary subsystem. Each subsystem is discussed in its own subsection. For each one, a brief overview of the technical solution is initially provided to give a short summary of the subsystem’s purpose. Next, insight into the design approach and alternative designs that were considered are discussed in depth. Moreover, a detailed technical description of each subsystem is included. Finally, system analysis results that were accomplished to date are included for each subsystem.
Primary Subsystem I - Antenna Subsystem Overview of Technical Description The antenna subsystem consists of a custom designed single patch antenna with a quarter-‐wave edge fed microstrip transmission line. The linearly polarized antenna was optimized to resonate efficiently at 3.25 GHz. Within the context of the overall system design, the antenna subsystem harvests the radio frequency power and transfers this power to the rectification circuitry. Design Approach A microstrip patch antenna consists of a radiating patch that rests above a dielectric substrate backed by a thin conductive ground plane. The radiating patch element can be designed to take the form of any number of planar geometries, including squares, rectangles, circles, and ellipses. These planar shapes have also been successfully wrapped around a three-‐ dimensional structure. Since an antenna is a reciprocal device, it can be used to radiate (i.e. transmit) electromagnetic energy or capture (i.e. receive) electromagnetic energy. A basic conceptual model of a standard rectangular patch antenna is shown in Figure 5 [6].
Figure 5. Basic model of an edge fed patch antenna [6] 16
For a typical patch antenna, the width dimension represents the two radiating edges, whereas the length represents the non-‐radiating edges of the conductive patch. Note that fringing fields exist along both of the radiating edges, and they add in phase [6]. The current distribution is the highest at the center of the width (i.e. all along the length dimension). The current becomes smaller as the width approaches each non-‐radiating edge. Moreover, the electric field is zero in the center of the patch, maximum at the left radiating edge, and minimum at the right radiating edge. As a result, the antenna experiences maximum directivity perpendicular to the radiating element [7]. The concept behind microstrip patch antennas was first introduced to the academic community in 1953 and began to have practical implications for antenna design work in the 1970’s [6]. Today, microstrip patch antennas have been successfully designed for use with cellular telephones, satellite radio receivers, missile and weapons guidance systems, as well as a wide variety of other applications [8]. A summary of the main advantages and disadvantages of microstrip patch antennas can be found below in Table 2. Table 2. Microstrip Patch Antenna Characteristics [6]
Advantages
Disadvantages
Lightweight
Narrow Bandwidth
Low Profile (Aerodynamic)
Limited Maximum Gain
Easy to Design and Construct
Poor Directivity
Inexpensive to Fabricate
Susceptible to High Losses
Easily Integrated with Existing Electronics
Low Power Handling
Multiple Resonating Frequencies Possible
Only Practical at Higher Frequencies
Matching Network/Feed Line Fabricated with Poor Antenna-‐Feed Isolation Antenna
In order to authoritatively discuss the feasibility of integrating an RF harvesting device with certain existing technologies (such as a UAV), the antenna subsystem cannot, under any circumstance, impede the operational capabilities of its host. For an application such as a UAV, microstrip patch antennas, with their planar structure, provide the perfect geometry for the aerospace environment, as it does not interfere with the UAV’s aerodynamics. Many antenna designs were initially considered for the harvesting device, including dipole, log periodic, Yagi-‐ 17
Uda, and horn designs. However, none of these antenna designs provide the low profile necessary for integration with a UAV. Since high-‐powered military radars provide the most obvious potential RF energy source for military UAV’s, harvesting high frequency energy is fundamental to the antenna subsystem. Unfortunately, besides microstrip patch antennas, the possibility for a compact antenna array of multiple elements simply did not exist for any other antenna type studied. Although the team’s goal is not to provide an application-‐specific RF harvesting solution, in order to make a confident opinion as to the feasibility of integrating the technology with a UAV, it was decided that an antenna with similar specifications to one that would be used with a UAV was required. These facts, as well as the relative simplicity of fabricating a patch antenna, led the team to choose a patch antenna design. The resonant frequency of the designed microstrip patch antenna was selected using the Institute for Telecommunication Sciences Broadband Spectrum Survey Data for San Diego [9]. This survey, conducted in 1995, revealed that the highest power density on Point Loma (by many order of magnitudes), exists in the S-‐Band, specifically between approximately 3.2 – 3.35 GHz. This power density, calculated to be 49.16 W/m2, is the result of high-‐powered shipboard radar systems and radiolocation transmissions within close proximity to the coast near Point Loma (see Appendix B for information on this calculation). Due to the conclusions the team made after studying the Broadband Spectrum Survey data, as well as the close correlation between the S-‐Band and military radar systems (many radar systems, such as the AN/SPY-‐1D radar system operate in this band), it was decided that the team would focus on harvesting energy near 3.25 GHz. The Broadband Spectrum Survey data for this portion of the S-‐Band is reproduced below in Figure 6.
Figure 6. ITS Broadband Spectrum Survey Received Signal Level Graph for 3.1 -‐ 3.7 GHz [9]
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Purchasing, rather than designing and constructing an antenna subsystem was also seriously considered for the RF energy harvesting device. However, due to limited budget constraints and potential integration issues with commercially available antenna designs, it was decided that a single microstrip patch antenna could be designed, simulated, and constructed with little monetary expense. Furthermore, it was determined that the necessary design resources, as well as dedicating one team member to this task, would not detract from the overall design process. Technical Description The microstrip patch antenna was constructed using Rogers Corporation RT/duroid© 5880 High Frequency Laminate. RT duroid is a commonly selected material for microstrip and stripline circuit applications. More importantly, this specific laminate has an extremely low loss tangent, and has a constant dielectric constant over a wide range of high frequencies. A layer of electrodeposited copper cladding comes standard on both sides of the laminate. A summary of the relevant specifications of Rogers Corporation RT/duroid© 5880 can be found in Table 3 below. A more exhaustive list of specifications has been provided in the laminate’s data sheet, reproduced in Appendix C.
Table 3. Patch Antenna Substrate Specifications
ŝĞůĞĐƚƌŝĐŽŶƐƚĂŶƚ͕ɸr
2.20 ± 0.02 spec.
>ŽƐƐdĂŶŐĞŶƚ͕ƚĂŶɷ
0.0009
Height of Dielectric Substrate
3.175 mm
Copper Cladding
1 oz. (35 µm)
Using Matlab and a set of universal equations describing the properties of microstrip patch antennas, the critical properties of the designed antenna were theoretically calculated. These calculations can be found in Table 4. The Matlab code that was written to efficiently determine these values can be reviewed in Appendix B, and the equations that were used to write the functions was verified in multiple academic papers. Please note that the actual substrate specifications found in Table 3 were used to determine these calculations, as well.
Table 4. Overview of Theoretical Antenna Specifications
Microstrip Patch Antenna Width
36.49 mm
Microstrip Patch Antenna Length
27.75 mm 19
Ground Plane Width
36.51 mm
Ground Plane Length
27.77 mm
Antenna Input Impedance
100.0 ё
Antenna Gain
6.0 dBi
Polarization
Linear
A microstrip patch antenna can be designed with a wide variety of feed arrangements, including bottom fed coax feeds and microstrip transmission line feeds. Since the energy from the antenna will enter the rectification circuitry directly, it was determined that a quarter-‐ wavelength non-‐radiating microstrip transmission line feed would be an efficient method to transfer power from the antenna subsystem to the rectification circuitry. The quarter-‐ wavelength feed was selected to ensure that the entire incoming signal could be reproduced accurately. This microstrip transmission line was calculated to have a width of 2.90 mm and a length of 8.62 mm. The transmission line is centered along the midpoint of the patch antenna width (i.e. along one of the radiating edges). Ansoft Designer SV, a planar electromagnetic solver and simulation software widely used in industry, was used to determine these calculations. An input impedance of 100 ёǁas assumed for designing the microstrip transmission line in Ansoft Designer SV. A two dimensional view of the designed patch antenna is shown below in Figure 7.
Figure 7. Two-‐Dimensional View of Microstrip Patch Antenna 20
A three dimensional view of the microstrip patch antenna is shown below in Figure 8. Note that the “wire box” structure represents the dielectric substrate. The exact specifications for the selected high frequency laminate were used when creating the microstrip patch antenna in Ansoft Designer SV. Also note that the ground plane is missing from the three dimensional view of the antenna, although it was included in the design layers within Ansoft Designer SV.
Figure 8. Three-‐Dimensional View of Microstrip Patch Antenna
Based on the theoretical calculations for the microstrip patch antenna, the input characteristics to the rectification subsystem were determined, and these values are summarized below in Table 5. These calculations rely upon the assumption that the designed antenna will have a minimum bandwidth of 3000 kHz, as this was the bandwidth of the antenna used to collect the Broadband Spectrum Survey data in the S-‐Band [9]. This ensures the integrity of the input power calculations that much of the design is based on. Although microstrip patch antennas typically suffer from a narrow bandwidth, a simple patch design will yield a bandwidth of approximately 1% to 5% of the resonant frequency [8]. For an antenna designed to operate at 3.25 GHz, this results in a bandwidth of 32.5 MHz to 162.5 MHz, which is many order of magnitudes greater than the minimum required bandwidth. Table 5. Theoretical Rated Input Characteristics to Rectification Circuitry
Input Power to Rectification Circuitry
135.20 mW
Input Voltage to Rectification Circuitry
3.68 V
Input Current to Rectification Circuitry
36.74 mA
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Also, please note that these calculations assume a constant power density, which will obviously not be the case while harvesting from ambient sources. However, these calculated input characteristics provide a baseline that can be used to compare actual measured values against. These calculations also do not take into account losses that will undoubtedly be observed in the microstrip transmission line and radiating element. Nonetheless, these input characteristics are much greater than the minimum specifications needed to successfully power the attached low-‐powered embedded system. System Analysis Results Ansoft Designer SV, a free version of the professional Ansoft Designer software suite, was used in order to begin simulating the proposed microstrip antenna design. Many software programs were considered for this task, including Sonnet Lite, Agilent ADS Momentum, and Zeland Inc.’s IE3D. In fact, all four programs were downloaded and fully researched. In the end, the team decided to use Ansoft Designer SV due to its powerful range of capabilities, intuitive interface, and exceptional graphical simulation results. After building and testing the designed microstrip patch antenna, the dimensions were modified slightly from theory in order to achieve the desired simulation results. These changes, as well as all relevant simulated data collected, are summarized in Table 6. Table 6. Results from Simulation of Microstrip Patch Antenna
Microstrip Patch Antenna Width
35.80 mm
Microstrip Patch Antenna Length
28.50 mm
Microstrip Transmission Line Width
2.90 mm
Microstrip Transmission Line Length
8.62 mm
Return Loss
-‐10.21 dB at 3.22 GHz
Gain
6.08 dBi at 3.22 GHz
VSWR
1.89 at 3.22 GHz
Antenna Input Impedance
100.60 + j0.0 ёat 3.25 GHz
The return loss specifies the amount of power that is reflected in a transmission line due to a device being connected to the transmission line. As a result, it is important to minimize the 22
return loss at the resonant frequency. The current design provides a minimum return loss of -‐ 10.21 dB at 3.22 GHz, which is extremely close to the desired resonant frequency of 3.25 GHz. A graph of the return loss vs. frequency is shown below in Figure 9.
Figure 9. Antenna Return Loss vs. Frequency
The simulated gain for the designed microstrip patch antenna was 6.08 dBi at 3.22 GHz. At 3.25 GHz, the gain was 5.97 dBi. A graph of the gain vs. frequency is reproduced below in Figure 10.
Figure 10. Antenna Swept Gain vs. Frequency
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The voltage standing wave ratio (VSWR) is the ratio of the amplitude of a standing wave at a maximum along the transmission line to the amplitude of a standing wave at a minimum along the same transmission line. A VSWR approaching 1.0 is desired for the microstrip patch antenna design at the resonant frequency. At 3.22 GHz, the simulation yielded a VSWR of 1.89. These results can be found below in Figure 11.
Figure 11. Antenna VSWR vs. Frequency
The real part of the antenna input impedance was designed to be 100.0 ё͘dŚĞ simulated real part of the input impedance was determined to be 100.60 ёĂƚϯ͘Ϯϱ',nj͘ graph of the real part of the input impedance vs. frequency is shown below in Figure 12.
Figure 12. Real Part of Antenna Input Impedance 24
The imaginary part of the antenna input impedance was designed to be 0.0 ё͘dŚĞ simulated imaginary part of the input impedance was determined to be 0.0 ёĂƚϯ͘Ϯϱ',nj͘ graph of the imaginary part of the input impedance vs. frequency is shown below in Figure 13.
Figure 13. Imaginary Part of Antenna Input Impedance
A radiation pattern shows the directionality of an antenna. From the simulation radiation pattern, shown below in Figure 14, it is clear that the designed microstrip patch antenna is highly directional. It is desired to have a microstrip patch antenna that radiates in one half of the hemisphere, resulting in a 3 dB directivity [7]. Clearly, the current design has room for improvement on satisfying the specification. However, all efforts will be made during construction to vary the dimensions of the ground plane, as well as the shape of the ground plane, which, according to theory, will help the antenna’s directionality.
Figure 14. Antenna Radiation Pattern 25
A Smith Chart was generated using Ansoft Designer SV. This Smith Chart has been reproduced below in Figure 15. Although it was not utilized for any of the specified design calculations, it was included in this report due to its historical significance and usefulness in impedance matching. The powerful capabilities of Ansoft Designer SV helped match the antenna transmission line to the patch element.
Figure 15. Smith Chart
The near field and far field of an antenna describes the regions around the radiating source and the relative importance of the fields within each region. Typically, the near field is represented by the region where the radius is less than the wavelength, and the far field represents the region where the radius is greater than the wavelength [10]. The near field and far field simulated results are shown below in Figures 16 and 17, respectfully.
Figure 16. Antenna Near Field Three-‐Dimensional Plot
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Figure 17. Antenna Far Field Three-‐Dimensional Plot
Note that the far field graphic shows that the field is at a maximum at the midpoint between the two non-‐radiating edges of the microstrip patch antenna. Moreover, this shows that the antenna radiates energy perpendicular to the planar antenna surface, which was predicted by theory. Although the simulation results attained from Ansoft Designer SV were not ideal, they helped optimize the theoretical calculations for the microstrip patch antenna. The team plans to begin constructing the designed antenna, and making needed changes during testing of the antenna.
Primary Subsystem II - Rectification Subsystem Overview of Technical Description The rectification subsystem consists of a 7-‐stage charge pump utilizing Schottky diodes. A Linear Technology LT1965 Low Dropout Linear Regulator is placed at the output to the charge pump circuitry to ensure a proper voltage across the input to the energy storage and distribution subsystem. Within the context of the overall system design, the rectification subsystem converts the time varying input sinusoid from the antenna subsystem and converts the signal to a direct current (DC) form [4]. During this conversion, the voltage is also increased. Before entering the energy storage and distribution subsystem, the output voltage is regulated to a steady value. Figure 18 below is a schematic of the overall rectification design.
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C7 560p
C6 560p Antenna
D3A BAT63
C3 560p
D2A BAT63
C2 560p
D4B BAT63
D3B BAT63
D2B BAT63
D1B BAT63
D1A BAT63
D4A BAT63
C4 560p
C5 560p
C8 560p
C1 560p
Rectification/Charge Pump
Figure 18. Rectification Subsystem
Design Approach This design is based on the principles behind diodes and capacitors, and their behaviors when configured into a charge pump circuit. Charge pumps work in stages that progressively increase the output voltage in a DC form [4]. By increasing the number of stages of the charge pump it is theoretically possible to deliver any needed output voltage. The only constraint is that the circuit must obey Ohm’s law. In other words, by increasing voltage, current is sacrificed. The first stage of the design is shown in Figure 19. This circuit is a voltage doubler that operates as follows: 1. Assume a sinusoidal input, Vin=A Sin(Zt) and a peak amplitude larger than Vth of the two diodes. 2. With the first positive semi-‐cycle after Vin=Vth capacitor C1 begins to charge and continues to charge until the peak voltage of A-‐Vth is reached. At that moment Vc1=A-‐ Vth. 3. When the semi-‐cycle begins to decrease, the capacitor C1 retains its charge because it has no discharge path. At this point both diodes are behaving as open circuits. 4. When Vin enters the negative semi-‐cycle diode D2 operates as a short circuit allowing the negative terminal of capacitor C1 to connect to Vin and begins to charge the same way that the other plate of C1 charged.
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5. At this point capacitor C1 has the charge of Vin on both plates and a total charge of 2Vin [4]. 6. To accommodate a load at the output, an output capacitance, C2 must be added. Capacitor C2 removes the ripple from the output when a load is present [11].
C1
D1
Vin
C2
D2
Figure 19. One-‐Stage Voltage Doubler
Now, the concept of the doubler circuit can be expanded into “n” stages by cascading charge pumps until the desired output voltage is reached. However, when this circuit is applied to a load, that load will drain charge from the capacitors and decrease the output voltage. The charge drain per period is [4]: (1) Therefore, the output voltage depends on the load placed on the circuit and the current load must be taken into account when computing what the output voltage will be. The output voltage of an ideal n-‐stage charge pump is: (2) Where C is the stage capacitances, f is the input frequency, Iload is the load current and n is the number of stages in the charge pump. The above equation assumes ideal diodes and does not take into account the turn-‐on voltage required and other losses that are associated with diodes. When diodes are operated in the reverse-‐biased mode (these diodes are reverse-‐ biased 50% of the time), they exhibit parasitic capacitances and inverse current saturation. Those effects are outside the scope of this project and only cause a minimal difference in the 29
output voltage. Therefore, they can be effectively ignored. One effect not taken into account that cannot be ignored is the diode turn-‐on voltage, which, using Schottky diodes is 0.3 V. The following equation is the result: (3) It is also prudent at this time to discuss other designs that were considered and why this specific design was chosen. First of all, there are many different designs of charge pumps that could have been used. Each one has its own advantages and disadvantages. The design that was decided upon has very good low-‐voltage operation in comparison to some other designs. There are also other designs that use MOSFET transistors instead of diodes. These designs work well for applications at lower frequencies because the MOSFET is built with a “built in diode.” The diode is not actually built in, but rather an intrinsic trait of all transistors. These internal diodes are very powerful, but are slow to operate. This would not work in the high frequency range of the S-‐Band. MOSFETs also require a Drain to Source resistance to provide a control voltage. This parasitic resistance would further reduce the efficiency of the system. Technical Description The rectification system was self-‐fabricated onto a printed circuit board that also includes the microstrip patch antenna. A Faraday cage separates the antenna from the rectification circuitry, ensuring that neither subsystem electrically interferes with the other. All components needed for the rectification circuitry come in a through hole mount package. Through hole components are easier to use than surface mount. Surface mount components were originally going to be used, but the idea was abandoned due to technical difficulties in the construction phase. To determine the values for the capacitors, many variables were taken into effect. The major variable was the amount of energy that was to be harvested by the antenna system, then the requirements for the energy storage system. For these calculations, a value of 500 mV output from the antenna was assumed. The minimum requirement for the LTC3225 supercapacitor charger is 2.8 V and at least 20 µA. The system was designed to deliver 3 V and 3 mA to the energy storage system. These values were determined by evaluating the other systems. Knowing that the antenna will provide 500 mV at 36.74 mA, it was determined that the rectification system should be designed to deliver 3 V. This is 0.2 V above the minimum. This value was decided on to take into account any losses and to give a slight buffer if the antenna does not deliver exactly 500 mV. The 36.74 mV input current was then halved to give a worst case scenario for losses. Then using Ohm’s law, it was determined that 3.03 mA would 30
be delivered to the energy storage system. Using equation (3) and solving for C it was determined that the capacitance must be 34.6 pF. However, after simulating the circuit, it was determined that the capacitor values were too small. As a result, 560 pF capacitors were used. Next, diodes had to be found that would work in the S-‐Band. The problem with such high frequencies is that the time that a standard diode takes to transition from its forward to reverse bias state is longer that one period at 3.25 GHz. Therefore, diodes with a very fast switching time had to be used. Also, since this project operates at very low voltage levels, Schottky diodes were used. Schottky diodes use a metal-‐semiconductor junction instead of a semiconductor-‐semiconductor junction. This allows the junction to operate much faster and gives a forward voltage drop of 0.15 -‐ 0.45 V instead of 0.7 -‐ 1.7 V of normal diodes[11]. The specifications for the specific parts that were used in the final design can be found in Table 7 below. Table 7. Specifications of Rectification Components
Capacitor
Component
Schottky Diode
Specification Manufacturer
PROSPERITY DIELECTRIC
Part Number
MA0603XR-‐561K-‐500PR
Size Code
DO-‐15
Capacitance
560pF
Rated Voltage
50 VDC
Mounting
Through Hole
Temperature Tolerance
X7R
Manufacturer
Avago Technologies
Part Number
5082-‐2835
Package
DO-‐15
Forward Voltage
0.34 V
Maximum Frequency
12 GHz
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At this point, the output of the system is determined by the input received from the antenna. All of the calculations were done assuming minimum power values. But the antenna has the ability to deliver up to 3.6 V. If this happens, the output of the rectification system will be nearly 16 V. The maximum input for the LTC3225 Supercapacitor charger is 5.5 V. Therefore, a voltage regulator was put in series with the rectification circuit. The LT1965 Low Dropout Linear Regulator allowed an input of 1.8-‐20 V and was configured to output the exact voltage required for the PIC microcontroller. The output was configured at 3.3 V to allow the LTC3225 to operate at its’ highest efficiency (see data sheet in appendix C). The output from the LT1965 was then delivered directly to the supercapacitor charger. If the power level ever drops below the needed power for the microcontroller, the charge that is stored in the supercapacitor energy storage system will take over to power the device until normal operating power is restored. The LT1965 linear regulator was ordered to deliver a constant 3.3 V out and only requires two capacitors to be attached to it to regulate the input and output ripple and to provide a proper input voltage to the device. System Analysis Results The rectification system was initially designed and tested in National Instrument’s Multisim 10.1. Multisim is software that is available to the group on the laboratory computers provided by the University of San Diego. The group members are all familiar with the software from use in other labs in the engineering department. Multisim is also very capable of simulating circuits. The included database of components includes the components that were selected for the design, making simulating very easy. Another benefit of using Multisim is that it can transfer the circuit to Ultiboard, which is a printed circuit board design program. The ability to transfer this information ensures that the traces made when making the PCB will be accurate and connect correctly to the components. Ultiboard was used to finalize the design incorporating all the primary subsystems. The first tests of the design were done in Multisim at 10 MHz to confirm that the system worked properly. It was important to test at lower frequencies because there are more challenges to designing circuits in the higher frequency S-‐Band. Having the knowledge that the circuit works before converting it to high frequency allows for easier diagnostics and troubleshooting of the circuit. Figure 20 below is the circuit designed in Multisim for 10 MHz and the results. Figure 21 shows the transient analysis for the circuit.
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Figure 20. 10 MHz Charge Pump Design
Figure 21. Transient Analysis for 10 MHz Charge Pump Design
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This simulation demonstrates that the theory behind the charge pump is feasible. Different values of capacitors and different diodes were used for the simulation to account for the lower frequency. Also in this simulation, only five stages were used to simplify the design. A 1 kё load resistor is added to simulate the attached load to the circuit. Theoretically the above circuit should have an output of five times the input: (4) Where Vin is 0.5Volts giving an output of 2.5 V But after equation (3) must now be analyzed:
As shown, the calculated output voltage is 0.30024 V less than the theoretical output. This is mainly due to the loss of the diodes of 0.3 V. But there is also a difference between the theoretical output and the measured output from Multisim. (5) These losses are mostly caused by diode parasitic capacitances and inverse current saturation. These losses are rather high for this simulation, but that is mainly due to a poor simulation of the diodes. Better diodes would produce better results. The next step was to bread board this test circuit using components that are available in the lab. Diodes with a Vth of 0.34 V were used with 5 µF capacitors. Figure 22 below is a photograph of the test circuit built on the bread board.
Figure 22. Bread Boarded Rectification Test Circuit 34
The input delivered to this circuit is 500 mV RMS at 10.0 MHz. This was delivered with an Agilent 33250A Function Generator. The output was then read on an Agilent MSO6012A Mixed Signal Oscilloscope. The output of the test circuit is shown in Figure 23. The yellow trace is the input of 500 mV at 10 MHz and the green trace is the output. The output was measured to be 2.030 V with a ripple too small for the oscilloscope to detect.
Figure 23. Oscilloscope Output for Rectification Test Circuit
These test values are closer to the theoretical value of 2.199 V with a voltage difference of This measurement is a much better simulation of the actual performance of a charge pump circuit. The 169 mV voltage drop is a much more accurate representation of losses due to diode parasitic capacitance and inverse current saturation. The final stage of the system analysis was simulating the design at 3.25 GHz. For this simulation, the actual components that were used for the final system were simulated. It was also determined that seven stages would have to be used instead of five to achieve the required output. This was determined by plugging in N values into equation (3) and solving for C. When N was less than 7, the values for the capacitance were negative, and therefore impossible. Striving to keep the amount of stages at a minimum, seven were used. Then, the capacitor value was approximated to the nearest manufactured value, which was 560 pF. The output was then calculated using equation (3) to be
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Again, this is nearly 200 mV less than what the output theoretical output of, using equation (4) Causing a voltage difference of, This can be attributed to the voltage loss from the diodes and other small losses in the circuit. Notice that the forward voltage of this diode is only 190 mV. A circuit diagram of the 7-‐ stage charge pump design can be seen below in Figure 24. Also, this circuit was simulated in Multisim using the results from the above equations, and can be reviewed in Figure 25 on the next page.
Figure 24. 7-‐Stage Charge Pump at 3.25 GHz
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Figure 25. Transient Analysis for 7-‐Stage Charge Pump Circuit Operating at 3.25 GHz
This simulation proves that the design will work. With 500 mV input the system outputs 3.1448V. Now using equation (5), Again, there are discrepancies between the calculated value and the measured value due to the diode parasitic capacitance and inverse current saturation. In this test, however, the difference in output voltage is much closer. This is because the components used were of better quality and were designed to work under these conditions. This design was then transferred first to a breadboard, then to a printed circuit board for testing. When bread-‐boarded, the system output was 3.14V, which is nearly identical to the values that were determined using Multisim. The final testing process was to build the circuit on a printed circuit board. The first few attempts used surface mount components to minimize overall board size. But the team quickly learned that surface mount construction was difficult and decided to change the design to use through hole components. When the board was finally assembled and tested, with an input of 500mV the output was 3.05VDC. The cause of this additional loss is most likely due to losses in the traces on the board. The team is currently working on an updated board design that will minimize trace length, and in theory provide better efficiency. These results will be presented in the addendum that will be submitted on Friday, May 8th.
Secondary Subsystem - Energy Storage and Distribution Subsystem Overview of Technical Description The energy storage and distribution subsystem consists of a Linear Technology LTC3225 Supercapacitor Charger with two supercapacitors connected in series which acts as a secondary 37
subsystem and is not vital to the overall functionality of the RF energy harvesting device. Various Schottky diodes, resistors, capacitors, and DC1220B Supercapacitor Charger Demonstration Board are necessary for the subsystem to perform as desired. Within the context of the overall system design, the energy storage and distribution subsystem is responsible for storing harvested energy and distributing the energy to the embedded system. Under normal operating conditions, the supercapacitors store charge and act as a backup power supply. If insufficient energy is captured by the antenna subsystem and rectified with the rectification subsystem, the charge stored on the supercapacitors provides the necessary voltage required to power the embedded system. Design Approach The design team determined that using supercapacitors will prove to be the most effective approach to the team’s specific design requirements. Supercapacitors, as shown in figure 26, are electromagnetic double-‐layer capacitors that provide thousands of times the storage capacity of a typical capacitor. They are passive electronic components that store energy electrostatically between a solid electrode and oppositely charged electrolyte ions by creating a voltage potential difference. Supercapacitors are extremely high power devices, however have a very low energy density. Although the technology has been around for many years, in recent years supercapacitor technology has provided much higher energy densities in a much smaller package, allowing for inclusion in a wider array of applications. Unfortunately, the energy densities of supercapacitors are still typically only one-‐fifth to one-‐tenth that of rechargeable batteries. However, there is no risk of overcharging a supercapacitor, and they can be fully charged in seconds. Supercapacitors can also be charged and discharged millions of times before needing to be replaced, making them an ideal choice for applications where access to the energy storage component is extremely costly and time consuming [12].
Figure 26. Various Supercapacitors.
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Throughout the design phase, supercapacitors have proven to be the optimal energy storage system. The team ruled out using a rechargeable battery early on primarily due to the complex charging characteristics for most rechargeable batteries. Furthermore, due to the variable nature of ambient radio frequency energy, the risk of applying an overvoltage to a rechargeable battery could jeopardize the functionality of the entire device. Since rechargeable batteries use an electro-‐chemical process, the number of times they can be recharged is limited. Supercapacitors are capable of tolerating the immediate energy demands, versus a rechargeable battery, thus also preventing a decline in charge capacity over the battery life [12]. These shortcomings associated with rechargeable batteries would severely hinder the functionality of the design as well as the benefits of radio frequency energy harvesting. The design team determined that a supercapacitor design is far more appropriate for the design specific applications and will allow for greater functionality of the final product. Table 8. Supercapacitor Advantages and Disadvantages [3]
Advantages
Disadvantages
High Power Density
Low Energy Density (1/5th to 1/10th of Rechargeable Battery)
Rapid Charging Rate
Rapid Discharge Rate
Unlimited Cycle Life
Low Cell Voltages (Requires Series Connections)
Straightforward Charging Methods
Only Partial Use of Energy Spectrum
Low Impedance
High Cost of Price per Watt
Technical Description Due to the rapid discharge rate of supercapacitors and the inconsistency of energy available, a system that provides a constant output voltage assists the RF energy harvesting system in continually powering the embedded system. The final design makes use of a programmable LTC3225 Supercapacitor Charger chip that ensures that this design is functional. Since the amount of energy captured from the receiving antenna varies with time, this chip acts as a backup power supply when sufficient energy is not available for harvesting and supplies a constant output voltage to the embedded system. The LTC3225 Supercapacitor Charger has been put on the market within the last year by Linear Technology which charges two series supercapacitors with an voltage input range of 2.8 V to 5.5 V while providing a constant output voltage that can be programmed to either 4.8 V or 39
5.3 V by setting the VSEL pin low or high, respectively. Low input noise, low quiescent current, and low external parts count make the LTC3225 ideal for small, battery-‐powered applications. With its special design, the LTC3225 maintains relatively constant input current form the lowest possible input noise. Automatic cell balancing ensures that overcharging cannot occur and maintains equal voltages across each supercapacitor (selectable to 2.4 V or 2.65 V). The charging current is also programmable up to 150 mA, and a very low 20 µA quiescent current [14]. When sufficient energy is available and being harvested it is delivered from the linear regulator which outputs a programmed voltage of 3.3 V based off of minimum voltage and current values collected by the receiving antenna and rectified through the rectification subsystem. This voltage is first supplied to the regulated dual cell LTC3225 Supercapacitor Charger chip. The chip provides charge current to a set of two 1 F supercapacitors in series and regulates a programmed constant voltage charge of 4.8 V across the supercapacitors. After they have been charged, the output voltage of the linear regulator is supplied directly to the embedded system that performs a nominal task such as blinking an LED. The linear regulator is programmed to output a constant voltage of 3.3 V, contingent upon sufficient energy available, in order to protect the integrity of the LTC3225 as well as the embedded system. At times when the energy available is too low, the LTC3225 acts as a backup power supply for the embedded system. When insufficient energy is being harvested, the linear regulator enters shutdown mode, thus removing the input voltage to the LTC3225. With the input supply to the supercapacitor charger eliminated, the LTC3225 enters a low current state, drawing less than 1 µA from the supercapacitors which have already been charged. At this point the LTC3225 begins to discharge the 4.8 V fixed output voltage from the charged supercapacitors where it is then output to the embedded system. The design team is using two supercapacitors in series both at a value of 1 F. Along with these supercapacitors, the charger chip configuration includes a ceramic flying capacitor of 1 µF that is low equivalent series resistance (ESR) which controls the strength of the charge pump and a 0.22 µF capacitor. Other components include a 60.4 k ёŽŶƚŚe charging current programming pin which sets the input charging current at a lower value, a 100 k ёƉƵůů-‐up resistor, and two BAT63-‐07WE6811 Schottky diodes [15]. All components were soldered to a demonstration board from Linear Technology to ensure that everything was functioning properly during the testing phase since it was virtually impossible to test the chip due to its 3 mm x 2 mm dimensions and DFN (Dual Flat No-‐Lead) packaging. The following figure shows the energy storage subsystem with the LTC3225 Supercapacitor Charger integrated with the DC1220B Demonstration Board.
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Figure 27. Energy storage and distribution subsystem
System Analysis Results The overall secondary subsystem is designed to be integrated between the DC1220B Demonstrations Board (3 in x 3 in dimensions) and the self-‐fabricated printed circuit board that includes the antenna and rectification subsystems connected with rubber spaces at the corners. The first board is the demo board with the LT3225 Supercapacitor Charger at the center with exposed pad (Pin 11) soldered to a low impedance ground plane for optimal thermal performance. Only specific electrical components mentioned in earlier paragraphs are used in the integration of the LTC3225 and demonstration board with those accompanying components soldered to the board as in the following figure:
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Figure 28. LTC3225 demonstration board configuration [15]
The second board is a through hole printed circuit board made of RT/duroid© 5880 High Frequency Laminate which the team self fabricated. This PCB was designed to have the voltage regulator mounted on it with a jumper wire connecting it to the LTC3225 and a jumper wire connecting the rectification circuitry to the LTC3225 demo board. Along with the linear regulator, the rectification circuitry as well as the embedded system is designed to be mounted on this board with the receiving antenna on the same side of this board. In the final design, the product package contains the two boards stacked upon one another in multiple PCB layers.
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6 - Embedded System An 8-‐bit PIC flash microcontroller was selected during the Critical Design Review phase as the attached embedded system that would be powered by the RF energy harvesting system. However, due to additional technical issues with integrating this microcontroller into the final design, the team made the decision to merely bypass the microcontroller and directly power a light emitting diode instead. This change did not affect the final success toward meeting the stated project outcomes. Furthermore, with additional time to overcome some technical challenges not initially realized, the team’s final developed system could still be integrated with the selected microcontroller.
During the Critical Design Review phase, care was taken to select the most simplistic microcontroller, as well as one with a wide operating voltage range. The team decided that a Microchip PIC10F202 flash microcontroller would be ideal. The device uses a Harvard architecture, and the microcontroller can be programmed using either C or assembly language. Microchip provides a development platform, including a C compiler. This software could be used to program the microcontroller’s flash memory to power an attached LED, although a programmer chip would probably be required. All relevant specifications for the microcontroller that was selected can be found in Table 9 below. Appendix C also contains additional specifications for the microcontroller. Table 9. Microchip PIC10F202 Flash Microcontroller Specifications
Specification Description
Specification Value
Operating Voltage Range
2.0 V – 5.5 V
Operating Current
< 175 µA
Standby Current
100 nA
Maximum Operating Speed
4 MHz Internal Oscillator
Number of I/O Pins
4
Flash Program Memory
512 bytes
Data Memory
24 bytes
Package
6-‐pin SOT-‐23 (3 lead plastic surface mount)
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7 – Personnel In order to adequately meet the specified project goals, three team members were selected. Although all three individuals have similar educational backgrounds, each team member brings a distinct set of technical interests and skills to the project group. As a result, each team member was primarily accountable for specific portions of the design, although each team member spent considerable time working on each of the subsystems. Below is a brief description of each team member’s educational background, as well as the specific responsibilities he was assigned throughout the project. Please note that Hanner Hart’s area of responsibility was changed to Energy Storage Specialist, and Michael Sass’s area of responsibility was changed to Antenna Specialist. This change was made after the Preliminary Design Review due to the formal coursework with applied electromagnetics. Energy Storage Specialist: Hanner Hart Hanner Hart has a very strong background in the area of hardware development. He has demonstrated firm skills in hardware related coursework as well as shown a propensity for the design and analysis of electronic circuits. Some of Hanner’s coursework has included electronic circuit design, electrical power, systems logic design, communication principles and circuits, applied mathematics, as well as signals and systems where he showed a firm understanding of conceptual and tangible concepts. His skills in these areas include computer simulation, principles in electricity and magnetism, and communication theory. Hanner has been assigned the primary responsibility of designing and testing the energy storage and distribution subsystem, although helped in the design and fabrication of each subsystem. A resume for Hanner can be found in Appendix A. Hardware Developer: Kelty Lanham
Kelty Lanham is a senior-‐level Electrical Engineering student at the University of San Diego. He has had great success in hardware design as well as software development. Kelty has had success in hardware related coursework as well as in lab sessions and design projects. He has shown a particular aptitude for designing circuits incorporating amplifiers, filters and logical systems. His skills include computer simulation design as well as discrete circuit implementation and testing. Kelty has experience from previous design projects including designing a thermostat circuit and digital alarm clock. He is also proficient in assembly language and VHDL programming languages, and, as a result, has been in charge of the programming needs within the project. For these reasons, Kelty was chosen as the hardware designer. He has been primarily responsible for the design, testing, and integration of the advanced rectification circuit, although helped in the design and fabrication of each subsystem. h A resume for Kelty can be found in Appendix A. 44
Antenna Specialist: Michael Sass
Michael Sass has a strong interest in digital and analog communications systems, as well as signal processing techniques. Michael has developed a strong theoretical background in applied mathematics and electromagnetics. He also has a firm understanding of the analysis and design of analog filters and amplifiers, as well as digital logic devices. As a licensed Extra Class Amateur Radio Operator, Michael has developed practical experience in building and testing antennas and related communications equipment. One of his main strengths continues to be his high level of work ethic and ability to work well within a team, both as a leader and follower. As a result of these specific interests and skills, Michael was assigned primary responsibility for designing and testing the antenna subsystem. Michael has been accountable for ensuring successful integration of the antenna subsystem with the remaining subsystems, although helped in the design and fabrication of each subsystem. A resume for Michael can be found in Appendix A.
8 – Test Plan Due to the complexity level of the RF harvesting system design relative to the experience level of the design team, it was of paramount importance that the test plan was developed in such a way that each primary subsystem was tested separately before attempting integration. As a result, the following test plan includes a detailed overview of all stages of testing that were conducted for both primary subsystems. Moreover, a detailed plan for how to begin testing and integration of the secondary subsystem is overviewed, as well.
Antenna Subsystem Testing Stage 1: Microstrip Patch Antenna Simulation Before attempting construction of the microstrip patch antenna, Ansoft Designer SV was used to optimize the dimensions of the antenna. This ensured that the theoretical calculations that were made regarding the antenna dimensions actually yielded the desired antenna design specifications. Please reference the Antenna Subsystem section for detailed information on all simulation results that were attained. It is important to note that although the Ansoft Designer SV is a powerful tool for verifying theoretical calculations and the feasibility of the antenna design specifications, the majority of the time testing the antenna subsystem should be during, and after, actual construction of the patch antenna. For example, the dimensions of the ground plane have a major effect on the desired design specifications. However, varying the ground plane dimensions using Ansoft Designer SV is not ideal. All results that were obtained from Stage 1 testing can be found in the section titled Primary Subsystem I – Antenna Subsystem.
45
Stage 2: Construction of Microstrip Patch Antenna Construction of the microstrip patch antenna was completed in April. Basically, the radiating patch was cut out of the top layer of electrodeposited copper foil on the RT/duroid substrate and matched to the precise dimensions that were calculated and simulated. A band saw was used to actually cut the antenna pattern out of the material. Two microstrip patch antennas were built simultaneously. One of the antennas was used as a transmitting antenna. This antenna was placed on a non-‐conductive plastic backing for mechanical stability. Furthermore, using magnet wire and some basic connectors, the transmitting antenna can be fed directly into laboratory test equipment. The second antenna was used as the receiving antenna, although the team decided to incorporate the antenna subsystem directly onto the printed circuit board. As a result, the initial receiving antenna that was made was not used in the final device. At the time of this writing, we are still in the process of finishing construction of the final printed circuit board results. The addendum to this report will contain more specific information about the final receiving antenna. Unfortunately, the laboratory test equipment available in the Department of Engineering will not easily allow for generating a 3.25 GHz source signal. However, Dr. Ernest Kim, Associate Professor of Electrical Engineering at USD, has given the design team permission to use the following two pieces of test equipment: HP 8756A Scalar Network Analyzer HP 8620C Sweep Oscillator Data sheets for these two testing devices can be found in Appendix C. These two devices allow the team to generate a 3.25 GHz signal to effectively test the antenna subsystem. A basic conceptual overview of the testing configuration can be seen below in Figure 29. The transmitting antenna’s coax feed will be inputted into the network analyzer.
46
Transmitting Antenna
Receiving Antenna Figure 29. Antenna Subsystem Generic Test Setup [17]
The distance the receiving antenna will be from the transmitting source will be varied to attempt to reproduce the input voltage specification for the rectification circuitry, as well as the conditions that were realized through the Broadband Spectrum Survey data. The theoretical output characteristics for both of these two extremes can be found below in Table 10. Table 10. Proposed Testing Conditions and Theoretical Results
Conditions Required for Minimum Design Specifications
Conditions Required to Mimic Broadband Spectrum Survey Data
Antenna Output Power
2.66 mW
1.38 W
Antenna Output Voltage
0.52 V
3.5 V
Power Density
0.968 W/m2
50.20 W/m2
Distance from Transmitting Source
1.0 m
0.15 m
Transmit Power
3.0 W
3.5 W
The receiving antenna will also be rotated and the directivity of the antenna will be determined. From these measurements, a radiation pattern for the antenna can be compared against the radiation pattern that was generated in Ansoft Designer SV. To date, these calculations have not been performed as the team is still in the process of fabricating our final printed circuit board. Detailed information about antenna testing will be included in the addendum discussed above. 47
Stage 3: Integration with Rectification Circuitry As described above, the team decided to produce a printed circuit board that fully integrates the antenna subsystem with the rectification subsystem. The team initially underestimated the complexity of dealing with high frequency circuit design, so it has taken many iterations of our printed circuit design. The major integration issue with inputting the antenna directly into the rectification circuitry is matching the impedances on the transmission line coming off of the receiving antenna. The team plans to use a stub to correct any issues that might arrive during final construction and testing. Information regarding integration issues between these two subsystems will also be included in the report’s addendum.
Rectification Subsystem Testing Stage 1: Simulate simple circuit To begin testing the rectification subsystem, National Instruments’ Multisim 10.1 will be used. This software is available to the team in the Loma 207 laboratory and all team members have extensive knowledge of the program from previous labs. In Multisim’s library are all the components that will be used for designing the rectification circuit. Multisim allows for a variety of testing, including voltage, current and transient analysis, all of which will be used in this phase of the design. First, a simpler variant of the design will be tested at a lower frequency. This is to prove that the design, in essence, will be effective. A five-‐stage charge pump will be tested at 10MHz. The output voltage and current will be measured as well as performing a transient analysis. These values will then be compared against the simulated input power to obtain the efficiency of the system. See Figure 30 for simulation of five-‐stage charge pump.
48
Figure 30. Simulation of 5-‐Stage Charge Pump
Stage 2: Breadboarding Five Stage Charge Pump The next stage is to breadboard the circuit that was simulated above. The most important reason for this is to assure that the calculations done on the computer are accurate and depict how the system will operate. Another important reason to breadboard this simple circuit is to gain better understanding of how the system operates. By being able to easily switch out components and see the effects on the Oscilloscope, the team gains a better understanding of what each component does in the system and how they all interact. To do this testing an Agilent 33250A Function Generator and MSO6012A Oscilloscope were used. See Figure 31 below for the oscilloscope results from the test.
Figure 29. Oscilloscope Results of 5-‐Stage Charge Pump
49
Stage 3: Simulate and Test Seven Stage Charge Pump Stage three of testing the rectification circuit is simply to repeat stages one and two for the seven stage charge pump operating at 3.25 GHz. This is the most important stage of testing since it is the most important part of this subsystem. The major challenge of the rectification subsystem is designing the circuit itself. Multisim will be used just as in stage one to simulate the circuit and to perform the transient analysis. Then the circuit will be assembled and directly connected to a 500 mV input operating at 3.25 GHz. Stage 4: Integration After the rectification circuit is fully tested on its own, it can be integrated into the rest of the overall system. First it will be tested with the LT1965 linear regulator. This testing will input a variety of voltages into the rectification circuit and ensure that the output of the LT1965 is a constant 3.3 V. Next the LT3225 and its’ output will be connected. This test will ensure that the rectification circuit can provide enough power to pass through the components and power the output. Lastly the system will be integrated with the antenna and tested using intentional transitions.
Energy Storage and Distribution Subsystem Testing After selecting the LTC3225 as the optimal means of providing a constant voltage across the supercapacitors, the team realized that the chip was only commercially available in a DFN package. This packaging is made for mass production, and, as a result, is not conducive for easily testing in a laboratory setting at low quantities. However, after talking with a Linear Technologies representative, the team was able to receive a demonstration board free of charge. Unfortunately, the team realized early on that there was a threshold to the amount of testing that could be accomplished on the energy storage and distribution subsystem. This threshold was based on the success of the testing of the other two primary subsystems. As a result, all three team members focused primarily on constructing and testing the two primary subsystems. Due to the immense technical difficulties encountered with constructing and testing the two primary subsystems, only initial testing of the energy storage and distribution subsystem was undertaken. Since the energy storage and distribution subsystem is not essential to the overall operation of the RF energy harvesting device, the team decided collectively to focus completely on ensuring that the two primary subsystems would be integrated properly. Nonetheless, the team is still confident in the actual design of the energy storage and
50
distribution subsystem. With more time, integrating this secondary system with the two primary subsystems is entirely possible.
9 – Design Schedule
Based on specific design requirements and a timeline given for the final project, a detailed design schedule along with Gantt charts gives a fairly accurate agenda for the full two semesters of the Senior Design and Practice course. These Gantt charts were originally made during the Fall semester, and the team’s progress in achieving these goals has been continuously monitored by the course instructor during weekly progress reports. The preliminary design stages spanned the full length of the Fall 2008 semester while the final design stages lasted throughout the Spring 2009 semester. This detailed design schedule shows reasonably accurate time requirements in order to complete certain critical phases of the design. The preliminary design review phase was mostly completed on schedule. The only two goals that were not met during the preliminary design phase were choosing the specific supercapacitor values and ordering all components. It was not known at the time these goals were written (early in the fall semester) that a range of supercapacitor values would be tested, and a final value would not be selected until after the Critical Design Review. Furthermore, it was also not understood that the design would take many iterations before reaching the point of being able to purchase parts. However, we are currently at the end of the design and still have some portions of the project that have not been completed. During the spring semester, the design team spent the months of January and February behind schedule. The team did not anticipate the breadth and depth of the technical challenges that this project proposed, nor did the team realize the amount of technical background knowledge in analog circuit design and antenna theory that would be necessary to complete the final design. However, by the time of submission of the Critical Design Review, the team has dedicated much time to ensuring the design provides a solid foundation to begin construction and testing. After the Critical Design Review, the team realized that some of the goals set were unattainable due to the lack of time. Therefore, it was decided to focus in primarily on the two primary systems, the antenna and rectification circuit. This was decided upon because if completed, it would show the proof of concept. All three team members concentrated on the two primary systems to ensure their completion. The secondary systems were put on hold until the primary systems were complete. In the addendum, the team will discuss any progress that is made with the secondary systems. The Gantt charts that the team developed at the beginning of the fall semester, as well as the team’s progress in satisfying each goal, has been included on the next two pages in 51
Figures 36 and 37, respectively. Figure 36 includes an overview of the fall semester (Proposal Stage and Preliminary Design Review), and Figure 37 includes an overview of the spring semester (Critical Design Review and Final Design).
52
Figure 30. Gantt Chart for Fall Semester
53
Figure 31. Gantt Chart for Spring Semester 54
10 – Budget
The following table contains updated cost estimates for the design, development, and construction of the RF energy harvesting system. Table 11. Critical Design Review Updated Budget
Rectificatio n Subsystem
Energy Storage / Distribution Subsystem
Cost per Unit
Total Cost
$0.00
$0.00
Ansoft Designer SV Software
1
$0.00
$0.00
BAT63-‐07WE6811 Schottky Diodes
50
$0.77
$130.55
Linear Technology LT1965 Linear Regulator
5
$3.14
$15.70
MA0603XR-‐561K-‐500PR 560 pF Capacitor
50
$0.05
$2.50
Capacitors (Various)
15
N/A
$5
Linear Technology LTC 3225 Supercap Charger
4
$2.86
$11.44
Linear Technology LTC 3225 Demo Board
1
N/A
$0
Various Supercapacitors
8
N/A
$30
Capacitors (various capacitances)
22
N/A
$10
Resistors (various resistances)
20
N/A
$2
Microchip PIC10F202 Flash Microcontroller
5
$0.57
$2.85
Light Emitting Diode
5
$0.30
$1.50
Printed Circuit Board Fabrication Materials
5
N/A
$176.19
2
Total Shipping Costs To Date. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
$85.19
Total Tax To Date. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
$18.94
Miscellaneous
Quantity
RT/duroid© 5880 High Frequency Laminate
Sub
Ant enn a
Description of Cost
Total Cost Estimate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . $491.86
55
Please note that the team was able to receive complimentary samples of the high frequency laminate from Rogers Corporation for use in constructing the antenna subsystem and the final printed circuit board. A demonstration board for the LTC 3225, which is regularly $125, was also donated to our group from Linear Technology for educational purposes. The cost estimate for these items reflects the great opportunities that our group was able to capitalize on. During the fall semester, SAIC reviewed the preliminary cost estimate that was included with the original Proposal and verbally agreed to fund the project up to our original cost estimate of $700. However, at the completion of the project, the team only spent $491.86. At the completion of the project, the design team lowered the project’s final cost from the Critical Design Review budget due to a more comprehensive understanding of the individual costs associated with purchasing components, as well as due to our decision to self-‐fabricate our own printed circuit boards. Since a larger funding commitment was not probable at the conclusion of the fall semester, the team applied at the start of the spring semester for a research grant from the University of San Diego’s Associated Students. The team was awarded additional funding from Associated Students. However, at the time this additional funding became available, the team did not feel that it was required. As a result, the funding was declined.
56
REFERENCES [1] Rahmel, Ronald S. and Gerald C. Gerace. Method and System for Energy Reclamation and Reuse. United States: Patent US 7268517 B2. 11 September 2007. [2] Shearer, John G., Charles E. Greene and Daniel W. Harrist. POWERING DEVICES USING RF ENERGY HARVESTING. United States: Patent PCT/US2006/021940. 14 December 2006. [3] Vujovic, Dr. Ljubo. Tesla Memorial Society of New York. 10 July 1998. 7 December 2008 . [4] Espejel, Juventino Delfino Roas. "RF to DC Power Generation." Master of Science Dissertation. University of Maryland, 2003. [5] Upson, Sandra. "Putting Wireless Power to Work." IEEE Spectrum June 2008. [6] Silver, J. P. (n.d.). Micro-‐strip Patch Antenna Primer. Retrieved February 22, 2009, from RF, RFIC & Microwave Theory, Design: http://www.zen118213.zen.co.uk/ [7] Moernaut, D. O. (n.d.). The Basics of Patch Antennas. Retrieved February 22, 2009, from Orban Microwave Products: http://www.orbanmicrowave.com/ [8] Microstrip patch antennas. (2008, January 5). Retrieved February 22, 2009, from Microwave
Encyclopedia: http://microwaves101.com/encyclopedia/antenna_ustrip.cfm [9] Frank H. Sanders, B. J. (1996). Broadband Spectrum Survey at San Diego, California. Institute
for Telecommunication Sciences. [10] Theory: Near-‐Field and Far-‐Field. Retrieved March 1, 2009, from Lulea University of Technology: http://www.sm.luth.se/~urban/master/Theory/3.html [11] Pylarinos, L. (2006, May 25). Charge Pumps: An Overview. University of Toronto, Canada. Retrieved from University of Toronto. [12] Tecate Group. (n.d.). Tecate Ultracapacitor Solutions. Retrieved March 1, 2009, from Ultracapacitor Solutions Home: http://www.tecategroup.com/ultracapacitors/ultracapacitors.php [13] Buchmann, Isidor. What's the Role of the Supercapacitor? July 2003. 3 November 2008 . [14] Linear Technology. (2008). LTC3225 150mA Supercapacitor Charger. Retrieved March 1, 2009, from Linear.com: 57
http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1003,C1042,C1098,P 84365,D26420 [15] Linear Technology. (2008, July 23). DC1220B Quick Start Guide -‐ LTC3225EDDB Low Profile Regulated Dual Cell SuperCAP Charger. Milpatas, California, United States of America. [16] Intel. (2000). Leaded Surface Mount Technology (SMT). Retrieved March 1, 2009, from Intel.com: http://www.intel.com/design/packtech/Ch_07.pdf [17] Zibrat, T. (2002, March 21). Test Results -‐ Round 2. Retrieved March 2, 2009, from K3TZ Ham Radio Experimentation Page: http://www.qsl.net/k3tz/
58
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix A
Resumes Hanner Hart Kelty Lanham Michael Sass
59 k
HANNER HAZEN HART 3665 PAUL JONES AVE. Ƈ SAN DIEGO, CA 92117 (208) 447-9919 [email protected] EDUCATION University of San Diego, San Diego, CA BS/BA in Electrical Engineering Minor in Mathematics
GPA: 2.99/4.0 Major GPA: 3.21/4.0 Expected Graduation: May ‘10
Relevant Coursework
Electrical Power Systems Logic Design (VHDL) Digital Logic Design Programming Circuits Communication Principles and Circuits
Microcomputers (8051) Electronics Signals & Systems Applied Mathematics Probability and Statistics Control Systems
DESIGN EXPERIENCE Microprocessor Fall ‘07 Designed and Analyzed a microprocessor with an Intel 8051 microcontroller. Programmed to act as a Digital Thermostat which analyzed and controlled temperature. Built the microprocessor from scratch, including soldering all chips. Digital Alarm Clock Spring ‘08 Designed alarm clock using a Xilinx Spartan 3-E FPGA . Programmed the design using Xilinx ISE Design Suite. Design featured accurate time and available alarm clock. Nifty Project Spring ‘06 Designed an automatic Golfing Tee using Nifty electric motors and parts. WORK EXPERIENCE University of San Diego San Diego, CA Computer Lab Assistant January ’06-Present Assisted students in Computer lab with Microsoft Word, Excel, and PowerPoint Documents. Helped students with their homework assignments. SKILLS
Computer Skills MATLAB MathCAD Maple C/C++
Electronic Workbench (Multisim & Ultiboard) VHDL AutoCAD
AFFILIATIONS University of San Diego Collegiate Football ƒ Division 1AA Mid-Major National Champions
Microsoft Office (Excel, Word, PowerPoint) Assembly Language (8051 Architecture)
Fall ’05-Present 2005, 2006
1349 B Goshen St San Diego, CA, 92110
Phone 831.234.7089 E-mail [email protected]
Kelty Lanham Education
[ September 2005-Present ]
University of San Diego
BA/BS Electrical Engineering/ Math Minor Expected Graduation: May 2010 Relevant Coursework
Electrical Power Systems Logic Design (VHDL) Digital Logic Design Applied Mathematics Programming Communication Principles and Circuits Microcomputers Electronics Signals & Systems Control Systems
Interests and activities
NROTC- Aug 2005-Present Future plans on entering the Navy to become a Naval Aviator.
Work experience
[ June-Aug 2004, 2005,2006 ]
Parreira Almond Processing Co Los Banos, CA
Electrical Engineer Assistant Working hand in hand with an electrical engineer to rewire and maintain the plant. Inc running/pulling wire, wiring motors, setting up controls, etc. [ June-‐Aug 2007 ] Moore and Sons Marine Engine Repair Santa Cruz, CA Assistant Mechanic
Worked with a mechanic to repair marine inboard, outboard and stern-‐ drive engines. [ Oct 2005-‐ Present ] USD Parking Services San Diego, CA
Parking Service Supervisor Supervised 22 people as well as office/administrative duties Security clearance
Available upon request
Michael D. Sass Phone: (952) 292-6369
5998 Alcalá Park Unit 6130 • San Diego, CA 92110
Email: [email protected]
Education University of San Diego, San Diego, CA BS/BA in Electrical Engineering Minor in Mathematics
GPA: 3.97 / 4.00 Expected Graduation: Dec ’10
Select Coursework (through Fall 2008) Applied Electromagnetics, Electrical Power, Communication Principles & Circuits, Electronics, Systems Logic Design (VHDL), Signals and Systems, Fourier Methods and Wavelets in Signal Processing, Microcomputers (8051),
Design Experience Digital Alarm Clock Project ƒ Designed around a Xilinx Spartan 3-E FPGA platform ƒ VHDL written using Xilinx ISE Design Suite
Spring 2008
Digital Thermostat Project ƒ Intel 8051 used to analyze and control temperature ƒ RS-232 compatible serial port and LCD display provided user interface ƒ DC motors simulated heating/air conditioning subsystems ƒ $VVHPEO\ODQJXDJHSURJUDPPLQJZULWWHQXVLQJ.HLOȝ9LVLRQ
Fall 2007
Work Experience University of San Diego San Diego, CA Mathematics Department Grader September ’06 – Present ƒ Grade sections of Calculus II & III, Differential Equations, and Applied Mathematics II
Skills ƒ C/C++ ƒ Electronics Workbench (Multisim & Ultiboard) MATLAB, Mathcad, & Maple
ƒ Assembly Language (8051 Architecture) ƒ VHDL ƒ AutoCAD
Awards & Affiliations Institute of Electrical and Electronics Engineers ƒ Outstanding EE Junior at USD [2008] ƒ Outstanding EE Sophomore at USD [2007] ETA KAPPA NU – Electrical and Computer Engineering Honor Society ƒ Member [Spring 2008 – Present] Naval Reserve Officers Training Corps, San Diego Consortium ƒ Company Executive Officer [Spring 2008] ƒ Platoon Commander [Fall 2007] Federal Communications Commission ƒ Licensed Extra class amateur radio operator [2006 – Present] k 2
ƒ
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix B
Calculations – Matlab Code Main Code Functions: Microstrip Patch Antenna Dimensions Power Density Lab Testing Conditions
k 3
Main Code %S Band RF Energy Harvesting Team %February 18, 2009 %We have decided to create a microstrip patch antenna array in our project %This code will determine the relevant design specifications for a single %element of the antenna and ground plane (i.e. substrate) clear all %Input Specifications: %Operating Frequency = 3.25 [GHz] freq = 3.25E9; %Dielectric Constant of the ground plane substrate %Typical PCB = 4.6 +/- 0.2 dielectric = 4.6; %Height Above Substrate height_in_mm = 1.5; %[meters] height = height_in_mm * 1E-3; %Function to compute antenna / ground plane dimensions [antennaWidth, actualLength,lengthGroundPlane,widthGroundPlane] = antennaCalculations(freq,dielectric,height); stringWidth = sprintf('The microstrip patch antenna array element width is %d [mm]', antennaWidth); stringLength = sprintf('The microstrip patch antenna array element length is %d [mm]', actualLength); stringGroundWidth = sprintf('The ground plane (substrate) width is %d [mm]',widthGroundPlane); stringGroundLength = sprintf('The ground plane (substrate) length is %d [mm]',lengthGroundPlane); disp(stringWidth) disp(stringLength) disp(stringGroundWidth) disp(stringGroundLength) %Function to compute power density from Broadband Spectrum Survey powerIn_dBm = 20; %Gain [dBi] of Broadband Spectrum Survey equipment Gain = 3; powerDens = PowerDensity (freq, powerIn_dBm, Gain); stringPD = sprintf('The calculated power density is %d [W/m^2]', powerDens); disp(stringPD) %Gain of microstrip antenna [dBi] gainMicrostrip = 6; %Input antenna impedance = 75 [ohms]
k 4
impedanceInput = 75; [voltageInput, powerInput, areaEffective] = InputVoltage (freq, powerDens, gainMicrostrip, impedanceInput); stringPowerInput = sprintf('The power input using Broadband Spectrum Survey data is %d [W]',powerInput); stringVoltageInput = sprintf('The voltage input Using Broadband Spectrum Survey data is %d [V]',voltageInput); disp(stringPowerInput) disp(stringVoltageInput) %Lab Setting Conditions %Gain of transmitter in dBi gainTransmitter = 15; %Power is expressed in watts powerTransmitter = 4; %Radius of harvesting antenna from transmitter [meters] radiusFromTransmitter = 0.45; [LabInputVoltage, LabInputPower, LabPowerDensity] = LabConditions (freq, impedanceInput, areaEffective, gainTransmitter, powerTransmitter, radiusFromTransmitter); stringLabPowerInput = sprintf('The power input using lab test conditions is %d [W]',LabInputPower); stringLabVoltageInput = sprintf('The voltage input using lab test conditions is %d [V]',LabInputVoltage); stringLabPowerDensity = sprintf('The power density using lab test conditions is %d [W/m^2]', LabPowerDensity); disp('') disp(stringLabPowerInput) disp(stringLabVoltageInput) disp(stringLabPowerDensity) %To mimic Broadband Spectrum Survey data at 3.25 [GHZ], transmit 4 [W] at a distance of 0.45 [m] %Military Operational Conditions %AN/SPY-1/D Radar (AEGIS Combat System) %Gain of transmitter in dBi gainTransmitter_M = 25; %Power is expressed in watts powerTransmitter_M = 4e6; %Radius of harvesting antenna from transmitter [meters] radiusFromTransmitter_M = 1000; [LabInputVoltage_M, LabInputPower_M, LabPowerDensity_M] = MilitaryConditions (freq, impedanceInput, areaEffective, gainTransmitter_M, powerTransmitter_M, radiusFromTransmitter_M); stringLabPowerInput_M = sprintf('The power input using military conditions is %d [W]',LabInputPower_M); stringLabVoltageInput_M = sprintf('The voltage input using military conditions is %d [V]',LabInputVoltage_M); stringLabPowerDensity_M = sprintf('The power density using military conditions is %d [W/m^2]', LabPowerDensity_M);
k 5
disp('') disp(stringLabPowerInput_M) disp(stringLabVoltageInput_M) disp(stringLabPowerDensity_M) %MQ-1 Predator Drone wing surface area = 11.5 [m^2] - See Wikipedia %Single patch surface area: 27 [mm] x 20 [mm] = 540 [um] %Assuming you could cover 75% of wing with patch antennas, you could have 16,000 patch antennas %Your input power to the system would be 16,000 * 0.2717 [W] = 4.34 [kW] at a distance of 1 [km] from transmitter %Increase the dielectric constant, you can decrease the patch element dimenions = more antennas = more power harvested!
Functions Microstrip Patch Antenna Dimensions %February 18, 2009 %Fucntion to determine dimensions of antenna and ground plane for %microstrip patch antenna element function [antennaWidth, actualLength,lengthGroundPlane,widthGroundPlane] = antennaCalculations(freq,dielectric,height) %Speed of Light [m/s] c = 3.0E8; %Antenna Width [meters] width = c/(2*freq*sqrt((dielectric+1)/2)); %Antenna Width [mm] antennaWidth = (width*1000); %Effective Dielectric Constant dielectricEffective = (dielectric+1)/2+((dielectric-1)/2)*(1+12*(height/antennaWidth))^(1/2); %Effective Length [meters] lengthEff = c/(2*freq*sqrt(dielectricEffective)); %Effective Length [mm] lengthEffective = (lengthEff *1000); %Length Extension [meters] intermed = 0.412*height; top = (dielectricEffective+0.3)*((antennaWidth/height)+0.264); delta = (intermed*top/((dielectricEffective-0.258)*((antennaWidth/height)+0.8))); %Length Extension [mm] deltaLength = (delta*1000); %Actual Length of Patch Antenna actualLength = (lengthEffective - 2*deltaLength);
%Ground Plane (Substrate) Dimensions
k 6
lengthGroundPlane = (6*height +actualLength); widthGroundPlane = (6*height +antennaWidth); end
Power Density %This function will return the power density when given the input power to %a system and an antenna's effective area function [powerDens] = PowerDensity(freq, powerIn_dBm, Gain) c= 3.0e8; powerInWatts = 1e-3*10^((powerIn_dBm)/10); wavelength = (c / freq); powerDens = (4*pi*powerInWatts)/((wavelength^2)*Gain); end
Lab Testing Conditions %This function will compute the input power/voltage to our system for the given lab testing conditions function [InputVoltage, InputPower, PowerDensity] = LabConditions (freq, impedanceInput, areaEffective, gainTransmitter, powerTransmitter, radiusFromTransmitter) gainDimensionless = 10^(gainTransmitter/10); PowerDensity = (powerTransmitter*gainDimensionless)/(4*pi*radiusFromTransmitter^2); InputPower = (PowerDensity*areaEffective); InputVoltage = sqrt(InputPower*impedanceInput); end
k
7
S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix C
Component Data Sheets Antenna Subsystem Rogers Corporation RT/duroid© 5880 Rectification Subsystem 5082-‐2835 Schottky Diode LT1965 Linear Regulator MA0603XR-‐561K-‐500PR 560 pF Capacitor Energy Storage and Distribution Subsystem LTC3225 Supercapacitor Charger PIC10F200 Test Equipment HP 8756A Scalar Network Analyzer HP 8620C Sweep Oscillator k
8
Advanced Circuit Materials Division 100 S. Roosevelt Avenue Chandler, AZ 85226 Tel: 480-961-1382, Fax: 480-961-4533 www.rogerscorporation.com
Advanced Circuit Materials
D a t a S h ®
RT/duroid 5870 /5880 High Frequency Laminates
k
9
forced PTFE composites are designed for exacting stripline and mi crostrip circuit applications. Glass reinforcing microÀEHUVDUHUDQGRPO\RULHQWed to maximize beneÀWVRIÀEHUUHLQIRUFHPHQWLQWKH direc tions most valuable to circuit producers and in the ÀQDOFLUFXLWDSSOLFDWLRQ The dielectric constant of RT/duroid 5870 and 5880 laminates is uniform from panel to panel and is constant over a wide frequency range. Its low dissipation factor extends the usefulness of RT/duroid 5870 and 5880 to Ku-band and above. RT/duroid 5870 and 5880 laminates are easily cut, sheared and machined to shape. They are resistant to all solvents and reagents, hot or cold, normally used in etching printed circuits or in plating edges and holes. Normally supplied as a laminate with electrodeposited copper of ¼ to 2 ounces/ ft. WRǍP RQ both sides, RT/duroid 5870 and 5880 composites can also be clad with rolled copper foil for more critical electrical applications. Cladding with aluminum, copper or brass plate may also be speciÀHG 2
When ordering RT/duroid 5870 and 5880 laminates, it is important to specify dielectric thickness, tolerance, rolled or electrodeposited copper foil, and weight of copper foil required.
RT/duroid 5870 and 5880 glass microÀEHUUHLQ®
he information in this data sheet is intended to assist you in designing with Rogers’ circuit material laminates. It is not intended to and does not create any warranties express or implied, including any warranty of merchantability or ÀWQHVVIRUD particular purpose or thatthe results shown on this data sheet will be achieved by a user for a particular purpose. The user should determine the suitability of Rogers’ circuit material laminates for each application.
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Typical Values RT/duroid 5870/5880 Laminates
STANDARD THICKNESS: 0.005” (0.127mm), 0.031” (0.787mm) 0.010” (0.254mm), 0.062” (1.575mm) 0.015” (0.381mm), 0.125” (3.175mm) 0.020” (0.508mm),
STANDARD PANEL SIZE: 18” X 12” (457 X 305mm) 18” X 24” (457 X 610mm) 18” X 36” (457 X 915mm) 18” X 48” (457 X 1.224m)
STANDARD COPPER CLADDING: ¼ oz. (8 ȝP HOHFWURGHSRVLWHGFRSSHUIRLO òR] ȝP R] ȝP R] ȝP HOHFWURGHSRVLWHGDQG rolled copper foil.
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S-‐Band Radio Frequency Energy Harvesting An Integrated Solution for Low-‐Powered Embedded Systems
Appendix D
Self-Fabrication of Printed Circuit Board – Detailed Procedure Developed April 25, 2009
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Self-Fabrication of Printed Circuit Board – Detailed Procedure Developed April 25, 2009 1. First, cut the copper clad board down to the desired size of the final printed circuit board. 2. Use Scotch Brite pads to clean off the copper board in conjunction with isopropyl solution (90% concentrate is preferred). Make sure entire board is defect free before continuing (i.e. no fingerprints, oxidation, glue, etc.). 3. Print the circuit board layout (from Ultiboard) onto a high gloss photo paper. It is important to use a laser jet printer and photo paper designed for a laser jet printer. It is desirable to cut the printed sheet down to a size slightly larger than the actual size of the final printed circuit board, as well. If the board contains a bottom layer, print a copy of that design out onto a separate piece of photo paper. 4. Place the high gloss paper over the copper layer. If a second layer exists, place that piece of paper over the bottom of the board. Place tape between the board and the high gloss paper. Only place tape on a portion of the copper board that will not have any traces or components. The tape will ensure that the high gloss paper does not move during the heating process. 5. Place a piece of regular paper on top of the gloss paper. Also place a piece of paper between the ironing surface and the copper board. Apply an iron set on the highest setting to the paper. Use the largest iron you can find, and make sure that no water is in the iron. 6. Apply the iron evenly across the entire board (i.e. move it around) with much pressure. Once you think you have applied it long enough, leave it on for a few more minutes to be sure. You want the entire toner ink to be transferred to the copper surface. This typically takes 20-‐30 minutes depending on the amount of toner that needs to be transferred from the paper to the board. 7. Place the copper board (and photo paper) into a tub of water. This will help loosen the paper from the copper board. Use a toothbrush to ensure that all paper is removed from the copper board. A large disposable Ziploc container can be used as the tub. 8. If there are some spots where the toner wasn’t fully transferred to the copper, use a fine tip Sharpie (or an etching pen) in those spots. The Sharpie has similar chemical properties as the toner. If large amounts of toner weren’t transferred, steps 1-‐7 will have to be repeated. 9. Place 1 part Muriatic Acid and 2 Parts Hydrogen Peroxide in another disposable Ziploc container. Place the Hydrogen Peroxide in the container first, and then add the Muriatic acid. Do NOT, under any circumstances, mix the solutions the other way around. Since Muriatic Acid is a toxic chemical, only mix the solutions in a location where the fumes can be vented, too. Do this outdoors if necessary. Also, you need approximately 1 oz. of Muriatic acid for 11 sq2 of 1 oz. 16
copper foil. Even though the acid will saturate quickly, do not use more than required. Use rubber gloves and safety glasses at all times while handling these chemicals. 10. Place the copper clad board in the etching solution and let it sit there for around 3-‐5 minutes. To speed up the etching process, use a sponge and rub the copper. You can heat the solution to around 100F to speed up the process, as well. 11. Note: It is important to ensure that portions of the copper that don’t have an etching on it should be cut off before placing in the solution. Large portions of copper that don’t have etchings will allow the chemical to reach the bottom layer and it could corrupt the entire process. 12. Once the etching process has been completed, remove the copper board and place in a tub of water. Leave in the water for approximately 5-‐10 minutes to ensure that all of the etching solution has been removed. 13. At this point, the only copper on the board should be where the toner was transferred onto the copper board. 14. Next, place the copper board in a solution of pure acetone (paint thinner). This process will remove the toner from the remaining copper. You might need to use a sponge/rag to rub off the toner. 15. Next, if available, use a Silicon Conformal Coating. This coating will prevent the PCB board from oxidizing. It will also reduce the chance of having cold solder joints. However, Silicon Conformal Coating typically takes 24-‐48 hours to fully dry. 16. Before soldering any chips, use a digital multimeter to check that there are no shorts between electrical connections on the copper traces.
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