a1254_1.pdf OThF7.pdf
Experimental Demonstration of a Complete SPINet Optical Packet Switched Interconnection Network Assaf Shacham, Howard Wang, and Keren Bergman Department of Electrical Engineering, Columbia University, 500 W. 120th St., New York, New York 10027
[email protected] Abstract: A 4×4 fully implemented photonic interconnection network is experimentally demonstrated. The network routes 60 Gb/s wavelength-striped packets (6×10 Gb/s) error-free in the optical domain, resolves contentions, and detects dropped packets via a unique acknowledgement protocol. OCIS Codes: (060.4250) Networks; (200.4650) Optical interconnects
1. Introduction SPINet (Scalable Photonic Integrated Network) is an architecture for optical packet switched interconnection networks with applications in local area networks, storage area networks and especially as a multiprocessor interconnect in high-performance computing (HPC) systems [1–3]. A SPINet switching fabric is comprised of a set of wideband 2×2 photonic switching nodes [2] organized as a multistage interconnection network (MIN) and implemented on a photonic integrated circuit (PIC). Messages are switched using semiconductor optical amplifier (SOA) gates, allowing for wideband transmission, packet-rate granularity and integrability, which are necessary to facilitate the high bandwidth, ultra-low latency, and high utilization required for future interconnection networks [4]. Because it is targeted for photonic integration, SPINet cannot employ optical buffering of any kind and messages have to be dropped upon contention. A novel physical layer acknowledgement protocol is used to provide a dropdetection mechanism. Integration of the network on a PIC facilitates fast transmission of these optical ack pulses and their reception by the source while the message is still being transmitted. As such, re-transmission can occur with minimal latency and the penalty incurred for message dropping is greatly diminished. Previous work on the SPINet architecture included performance study under traffic patterns commonly used in HPC systems [1] and an experimental demonstration of a prototype switching node [2]. Methods of increasing the network throughput by utilizing its path diversity and the acknowledgement protocol were also investigated [3]. In this paper we present, for the first time, a fully implemented 3-stage SPINet network demonstrator with 4 input ports and 4 output ports. The network is comprised of a single-stage distribution network, used to increase the network throughput and its immunity to adversarial traffic patterns [3], and a 2-stage routing network providing full 4×4 mapping. While the macro-scale network reported here is not the envisioned fully-integrated SPINet, this implementation nonetheless demonstrates all the critical architectural concepts including optical address encoding/decoding, photonic end-to-end payload transmission and backward transmission of ack pulses. Experiments performed on the demonstration network verify its correct functionality in routing and switching of both optical packets and ack pulses. Error-free transmission (BER