Last (family) name: ____SOLUTION__________ First (given) name: _________________________ Student I.D. #: _____________________________ Circle section:
Saluja
Ramanathan
Department of Electrical and Computer Engineering University of Wisconsin - Madison ECE/CS 352 Digital System Fundamentals
Final Examination Tuesday, December 16, 2003, 12:25 – 2:25 PM
Instructions: 1. Closed book examination. 2. No calculator, hand-held computer or portable computer allowed. 3. You must show your complete work. Points will be awarded only based on what appears in your answer book. 4. Five points penalty if you fail to enter name, ID# , or instructor selection. 5. No one shall leave the room during the last 5 minutes of the examination. 6. Upon announcement of the end of the exam, stop writing on the exam paper immediately. Pass the exam to aisles to be picked up by a TA. The instructor will announce when to leave the room. 7. Failure to follow instructions may result in forfeiture of your exam and will be handled according to UWS 14 Academic misconduct procedures.
Problem
Points
1
18
2
15
3
13
4
15
5
15
6
8
7
8
8
8
Total
100
ECE/CS Final Exam
Score
1
1. (18 points) Truth table, canonical forms, minimization (a) (5 points) Represent function realized by the logic circuit given below in Sum of Minterms canonical form.
A B
g
C D
F = [( A + B + A ) + ( A + B + B )] ⋅ A ⋅ ( C D ) F = A ⋅ B ⋅C + A ⋅ B ⋅ D
g(A,B,C,.D) = ( 8, 10, 11 )
(b) (4 points) Draw a realization of the function below in two level NAND/NAND form. Assume that inputs are available only in uncomplimented forms.
F= A + B ⋅C + B ⋅C + D
ECE/CS Final Exam
2
(c) (4 points) Represent F(A,B,C,D) in the equation above (Problem 1b) in Product of Maxterm canonical form.
F(A,B,C,.D) = ( 3, 5 ) (d) (5 points) A combinational circuit F depends on three inputs A, B, and C. The inputoutput behavior of the circuit is shown in the following waveforms. Write the function F in minimum two level SOP form. You must show all your work. No points will be awarded for just writing the final answer.
A
B
C
F
Answer:
ECE/CS Final Exam
F= A + B ⋅C
3
2. (15 points) Minimization – Quine-McClusky method (Tabular method) Prime implicant generation Let: G(w,x,y,z) = ∑ m(0, 4, 5, 6, 7, 9, 10, 12, 13, 15) Execute the Quine-McCloskey algorithm to find all the Prime Implicants of the function The algorithm has been started for you below (minterms are listed in increasing 1’s count order). Complete the algorithm and CIRCLE the PRIME IMPLICANTS. You will be penalized severely if any of the implicant or prime implicant generated by is not an implicant or prime implicant.
mi
Index Order
√
1-Cubes
√
0
0000
√
00-0
4
0100
√
010-
√
-10-
5
0101
√
01-0
√
-1 - 1
6
0110
√
-100
√
9
1001
√
01–1
√
10
1010
12
1100
7
01--
-101
√
√
01-1
√
0111
√
1–01
13
1101
√
110-
√
15
1111
√
-111
√
11-1
2-Cubes
√
Answer: The prime implicants are: 1010
0–00
1–01
01--
-10-
-1-1
ECE/CS Final Exam
4
3. (13 points) Finite state machine – Excitation map (a) (12 points) A single input six state (Sa, Sb, Sc, Sd, Se, Sf) finite state machine is realized using 3 flip-flops. A D type FF is used to realize the variable Q1, a T FF is used to realize the variable Q2, and a JK type FF is used to realize the variable Q3. Partially completed exitation map and the next states are listed in the table below. Complete all entries in the table. Note that two combinations of state encodings are not used and these are Q1 Q2 Q3 = 010 and 111.
State Sa Sb Sc Sd Se Sf -
State Code Present State Q1 Q2 Q3 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1
Input Next State Output Flip-Flop inputs I Q1(t+1) Q2(t+1) Q3(t+1) Y D1 T2 J3 K3 0 1 1 0 0 0 0 1 X 1 0 1 0 0 0 0 0 X 0 0 0 1 0 X 1 1 0 1 1 0 0 1 X 0 0 1 0 X X X X X X X X 1 X X X X X X X X 0 0 0 1 1 X 1 1 0 1 1 0 1 1 X 0 1 0 0 0 0 1 1 1 1 0 X 1 1 0 1 0 1 0 1 X 0 0 0 1 1 X 1 1 1 1 0 1 0 0 X 1 0 0 0 0 0 1 0 1 1 0 X 1 0 1 0 1 0 0 0 X 0 X X X X X X X X 1 X X X X X X X X
(b) (1 points) Is the above machine a Mealy or a Moore machine? Answer: Mealy, because when the machine is in state 101 it produces outputs based on the input value.
ECE/CS Final Exam
5
4. (15 points) Sequential circuit design: Problem description to FSM ,QWKLVSUREOHP\RXDUHWRGUDZDVWDWHGLDJUDPRIDSDWWHUQUHFRJQL]HU7KHSDWWHUQUHFRJQL]HUKDVRQH LQSXW;DQGRQHRXWSXW=7KHRXWSXW=JRHVKLJKLILWVHHVDSDWWHUQRQWKHLQSXWH[FHSWZKHQLV LPPHGLDWHO\SUHFHGHGE\WKHSDWWHUQ)RUH[DPSOHLQSXWSDWWHUQVKRXOGKDYHDRXWSXWDWWKH WKELWEXWWKHLQSXWSDWWHUQVKRXOGQRWSURGXFHDDWWKHWKELW$OVRDVVXPHWKDWWKHUHLVQR VKDULQJRIVLQWKHSDWWHUQGHWHFWLRQ7KXVLQSXWSDWWHUQRIVKRXOGSURGXFHDRXWSXWDWWKHWK ELWDQGDDWWKHWKELW$OVRDQLQSXWSDWWHUQVKRXOGSURGXFHDDWWKHQGDQGWKHWKELW SRVLWLRQV$IWHUSRZHUXSDVVXPHWKHUHFRJQL]HUVWDUWVDWWKHVWDWHFDOOHG,1,7'UDZDVWDWHGLDJUDPRI D0HDO\W\SH)60IRUWKLVSDWWHUQUHFRJQL]HU
ECE/CS Final Exam
6
5. (15 Points) Datapath (a) (11 points) The simple datapath studied in Chapter 7 is used for this question. The detailed description of the micro-operations and control bits is attached to the end of this exam. Use it to help answer the following questions. FILL in the table below with the appropriate missing entries. If the field is unused, denote it by placing a dash " -- " in the field. All microinstruction values are BINARY. Operation
DA
AA
BA
MB
FS
MD
RW
R0 ← R1 + R2
000
001
010
0
00010
0
1
R3 ← (57)16
011
-
-
-
-
1
1
0101 0111
or
011
-
-
1
10000
0
1
-
0101 0111
R3 ← sr R3
011
--
011
0
10100
0
1
--
--
R0 ← R5^(F5)16
000
101
-
1
01000
0
1
-
1111 0101
R2 ← 2×R3
010
011
011
0
00010
0
1
or
010
-
011
0
11000
0
1
-
-
Data in
Constant in
× = multiply (you may have think about this a little)
(b) (4 points) Registers R1 and R2 have the values shown in the table below. Fill in the VALUE of Register R0 AFTER the instruction executes. Also fill in the C, Z, N, and V bits that change based on the operations. NOTE: all representations are in 2’s complement format and arithmetic operations take place using 2’s complement arithmetic. Operation
R0(t+1)
R1(t)
R2(t)
C
V
Z
N
R0 ← R1 + R2
00000000
11111111
00000001
1
0
1
0
R0 ← R1 – R2
11111110
11111111
00000001
1
0
0
1
11111111 + 00000000 1 00000000
ECE/CS Final Exam
11111111 + 11111111 1 11111110
7
6. (8 points) ASM realization Consider the ASM given below. Implement this using one flip-flop per state approach. Some of the components needed for the implementation are drawn below. You may require additional gates to implement the logic. Use as few gates as possible. Excessive use of additional gates will be penalized.
ECE/CS Final Exam
8
7. (8 points) RAM Design and all the relevant information for a memory module is given in the figure below.
R/W 16
14
CS 14
1
M1
0
1
1 2 3
CS 14
1
M2
CS
data bus
CS 14
1 M3
CS 14
1
M4
Answer the following: (a) (1 points) What is the size of module M1:
16
(b)(1 points) What is the size of this memory:
64
Kb Kb
Where K = 210 Where K = 210
(c) (2 points) If an address (54A3)16 and a read command is issued which memory module will place date on the data bus. Module M2 (d) (2 points) What is the maximum address of any bit in M2. Write your answer in Hex. 7FFF (e) (2 points) What is the minimum address of any bit in M3. Write your answer in Hex. 8000 ECE/CS Final Exam
9
8. (8 points) ROM and PLDs (a) (4 points) An 8X2 bit ROM given below is to be used to realize a full adder. Program this ROM.
A 0 0 0 0 1 1 1 1
0 1
Ai
2 3
Bi
4
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
S 0 1 1 0 1 0 0 1
C 0 0 0 1 0 1 1 1
5 Ci
6 7
Si
Ci+1
(b) (4 points) Realize the three variable function F = A ⊕ B ⊕ C using the PLD (attahced figure if a PAL) provided. Note that I have already marked the inputs to the PAL as well as the pin at which the function F should be produced.
A ⊕ B ⊕ C = A B C + A B C + A B C + ABC = A ( B C + B C ) + A B C + ABC
ECE/CS Final Exam
10
ECE/CS Final Exam
11
Basic Identities of Boolean Algebra 1. X + 0 = X
2. X⋅ 1 = X
Existence of 0 and 1
3. X + 1 = 1
4. X⋅ 0 = 0
Existence of 0 and 1
5. X + X = X
6. X ⋅ X = X
Idempotence
7. X + X =1
8. X⋅ X = 0
Complement
9. X =X
Involution
10. X + Y = Y + X
11. X ⋅ Y = Y ⋅ X
Commutative Law
12. X + (Y + Z) = (X + Y) + Z
13. X (YZ) = (XY) Z
Associative Law
14. X(Y + Z) = XY + XZ
15. X + YZ = (X + Y)(X + Z)
Distributive Law
16. X + Y = X ⋅ Y
17. X ⋅ Y = X + Y
DeMorgan’s Law
Useful Boolean Identities X + XY = X
X + XY = X + Y
XY + X Y = X
XY + X Z + YZ = XY + X Z
( X + Y )( X + Y ) = X ⋅ Y + X ⋅ Y
( X + Y )( X + Y ) = X
Flip-Flop Characteristics Tables SR Flip-Flop
JK Flip Flop J 0 0 1 1
K 0 1 0 1
Q(t+1) Q(t) 0 1 Q(t )
S 0 0 1 1
R 0 1 0 1
Q(t+1) Q(t) 0 1 Indetminate
T Flip-Flop
D Flip-Flop
ECE/CS Final Exam
D 0
Q(t+1) 0
T 0
Q(t+1) Q(t)
1
1
1
Q(t ) 12