High aspect-ratio combined poly and single-crystal ... - Semantic Scholar
288
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
High Aspect-Ratio Combined Poly and Single-Crystal Silicon (HARPSS) MEMS Technology Farrokh Ayazi, Member, IEEE, and Khalil Najafi, Fellow, IEEE
Abstract—This paper presents a single-wafer high aspect-ratio micromachining technology capable of simultaneously producing tens to hundreds of micrometers thick electrically isolated poly and single-crystal silicon microstructures. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Thick single-crystal silicon structures are released from the substrate through the front side of the wafer by means of a combined directional and isotropic silicon dry etch and are protected on the sides by refilled trenches. This process is capable of producing electrically isolated polysilicon and silicon electrodes as tall as the main body structure with various size capacitive air gaps ranging from submicrometer to tens of micrometers. Using bent-beam strain sensors, residual stress in 80- m-thick 4- m-wide trench-refilled vertical polysilicon beams fabricated in this technology has been measured to be virtually zero. 300- m-long 80- m-thick polysilicon clamped–clamped beam micromechanical resonators have shown quality factors as high as 85 000 in vacuum. The all-silicon feature of this technology improves long-term stability and temperature sensitivity, while fabrication of large-area vertical pickoff electrodes with submicrometer gap spacing will increase the sensitivity of microelectromechanical devices by orders of magnitude. [536] Index Terms—Deep reactive ion etching, high aspect-ratio, MEMS, polysilicon micromachining, silicon micromachining, thick polysilicon.
I. INTRODUCTION
H
IGH-PERFORMANCE microelectromechancial system (MEMS) devices and, in particular, inertial sensors [1] will continue to require fabrication technologies that can combine high aspect-ratio deep dry etching of bulk silicon with polysilicon surface micromachining to realize all-silicon hundreds of micrometers thick microstructures that are electrically isolated from one another and separated by small capacitive gaps. The all-silicon feature of such a technology improves long-term stability and temperature sensitivity. Hundreds of micrometers thick silicon structures have large mass (up to a few milligrams) with reduced Brownian displacement noise, Manuscript received February 16, 2000; revised June 30, 2000. This work was supported by the Defense Advanced Research Projects Agency under Contract DABT63-C-0111 and Contract F30602-98-2-0231. Subject Editor, N. F. de Rooij. F. Ayazi was with the Center for Integrated MicroSystems, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA. He is now with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250 USA. K. Najafi is with the Center for Integrated MicroSystems, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA. Publisher Item Identifier S 1057-7157(00)08030-6.
which make them suitable for precision inertial sensors. Fabrication of large-area vertical capacitors with submicrometer gap spacing will increase the sensitivity by orders of magnitude. By shrinking the capacitive gaps to submicrometer levels, bias and control voltages will also shift down to levels that are acceptable to most current CMOS technologies. However, different size capacitive air gaps are needed in some applications. For example, vibratory gyroscopes that are based on transfer of energy between two vibration modes of a mechanical structure often need relatively large amplitude of vibrations ( 1 m) to increase the mechanical sensitivity of the sensor and reduce its noise floor. In parallel-plate electrostatic actuators, the amplitude of vibration should be kept less than one-tenth of the capacitive air gap for linear operation, demanding for wide air gaps in the range of 10–20 m. Also, both single and polycrystalline silicon microstructures have shown high mechanical quality factors (10 to 10 ) under medium vacuum levels ( 10 mtorr) [2]. Polysilicon with its high mechanical quality factor and orientation-independent Young’s modulus is an attractive structural material for fabrication of symmetrical and homogenous microresonators. Three-dimensional processes for fabrication of polysilicon microstructures [3] and single-crystal silicon microstructures [4] have been previously demonstrated. However, these processes are not capable of “simultaneously” producing hundreds of micrometers thick poly and single-crystal silicon structures with various size capacitive air gaps. The basic polysilicon trench-refill process described in [3] is not capable of producing thick isolated silicon electrodes that are as tall as the main body polysilicon structure and have small capacitive air gaps. In some approaches, the polysilicon microstructure is completely released from the main substrate and transferred onto another substrate to be used as an actuator [5]. A high aspect-ratio polysilicon micromachining technology was presented by the authors [6] that is capable of producing isolated polysilicon electrodes as tall as the main body structure. However, size of the capacitive air gaps in that technology is limited to the thickness of the sacrificial oxide layer, which is less than 2 m, and the fabrication process is somewhat complicated. Some applications need larger air gaps in the range of 10–20 m. Electrical isolation of polysilicon microstructures with larger air gaps (5–10 m) has been also demonstrated using a combination of doped and undoped polysilicon layers [7]. The SCREAM process [4] is a single wafer process that is only capable of making single-crystal silicon structures (and not polysilicon) with limited thickness that are separated by micrometer-sized air gaps.
1057–7157/00$10.00 © 2000 IEEE
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
289
Fig. 1. View of a thick single-crystal silicon electrode separated from a trench-refilled polysilicon structure by submicrometer capacitive gap in the HARPSS process.
This paper presents a single-wafer high aspect-ratio combined poly and single-crystal silicon (HARPSS) MEMS technology [8] that is capable of producing tens to hundred’s of micrometers thick polycrystalline and single crystal silicon microstructures with a simple fabrication process that eliminates the limitations of the previous high aspect-ratio technologies. This all-silicon process utilizes one layer of low-pressure chemical vapor deposited (LPCVD) silicon nitride, one layer of LPCVD silicon dioxide, and one layer of LPCVD polysilicon. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Various size capacitive air gaps ranging from submicrometer to tens of micrometers can be m) realized in this technology. Submicrometer air gaps ( are defined by the thickness of the sacrificial oxide layer and are formed in between polysilicon and single-crystal-silicon structures. Fig. 1 illustrates a single crystal silicon electrode in HARPSS technology, which is separated from a polysilicon structure by submicrometer capacitive gap and anchored through an isolating nitride layer to the substrate. Single-crystal silicon electrodes (or structures) as tall as the polysilicon structures are protected on the sides by deep refilled trenches and are released from the substrate by means of an SF dry-release, which is carried out entirely in a deep reactive ion etcher (DRIE). Electrode plates associated with wider air gaps are both created out of polysilicon. This technology is also capable of simultaneously producing electrically isolated two–dimensional (2-D) (planar) and three-dimensional (3-D) (vertical) polysilicon structures on the same silicon substrate. II. FABRICATION TECHNOLOGY Fig. 2 shows the fabrication process flow for the six-mask HARPSS technology. First, a thin layer of LPCVD silicon nitride (2000–2500 Å) is deposited and patterned to serve as an isolation dielectric layer underneath the electrode bonding pads. To further reduce the parasitic capacitance associated with the electrode pad to the substrate, a layer of silicon dioxide ( 1- m thick) can be encapsulated underneath the nitride layer to increase the dielectric thickness. This layer of
Fig. 2. Fabrication process flow for the six-mask HARPSS MEMS technology.
oxide will add an extra patterning step to the process, but it reduces the parasitic bonding pad capacitance to the substrate by approximately a factor of three. Fifty to hundreds of m deep trenches with straight sidewalls (90 1 ) are then dry etched into a low-resistivity silicon substrate using the Bosch process [9] in a silicon DRIE. A 4- m-thick photoresist, AZP4400 spun at 3 kr/min, was used as a mask for etching 100- m-deep 6- m-wide trenches. The height of these trenches will determine the height of silicon microstructures. Trenches with smooth and straight sidewalls are needed to eliminate void formation in the polysilicon beams, which will be formed by back filling these trenches. Mechanical structures are created by refilling trenches with polysilicon deposited over a sacrificial oxide layer. LPCVD oxide film is deposited at relatively high temperature (920 C) through the reaction of dichlorosilane (SiH Cl and nitrous oxide (N O) to obtain conformal coating inside the trenches. Conformal LPCVD polysilicon layer is deposited at 588 C. The structural polysilicon layer has to be doped to lower its electrical resistance. Doping with boron is preferred over phosphorus due to the fact that the etch rate of boron-doped poly is much less than the etch rate of
290
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
Fig. 3. Result of SUPREM simulation for boron doping of the oxide at 1050 C followed by deposition of poly at 588 C and then 2 h of drive-in at 1050 C.
phosphorus-doped poly in the HF:H O (1 : 1) solution, leaving the poly beams intact after relatively long HF release step.
Fig. 4. Close-up of a tall silicon sense electrode separated from 80-m-thick polysilicon ring resonator by a 1.2-m air gap created through sacrificial oxide etching.
process; Cr/Au (200 Å/3000 Å) is evaporated and patterned to form the electrode bonding pads.
A. Doping of Trench-Refilled Polysilicon Beams
B. Deep Dry Release
A new method has been used to dope the thick polysilicon beams inside deep trenches. Immediately after deposition of the silicon dioxide, the surface of the oxide is doped with boron at 1050 C for 1 h. Since, at this point, trenches are not completely refilled, dopants can easily get inside the trenches and dope the surface of the oxide. After doping, wafers are directly transferred to the polysilicon deposition tube and trenches are refilled by depositing 4 m of LPCVD polysilicon at 588 C. This is followed by 2 h of drive in at 1050 C to out diffuse the dopants from the surface of the oxide into the polysilicon beams. The efficiency of this method has been verified using SUPREM simulation. Fig. 3 shows the result of the simulation for boron doping. The concentration of boron in the outer 1- m layer of poly adjacent to the oxide is in the range of 2.5 10 to 5 10 atoms/cm , which is high enough for most applications. The smaller concentration of boron in poly compared to that on the oxide is due to the fact that the segregation coefficient of boron is less than one [10]. 7500-Å-thick polysilicon films deposited on top of 1- m-thick LPCVD oxide was doped with boron using the above method and a sheet resistance of 22 /Square was measured on these films. After refilling trenches, poly on the surface is etched back and the underneath oxide is patterned to provide anchor points for the poly. From this step on, since all the trenches are completely refilled, lithographical steps (spin casting) can easily be performed using thick resist (e.g., AZP4400 spun at 3 kr/min). After patterning the oxide, more poly is deposited, doped, and patterned. It should be noted that while doping polysilicon films with boron, the doping temperature should be kept less than or equal to 1050 C. Doping at higher temperature, e.g., 1175 C, will cause the surface of polysilicon films to become rough. Polysilicon films with thickness in the range of 2–3 m have been successfully doped at 1050 C for 1 h and no surface roughness was observed. Metallization is performed after the doping
The next step in the process is the deep dry-release step and is performed to release thick silicon microstructures from the substrate and to create larger air gaps. It consists of a deep directional etch (depth of the trenches 10–20 m) followed by a dry isotropic SF6 silicon etch to undercut silicon microstructures (step i in Fig. 2). Both of these steps are performed consecutively in a silicon DRIE such as the surface technology systems (STS) inductively couple plasma (ICP) system. Thick resist (AZP4400 spun at 3 kr/min) is used as a mask for this step. Areas of the silicon substrate that need to be etched away are exposed to the plasma and are bounded with deep trench-refilled beams that have silicon dioxide on their sidewalls. Singlecrystal silicon electrodes and microstructures are protected on the sides from the silicon enchants by the outer oxide coating of trench-refilled beams. After the deep directional etch, the subsequent isotropic SF etch will then isotropically etch (undercut) several micrometers of the silicon at the bottom of the electrodes to release them from the substrate. One has to keep in mind that the isotropic SF etch will etch the silicon at the bottom of trenches laterally, as well as vertically, and, hence, the height of electrodes or silicon structures will be reduced from the height of poly-refilled trenches by the amount of undercut. For 80- m-tall polysilicon structures, 25 m of undercutting at a depth of 80 m inside the silicon has been obtained at a cost of reducing the height of single-crystal silicon electrodes to 50 m. After the deep release step, the thick resist mask is stripped off and sacrificial oxide layers are etched away in HF : H O (1 : 1) solution to create submicrometer capacitive air gaps between the sense electrodes and main body structure. Fig. 4 shows an SEM view of a single-crystal silicon electrode as tall as the main-body polysilicon structure. The single-crystal silicon electrode is anchored on top to the supporting polysilicon layer, which is, in turn, anchored through the isolating nitride layer to the substrate. Vertical polysilicon stiffeners (trench refilled) are also
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
291
Fig. 6. SEM view of an 80-m-thick 1.1-mm diameter HARPSS polysilicon ring gyroscope [11]. Fig. 5. Close-up of tall polysilicon drive and control electrodes separated from 80-m-thick polysilicon ring resonator by wide (10–20 m) air gaps.
incorporated in the structure of the electrodes to ensure their rigidity. The electrical resistance of the silicon electrodes must be small. Since these electrodes are etched out from the silicon substrate, one way of reducing the series resistance is to use low-resilicon wafers sistivity substrate, such as boron-doped cm or less. The alternative way is to with resistivity of 0.1 dope the surface of the wafer with boron right after trenches have been etched into the substrate. C. Various Size Air Gaps Size of the air gaps in this technology is not limited to submicrometer levels. Larger air gaps can be realized with polysilicon trench-refilled electrodes. Larger air gaps are defined by the distance between two adjacent trenches that form parallel plates of a capacitor. The silicon between these trenches is then directionally etched in the STS DRIE machine during the deep release step. If the spacing is so small that deep release etch openings cannot be placed directly between the adjacent trenches m), then the silicon between the two trenches is protected ( with resist on the top, but undercut at the bottom and the sides during the dry release step. This narrow piece of silicon, which is held by the oxide on the sidewall of trenches, will then fall into the HF : H O solution during the sacrificial oxide etch. Fig. 5 shows the SEM view of wide capacitive gaps (10 to 20 m) with polysilicon electrodes fabricated using this technology. III. FABRICATION RESULTS HARPSS technology has been employed to fabricate a number of thick polysilicon vibrating shell gyroscopes with silicon electrodes as tall as the shell structures. Fig. 6 shows the SEM view of an 80- m-tall HARPSS polysilicon ring gyroscope [11]. The ring is 1.1 mm in diameter and the diameter of the support post is 120 m. The width of the ring and support springs is 4 m. Sixteen electrodes are evenly located around the structure; they are approximately 60- m tall and 150- m long and are separated from the ring by a 1.2- m capacitive air gap. We have also fabricated a new four-ring gyroscope
Fig. 7. SEM view of an 80-m-thick 2-mm diameter four-ring gyroscope with meander-shaped springs fabricated through the HARPSS process.
supported by eight meander-shaped springs. An SEM view of this device is shown in Fig. 7. This device is 2 mm in diameter, 80- m thick, and the width of the polysilicon beams is 4 m. The support post is 400 m in diameter. Each meander-shaped spring consists of two semicircular springs in series. This technology provides several important features that are particularly required for high-performance MEMS inertial sensors including microgyroscopes. First, the height of the main body silicon structure and the electrodes can be increased to hundreds of micrometers using DRIE, reducing the Brownian displacement noise of the structures. Second, since the body to sense-electrode gap spacing is defined by the thickness of the sacrificial layer, it can be reduced to a submicrometer level; these two factors together will significantly increase the sense capacitance and, hence, the device output signal. Third, in case of the ring gyroscope, the ring to drive-electrode gap spacing can be made significantly larger than the ring to sense-electrode gap spacing to achieve a larger drive amplitude and, in turn, reducing the noise floor. Fourth, the sensor element can be made out of polysilicon, which has an orientation-independent Young’s modulus and potentially a high mechanical quality factor. Fifth, the all-silicon feature of this technology improves long-term stability and temperature sensitivity.
292
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
IV. PROCESS DESIGN RULES Some design rules should be followed when using the HARPSS process. First, in order to avoid the reactive ion etching (RIE) lag effect, the width of all the trenches that define the polysilicon microstructures should be kept constant. Various width trenches can be used if the difference in the depth of the trenches due to RIE lag is not critical. The maximum width of the trenches is determined by the total thickness of and the polysilicon layer the deposited sacrificial oxide and, hence, a thicker deposition of poly can result in wider trenches and wider polysilicon beams. However, in order to completely refill the trenches at their intersection points, should be kept the maximum width of the trenches (for perpendicular trenches). Since less than LPCVD oxide and polysilicon are typically deposited with a thickness of less than 3 m, the maximum width of trenches is kept less than 7 m. With 1.5 m of oxide and 3 m of polysilicon deposition, 6- m-wide trenches used in this paper were completely refilled at their intersections. As mentioned earlier, trenches with straight sidewalls are required, as bowing of the profile will cause void formation in the trench-refilled polysilicon beams. A trench sidewall that is slightly slanted inward from top to the bottom will eliminate chances of void formation. The other critical step in this process is the deep dry-release step. Size of the etch openings used in this step should preferably be equal in order to avoid RIE lag effect. Electrodes and structures that need to be released from the substrate must be surrounded by trench openings that provide the undercut. Typically, 8–10- m-wide trenches are used in this step. Bigger size openings will result in faster release/undercut of the single-crystal silicon structures. V. RESIDUAL STRESS IN TRENCH-REFILLED POLYSILICON BEAMS In order to investigate the amount of residual stress in 80- m-thick trench-refilled polysilicon beams, a bent-beam strain gauge [12] was fabricated using this technology. An SEM micrograph of a 500- m-long bent-beam strain sensor is shown in Fig. 8. A small amount of lateral displacement can be measured by a vernier scale located at the midpoint of the bent beams. The pitch of the tines is 0.2 m, resulting in a displacement resolution of 0.1 m, and the angle between the bent beam and the long axis of the device is 0.1 rad. Fig. 9 shows the close-up view of the vernier attached to the 80- m-thick polysilicon beams. The center tines are aligned to each other, indicating that the displacement and, hence, the in-plane stress for thick polysilicon trench-refilled beams, are negligible and cannot be measured using on-chip strain sensors. VI. CLAMPED–CLAMPED BEAM MICROMECHANICAL RESONATORS Clamped–clamped beam resonators have also been fabricated using the HARPSS technology to investigate the resonance behavior and quality factor of simple micromechanical structures. Fabricated beams are 80- m tall, 4- m wide, and have var-
Fig. 8. SEM view of a 500-m-long bent-beam strain gauge and a 300-m-long clamped–clamped resonant beam fabricated using this technology.
Fig. 9. Close-up of the strain gauge vernier, showing virtually zero stress on 80-m-thick polysilicon beams.
ious lengths of 300, 500, or 800 m. The SEM micrograph of a 300- m-long clamped–clamped beam was shown in Fig. 8. They are electrostatically resonated in the plane of substrate (lateral vibration mode) using tall electrodes located on both sides of the beams. The natural frequencies of these resonators are given by [13] (1) where is the length of the beam, is the Young’s modulus of the beam material, is the area moment of inertia around the is the mass of the beam. principal axis, and For the clamped–clamped beam structure of Fig. 10, and ; therefore, the fundamental lateral is resonance frequency Hz.
(2)
Table I shows the calculated and measured resonance frequencies of the fabricated beams, assuming a Young’s
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
Fig. 10. Micromechanical clamped–clamped electrostatic actuation and capacitive detection.
293
beam
resonator
with
TABLE I MEASUREMENT RESULTS ON RESONANCE FREQUENCY AND QUALITY FACTOR OF THE VARIOUS CLAMPED–CLAMPED BEAM MICROMECHANICAL RESONATORS FABRICATED THROUGH HARPSS TECHNOLOGY
Fig. 12. Change in the resonance frequency versus dc polarization voltage for an 80-m-thick 4-m-wide polysilicon beam. A bias voltage of 4 V was applied to the sense electrode.
increase in polarization voltage (8–15 V). This high tuning capability is a result of small (1.2 m) capacitive gaps that are created through sacrificial layer etching. Larger capacitive gaps will result in higher tuning voltages. VII. CONCLUSIONS This paper has reported a single-wafer HARPSS MEMS technology that is capable of producing tens to hundreds of micrometers thick electrically isolated poly and single-crystal silicon microstructures. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Various size capacitive air gaps ranging from submicrometer to tens of micrometers can be realized in this technology. Using a bent-beam strain gauge, residual stress in 80- m-thick 4- m-wide trench-refilled vertical polysilicon beams fabricated in this technology has been measured to be zero. 300- m-long clamped-clamped beam resonators have shown quality factors as high as 85 000 in 1-mtorr vacuum. This technology provides features required for high-performance inertial sensors, as well as a range of actuators. The all-silicon feature of such a technology improves long-term stability and temperature sensitivity while fabrication of large-area vertical pickoff electrodes with submicrometer gap spacing will increase the sensitivity by orders of magnitude.
Fig. 11. Frequency response of an 80-m-thick 300-m-long polysilicon beam showing a Q of 85 000 under 1-mtorr vacuum.
modulus of GPa and a density of g/cm for 4- m-wide 80- m-thick trench-refilled polysilicon beams. Measurements are in very good agreement with calculated values. Fig. 11 shows the resonance peak for a 300- m-long beam, showing a quality factor of 85 000 in 1-mtorr vacuum. The maximum quality factors measured on 500- and 800- m-long beams were 30 000 and 10 000, respectively. Fig. 12 shows the change in the resonance frequency of a 500- m-long 80- m-tall clamped–clamped beam resonators with dc polarization voltage. The resonance frequency can be changed from 147.5 to 144.5 kHz (2%) with only a 7-V
ACKNOWLEDGMENT The authors wish to thank the students and staff of the Solid State Electronics Laboratory, The University of Michigan at Ann Arbor, for their assistance. REFERENCES [1] N. Yazdi, F. Ayazi, and K. Najafi, “Micromachined inertial sensors,” Proc. IEEE, vol. 86, pp. 1640–1659, Aug. 1998. [2] K. Y. Yasumura et al., “A study of microcantilever quality factor,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 8-11, 1998, pp. 65–70. [3] A. Selvakumar and K. Najafi, “High density vertical comb array microactuators fabricated using a novel bulk/poly-silicon trench refill technology,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 12–16, 1994, pp. 138–141.
294
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
[4] K. A. Shaw, Z. L. Zhang, and N. C. MacDonald, “SCREAM I: A single mask, single-crystal silicon, reactive ion etching process for microelectromechanical structures,” Sens. Actuators A, Phys., vol. 40, pp. 63–70, 1994. [5] P. A. Stupar, A. P. Pisano, and R. Horowitz, “Polysilicon suspensions for magnetic disk drives,” in 10th Int. Solid-State Sens. Actuators Conf. Tech. Dig., Sendai, Japan, June 1999, pp. 324–327. [6] F. Ayazi and K. Najafi, “High aspect-ratio polysilicon micromachining technology,” in 10th Int. Solid-State Sens. Actuators Conf. Tech. Dig., Sendai, Japan, June 1999, pp. 320–323. [7] L. Muller et al., “Electrical isolation process for molded, high aspect-ratio polysilicon microstructures,” in Proc. IEEE MEMS Workshop, Miyazaki, Japan, Jan. 2000, pp. 590–595. [8] F. Ayazi and K. Najafi, “High aspect-ratio dry-release poly-silicon MEMS technology for inertial-grade microgyroscopes,” in Proc. IEEE PLANS 2000, San Diego, CA, pp. 304–308. [9] A. M. Hynes et al., “Recent advances in silicon etching for MEMS using the ASE process,” Sens. Actuators A, Phys., vol. 74, pp. 13–17, 1999. [10] S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era: Vol. 1—Process Technology. Sunset Beach, CA: Lattice, 1986, pp. 184–185. [11] F. Ayazi et al., “A high aspect-ratio polysilicon vibrating ring gyroscope,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 4–8, 2000, pp. 289–292. [12] Y. B. Gianchandani and K. Najafi, “Bent-beam strain sensors,” J. Microelectromech. Syst., pp. 52–58, Mar. 1996. [13] R. D. Blevins, Formulas for Natural Frequency and Mode Shape. New York: Van Nostrand, 1979.
Farrokh Ayazi (S’96–M’99) was born in 1972. He received the B.S. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 1994, and the M.S. and Ph.D. degrees in electrical engineering from The University of Michigan at Ann Arbor, in 1997 and 2000, respectively. In 2000, he joined the Faculty of the Georgia Institute of Technology, Atlanta, where he is currently an Assistant Professor in the School of Electrical and Computer Engineering. His research interests are in the areas of MEMS, high aspect-ratio silicon micromachining technologies, analog integrated circuits, RF MEMS, and integrated microsystems. Dr. Ayazi is a member of Sigma Xi. He received a Rackham Predoctoral Fellowship from the University of Michigan (1998–1999).
Khalil Najafi (S’84–M’85–SM’97–F’00) was born in 1958. He received the B.S., M.S., and Ph.D. degrees from The University of Michigan at Ann Arbor, in 1980, 1981, and 1986, respectively, all in electrical engineering. From 1986 to 1988, he was a Research Fellow. From 1988 to 1990, he was an Assistant Research Scientist. From 1990 to 1993, he was an Assistant Professor. From 1993 to 1998, he was an Associate Professor. Since September 1998, he has been a Professor and the Director of the Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor. His research interests include micromachining technologies, solid-state micromachined sensors, actuators, MEMS, analog integrated circuits, implantable biomedical microsystems, hermetic micropackaging, and low-power wireless sensing/actuating systems. He is an Editor for SOLID-STATE SENSORS and an Associate Editor for the JOURNAL OF MICROMECHANICS AND MICROENGINEERING. Dr. Najafi has been active in the field of solid-state sensors and actuators for over 18 years, and has been involved in several conferences and workshops dealing with solid-state sensors and actuators, including the International Conference on Solid-State Sensors and Actuators, the Hilton-Head Solid-State Sensors and Actuators Workshop, and the IEEE/ASME MEMS Workshop. He is an editor for the IEEE TRANSACTIONS ON ELECTRON DEVICES, an associate editor for IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, and an associate editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He was the recipient of a National Science Foundation Young Investigator Award (1992–1997), the Beatrice Winner Award for Editorial Excellence presented at the 1986 International Solid-State Circuits Conference, he Paul Rappaport Award for co-authoring the Best Paper published in the IEEE TRANSACTIONS ON ELECTRON DEVICES, and the Best Paper Award presented at the 1999 International Solid-State Circuits Conference (ISSCC). In 1994 he received the University of Michigan’s Henry Russel Award for outstanding achievement and scholarship, and was selected the Professor of the Year in 1993. In 1998, he was named the Arthur F. Thurnau Professor for outstanding contributions to teaching and research, and received the College of Engineering’s Research Excellence Award.
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
High Aspect-Ratio Combined Poly and Single-Crystal Silicon (HARPSS) MEMS Technology Farrokh Ayazi, Member, IEEE, and Khalil Najafi, Fellow, IEEE
Abstract—This paper presents a single-wafer high aspect-ratio micromachining technology capable of simultaneously producing tens to hundreds of micrometers thick electrically isolated poly and single-crystal silicon microstructures. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Thick single-crystal silicon structures are released from the substrate through the front side of the wafer by means of a combined directional and isotropic silicon dry etch and are protected on the sides by refilled trenches. This process is capable of producing electrically isolated polysilicon and silicon electrodes as tall as the main body structure with various size capacitive air gaps ranging from submicrometer to tens of micrometers. Using bent-beam strain sensors, residual stress in 80- m-thick 4- m-wide trench-refilled vertical polysilicon beams fabricated in this technology has been measured to be virtually zero. 300- m-long 80- m-thick polysilicon clamped–clamped beam micromechanical resonators have shown quality factors as high as 85 000 in vacuum. The all-silicon feature of this technology improves long-term stability and temperature sensitivity, while fabrication of large-area vertical pickoff electrodes with submicrometer gap spacing will increase the sensitivity of microelectromechanical devices by orders of magnitude. [536] Index Terms—Deep reactive ion etching, high aspect-ratio, MEMS, polysilicon micromachining, silicon micromachining, thick polysilicon.
I. INTRODUCTION
H
IGH-PERFORMANCE microelectromechancial system (MEMS) devices and, in particular, inertial sensors [1] will continue to require fabrication technologies that can combine high aspect-ratio deep dry etching of bulk silicon with polysilicon surface micromachining to realize all-silicon hundreds of micrometers thick microstructures that are electrically isolated from one another and separated by small capacitive gaps. The all-silicon feature of such a technology improves long-term stability and temperature sensitivity. Hundreds of micrometers thick silicon structures have large mass (up to a few milligrams) with reduced Brownian displacement noise, Manuscript received February 16, 2000; revised June 30, 2000. This work was supported by the Defense Advanced Research Projects Agency under Contract DABT63-C-0111 and Contract F30602-98-2-0231. Subject Editor, N. F. de Rooij. F. Ayazi was with the Center for Integrated MicroSystems, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA. He is now with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250 USA. K. Najafi is with the Center for Integrated MicroSystems, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor, Ann Arbor, MI 48109-2122 USA. Publisher Item Identifier S 1057-7157(00)08030-6.
which make them suitable for precision inertial sensors. Fabrication of large-area vertical capacitors with submicrometer gap spacing will increase the sensitivity by orders of magnitude. By shrinking the capacitive gaps to submicrometer levels, bias and control voltages will also shift down to levels that are acceptable to most current CMOS technologies. However, different size capacitive air gaps are needed in some applications. For example, vibratory gyroscopes that are based on transfer of energy between two vibration modes of a mechanical structure often need relatively large amplitude of vibrations ( 1 m) to increase the mechanical sensitivity of the sensor and reduce its noise floor. In parallel-plate electrostatic actuators, the amplitude of vibration should be kept less than one-tenth of the capacitive air gap for linear operation, demanding for wide air gaps in the range of 10–20 m. Also, both single and polycrystalline silicon microstructures have shown high mechanical quality factors (10 to 10 ) under medium vacuum levels ( 10 mtorr) [2]. Polysilicon with its high mechanical quality factor and orientation-independent Young’s modulus is an attractive structural material for fabrication of symmetrical and homogenous microresonators. Three-dimensional processes for fabrication of polysilicon microstructures [3] and single-crystal silicon microstructures [4] have been previously demonstrated. However, these processes are not capable of “simultaneously” producing hundreds of micrometers thick poly and single-crystal silicon structures with various size capacitive air gaps. The basic polysilicon trench-refill process described in [3] is not capable of producing thick isolated silicon electrodes that are as tall as the main body polysilicon structure and have small capacitive air gaps. In some approaches, the polysilicon microstructure is completely released from the main substrate and transferred onto another substrate to be used as an actuator [5]. A high aspect-ratio polysilicon micromachining technology was presented by the authors [6] that is capable of producing isolated polysilicon electrodes as tall as the main body structure. However, size of the capacitive air gaps in that technology is limited to the thickness of the sacrificial oxide layer, which is less than 2 m, and the fabrication process is somewhat complicated. Some applications need larger air gaps in the range of 10–20 m. Electrical isolation of polysilicon microstructures with larger air gaps (5–10 m) has been also demonstrated using a combination of doped and undoped polysilicon layers [7]. The SCREAM process [4] is a single wafer process that is only capable of making single-crystal silicon structures (and not polysilicon) with limited thickness that are separated by micrometer-sized air gaps.
1057–7157/00$10.00 © 2000 IEEE
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
289
Fig. 1. View of a thick single-crystal silicon electrode separated from a trench-refilled polysilicon structure by submicrometer capacitive gap in the HARPSS process.
This paper presents a single-wafer high aspect-ratio combined poly and single-crystal silicon (HARPSS) MEMS technology [8] that is capable of producing tens to hundred’s of micrometers thick polycrystalline and single crystal silicon microstructures with a simple fabrication process that eliminates the limitations of the previous high aspect-ratio technologies. This all-silicon process utilizes one layer of low-pressure chemical vapor deposited (LPCVD) silicon nitride, one layer of LPCVD silicon dioxide, and one layer of LPCVD polysilicon. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Various size capacitive air gaps ranging from submicrometer to tens of micrometers can be m) realized in this technology. Submicrometer air gaps ( are defined by the thickness of the sacrificial oxide layer and are formed in between polysilicon and single-crystal-silicon structures. Fig. 1 illustrates a single crystal silicon electrode in HARPSS technology, which is separated from a polysilicon structure by submicrometer capacitive gap and anchored through an isolating nitride layer to the substrate. Single-crystal silicon electrodes (or structures) as tall as the polysilicon structures are protected on the sides by deep refilled trenches and are released from the substrate by means of an SF dry-release, which is carried out entirely in a deep reactive ion etcher (DRIE). Electrode plates associated with wider air gaps are both created out of polysilicon. This technology is also capable of simultaneously producing electrically isolated two–dimensional (2-D) (planar) and three-dimensional (3-D) (vertical) polysilicon structures on the same silicon substrate. II. FABRICATION TECHNOLOGY Fig. 2 shows the fabrication process flow for the six-mask HARPSS technology. First, a thin layer of LPCVD silicon nitride (2000–2500 Å) is deposited and patterned to serve as an isolation dielectric layer underneath the electrode bonding pads. To further reduce the parasitic capacitance associated with the electrode pad to the substrate, a layer of silicon dioxide ( 1- m thick) can be encapsulated underneath the nitride layer to increase the dielectric thickness. This layer of
Fig. 2. Fabrication process flow for the six-mask HARPSS MEMS technology.
oxide will add an extra patterning step to the process, but it reduces the parasitic bonding pad capacitance to the substrate by approximately a factor of three. Fifty to hundreds of m deep trenches with straight sidewalls (90 1 ) are then dry etched into a low-resistivity silicon substrate using the Bosch process [9] in a silicon DRIE. A 4- m-thick photoresist, AZP4400 spun at 3 kr/min, was used as a mask for etching 100- m-deep 6- m-wide trenches. The height of these trenches will determine the height of silicon microstructures. Trenches with smooth and straight sidewalls are needed to eliminate void formation in the polysilicon beams, which will be formed by back filling these trenches. Mechanical structures are created by refilling trenches with polysilicon deposited over a sacrificial oxide layer. LPCVD oxide film is deposited at relatively high temperature (920 C) through the reaction of dichlorosilane (SiH Cl and nitrous oxide (N O) to obtain conformal coating inside the trenches. Conformal LPCVD polysilicon layer is deposited at 588 C. The structural polysilicon layer has to be doped to lower its electrical resistance. Doping with boron is preferred over phosphorus due to the fact that the etch rate of boron-doped poly is much less than the etch rate of
290
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
Fig. 3. Result of SUPREM simulation for boron doping of the oxide at 1050 C followed by deposition of poly at 588 C and then 2 h of drive-in at 1050 C.
phosphorus-doped poly in the HF:H O (1 : 1) solution, leaving the poly beams intact after relatively long HF release step.
Fig. 4. Close-up of a tall silicon sense electrode separated from 80-m-thick polysilicon ring resonator by a 1.2-m air gap created through sacrificial oxide etching.
process; Cr/Au (200 Å/3000 Å) is evaporated and patterned to form the electrode bonding pads.
A. Doping of Trench-Refilled Polysilicon Beams
B. Deep Dry Release
A new method has been used to dope the thick polysilicon beams inside deep trenches. Immediately after deposition of the silicon dioxide, the surface of the oxide is doped with boron at 1050 C for 1 h. Since, at this point, trenches are not completely refilled, dopants can easily get inside the trenches and dope the surface of the oxide. After doping, wafers are directly transferred to the polysilicon deposition tube and trenches are refilled by depositing 4 m of LPCVD polysilicon at 588 C. This is followed by 2 h of drive in at 1050 C to out diffuse the dopants from the surface of the oxide into the polysilicon beams. The efficiency of this method has been verified using SUPREM simulation. Fig. 3 shows the result of the simulation for boron doping. The concentration of boron in the outer 1- m layer of poly adjacent to the oxide is in the range of 2.5 10 to 5 10 atoms/cm , which is high enough for most applications. The smaller concentration of boron in poly compared to that on the oxide is due to the fact that the segregation coefficient of boron is less than one [10]. 7500-Å-thick polysilicon films deposited on top of 1- m-thick LPCVD oxide was doped with boron using the above method and a sheet resistance of 22 /Square was measured on these films. After refilling trenches, poly on the surface is etched back and the underneath oxide is patterned to provide anchor points for the poly. From this step on, since all the trenches are completely refilled, lithographical steps (spin casting) can easily be performed using thick resist (e.g., AZP4400 spun at 3 kr/min). After patterning the oxide, more poly is deposited, doped, and patterned. It should be noted that while doping polysilicon films with boron, the doping temperature should be kept less than or equal to 1050 C. Doping at higher temperature, e.g., 1175 C, will cause the surface of polysilicon films to become rough. Polysilicon films with thickness in the range of 2–3 m have been successfully doped at 1050 C for 1 h and no surface roughness was observed. Metallization is performed after the doping
The next step in the process is the deep dry-release step and is performed to release thick silicon microstructures from the substrate and to create larger air gaps. It consists of a deep directional etch (depth of the trenches 10–20 m) followed by a dry isotropic SF6 silicon etch to undercut silicon microstructures (step i in Fig. 2). Both of these steps are performed consecutively in a silicon DRIE such as the surface technology systems (STS) inductively couple plasma (ICP) system. Thick resist (AZP4400 spun at 3 kr/min) is used as a mask for this step. Areas of the silicon substrate that need to be etched away are exposed to the plasma and are bounded with deep trench-refilled beams that have silicon dioxide on their sidewalls. Singlecrystal silicon electrodes and microstructures are protected on the sides from the silicon enchants by the outer oxide coating of trench-refilled beams. After the deep directional etch, the subsequent isotropic SF etch will then isotropically etch (undercut) several micrometers of the silicon at the bottom of the electrodes to release them from the substrate. One has to keep in mind that the isotropic SF etch will etch the silicon at the bottom of trenches laterally, as well as vertically, and, hence, the height of electrodes or silicon structures will be reduced from the height of poly-refilled trenches by the amount of undercut. For 80- m-tall polysilicon structures, 25 m of undercutting at a depth of 80 m inside the silicon has been obtained at a cost of reducing the height of single-crystal silicon electrodes to 50 m. After the deep release step, the thick resist mask is stripped off and sacrificial oxide layers are etched away in HF : H O (1 : 1) solution to create submicrometer capacitive air gaps between the sense electrodes and main body structure. Fig. 4 shows an SEM view of a single-crystal silicon electrode as tall as the main-body polysilicon structure. The single-crystal silicon electrode is anchored on top to the supporting polysilicon layer, which is, in turn, anchored through the isolating nitride layer to the substrate. Vertical polysilicon stiffeners (trench refilled) are also
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
291
Fig. 6. SEM view of an 80-m-thick 1.1-mm diameter HARPSS polysilicon ring gyroscope [11]. Fig. 5. Close-up of tall polysilicon drive and control electrodes separated from 80-m-thick polysilicon ring resonator by wide (10–20 m) air gaps.
incorporated in the structure of the electrodes to ensure their rigidity. The electrical resistance of the silicon electrodes must be small. Since these electrodes are etched out from the silicon substrate, one way of reducing the series resistance is to use low-resilicon wafers sistivity substrate, such as boron-doped cm or less. The alternative way is to with resistivity of 0.1 dope the surface of the wafer with boron right after trenches have been etched into the substrate. C. Various Size Air Gaps Size of the air gaps in this technology is not limited to submicrometer levels. Larger air gaps can be realized with polysilicon trench-refilled electrodes. Larger air gaps are defined by the distance between two adjacent trenches that form parallel plates of a capacitor. The silicon between these trenches is then directionally etched in the STS DRIE machine during the deep release step. If the spacing is so small that deep release etch openings cannot be placed directly between the adjacent trenches m), then the silicon between the two trenches is protected ( with resist on the top, but undercut at the bottom and the sides during the dry release step. This narrow piece of silicon, which is held by the oxide on the sidewall of trenches, will then fall into the HF : H O solution during the sacrificial oxide etch. Fig. 5 shows the SEM view of wide capacitive gaps (10 to 20 m) with polysilicon electrodes fabricated using this technology. III. FABRICATION RESULTS HARPSS technology has been employed to fabricate a number of thick polysilicon vibrating shell gyroscopes with silicon electrodes as tall as the shell structures. Fig. 6 shows the SEM view of an 80- m-tall HARPSS polysilicon ring gyroscope [11]. The ring is 1.1 mm in diameter and the diameter of the support post is 120 m. The width of the ring and support springs is 4 m. Sixteen electrodes are evenly located around the structure; they are approximately 60- m tall and 150- m long and are separated from the ring by a 1.2- m capacitive air gap. We have also fabricated a new four-ring gyroscope
Fig. 7. SEM view of an 80-m-thick 2-mm diameter four-ring gyroscope with meander-shaped springs fabricated through the HARPSS process.
supported by eight meander-shaped springs. An SEM view of this device is shown in Fig. 7. This device is 2 mm in diameter, 80- m thick, and the width of the polysilicon beams is 4 m. The support post is 400 m in diameter. Each meander-shaped spring consists of two semicircular springs in series. This technology provides several important features that are particularly required for high-performance MEMS inertial sensors including microgyroscopes. First, the height of the main body silicon structure and the electrodes can be increased to hundreds of micrometers using DRIE, reducing the Brownian displacement noise of the structures. Second, since the body to sense-electrode gap spacing is defined by the thickness of the sacrificial layer, it can be reduced to a submicrometer level; these two factors together will significantly increase the sense capacitance and, hence, the device output signal. Third, in case of the ring gyroscope, the ring to drive-electrode gap spacing can be made significantly larger than the ring to sense-electrode gap spacing to achieve a larger drive amplitude and, in turn, reducing the noise floor. Fourth, the sensor element can be made out of polysilicon, which has an orientation-independent Young’s modulus and potentially a high mechanical quality factor. Fifth, the all-silicon feature of this technology improves long-term stability and temperature sensitivity.
292
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
IV. PROCESS DESIGN RULES Some design rules should be followed when using the HARPSS process. First, in order to avoid the reactive ion etching (RIE) lag effect, the width of all the trenches that define the polysilicon microstructures should be kept constant. Various width trenches can be used if the difference in the depth of the trenches due to RIE lag is not critical. The maximum width of the trenches is determined by the total thickness of and the polysilicon layer the deposited sacrificial oxide and, hence, a thicker deposition of poly can result in wider trenches and wider polysilicon beams. However, in order to completely refill the trenches at their intersection points, should be kept the maximum width of the trenches (for perpendicular trenches). Since less than LPCVD oxide and polysilicon are typically deposited with a thickness of less than 3 m, the maximum width of trenches is kept less than 7 m. With 1.5 m of oxide and 3 m of polysilicon deposition, 6- m-wide trenches used in this paper were completely refilled at their intersections. As mentioned earlier, trenches with straight sidewalls are required, as bowing of the profile will cause void formation in the trench-refilled polysilicon beams. A trench sidewall that is slightly slanted inward from top to the bottom will eliminate chances of void formation. The other critical step in this process is the deep dry-release step. Size of the etch openings used in this step should preferably be equal in order to avoid RIE lag effect. Electrodes and structures that need to be released from the substrate must be surrounded by trench openings that provide the undercut. Typically, 8–10- m-wide trenches are used in this step. Bigger size openings will result in faster release/undercut of the single-crystal silicon structures. V. RESIDUAL STRESS IN TRENCH-REFILLED POLYSILICON BEAMS In order to investigate the amount of residual stress in 80- m-thick trench-refilled polysilicon beams, a bent-beam strain gauge [12] was fabricated using this technology. An SEM micrograph of a 500- m-long bent-beam strain sensor is shown in Fig. 8. A small amount of lateral displacement can be measured by a vernier scale located at the midpoint of the bent beams. The pitch of the tines is 0.2 m, resulting in a displacement resolution of 0.1 m, and the angle between the bent beam and the long axis of the device is 0.1 rad. Fig. 9 shows the close-up view of the vernier attached to the 80- m-thick polysilicon beams. The center tines are aligned to each other, indicating that the displacement and, hence, the in-plane stress for thick polysilicon trench-refilled beams, are negligible and cannot be measured using on-chip strain sensors. VI. CLAMPED–CLAMPED BEAM MICROMECHANICAL RESONATORS Clamped–clamped beam resonators have also been fabricated using the HARPSS technology to investigate the resonance behavior and quality factor of simple micromechanical structures. Fabricated beams are 80- m tall, 4- m wide, and have var-
Fig. 8. SEM view of a 500-m-long bent-beam strain gauge and a 300-m-long clamped–clamped resonant beam fabricated using this technology.
Fig. 9. Close-up of the strain gauge vernier, showing virtually zero stress on 80-m-thick polysilicon beams.
ious lengths of 300, 500, or 800 m. The SEM micrograph of a 300- m-long clamped–clamped beam was shown in Fig. 8. They are electrostatically resonated in the plane of substrate (lateral vibration mode) using tall electrodes located on both sides of the beams. The natural frequencies of these resonators are given by [13] (1) where is the length of the beam, is the Young’s modulus of the beam material, is the area moment of inertia around the is the mass of the beam. principal axis, and For the clamped–clamped beam structure of Fig. 10, and ; therefore, the fundamental lateral is resonance frequency Hz.
(2)
Table I shows the calculated and measured resonance frequencies of the fabricated beams, assuming a Young’s
AYAZI AND NAJAFI: HARPSS MEMS TECHNOLOGY
Fig. 10. Micromechanical clamped–clamped electrostatic actuation and capacitive detection.
293
beam
resonator
with
TABLE I MEASUREMENT RESULTS ON RESONANCE FREQUENCY AND QUALITY FACTOR OF THE VARIOUS CLAMPED–CLAMPED BEAM MICROMECHANICAL RESONATORS FABRICATED THROUGH HARPSS TECHNOLOGY
Fig. 12. Change in the resonance frequency versus dc polarization voltage for an 80-m-thick 4-m-wide polysilicon beam. A bias voltage of 4 V was applied to the sense electrode.
increase in polarization voltage (8–15 V). This high tuning capability is a result of small (1.2 m) capacitive gaps that are created through sacrificial layer etching. Larger capacitive gaps will result in higher tuning voltages. VII. CONCLUSIONS This paper has reported a single-wafer HARPSS MEMS technology that is capable of producing tens to hundreds of micrometers thick electrically isolated poly and single-crystal silicon microstructures. High aspect-ratio polysilicon structures are created by refilling hundreds of micrometers deep trenches with polysilicon deposited over a sacrificial oxide layer. Various size capacitive air gaps ranging from submicrometer to tens of micrometers can be realized in this technology. Using a bent-beam strain gauge, residual stress in 80- m-thick 4- m-wide trench-refilled vertical polysilicon beams fabricated in this technology has been measured to be zero. 300- m-long clamped-clamped beam resonators have shown quality factors as high as 85 000 in 1-mtorr vacuum. This technology provides features required for high-performance inertial sensors, as well as a range of actuators. The all-silicon feature of such a technology improves long-term stability and temperature sensitivity while fabrication of large-area vertical pickoff electrodes with submicrometer gap spacing will increase the sensitivity by orders of magnitude.
Fig. 11. Frequency response of an 80-m-thick 300-m-long polysilicon beam showing a Q of 85 000 under 1-mtorr vacuum.
modulus of GPa and a density of g/cm for 4- m-wide 80- m-thick trench-refilled polysilicon beams. Measurements are in very good agreement with calculated values. Fig. 11 shows the resonance peak for a 300- m-long beam, showing a quality factor of 85 000 in 1-mtorr vacuum. The maximum quality factors measured on 500- and 800- m-long beams were 30 000 and 10 000, respectively. Fig. 12 shows the change in the resonance frequency of a 500- m-long 80- m-tall clamped–clamped beam resonators with dc polarization voltage. The resonance frequency can be changed from 147.5 to 144.5 kHz (2%) with only a 7-V
ACKNOWLEDGMENT The authors wish to thank the students and staff of the Solid State Electronics Laboratory, The University of Michigan at Ann Arbor, for their assistance. REFERENCES [1] N. Yazdi, F. Ayazi, and K. Najafi, “Micromachined inertial sensors,” Proc. IEEE, vol. 86, pp. 1640–1659, Aug. 1998. [2] K. Y. Yasumura et al., “A study of microcantilever quality factor,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 8-11, 1998, pp. 65–70. [3] A. Selvakumar and K. Najafi, “High density vertical comb array microactuators fabricated using a novel bulk/poly-silicon trench refill technology,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 12–16, 1994, pp. 138–141.
294
JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 9, NO. 3, SEPTEMBER 2000
[4] K. A. Shaw, Z. L. Zhang, and N. C. MacDonald, “SCREAM I: A single mask, single-crystal silicon, reactive ion etching process for microelectromechanical structures,” Sens. Actuators A, Phys., vol. 40, pp. 63–70, 1994. [5] P. A. Stupar, A. P. Pisano, and R. Horowitz, “Polysilicon suspensions for magnetic disk drives,” in 10th Int. Solid-State Sens. Actuators Conf. Tech. Dig., Sendai, Japan, June 1999, pp. 324–327. [6] F. Ayazi and K. Najafi, “High aspect-ratio polysilicon micromachining technology,” in 10th Int. Solid-State Sens. Actuators Conf. Tech. Dig., Sendai, Japan, June 1999, pp. 320–323. [7] L. Muller et al., “Electrical isolation process for molded, high aspect-ratio polysilicon microstructures,” in Proc. IEEE MEMS Workshop, Miyazaki, Japan, Jan. 2000, pp. 590–595. [8] F. Ayazi and K. Najafi, “High aspect-ratio dry-release poly-silicon MEMS technology for inertial-grade microgyroscopes,” in Proc. IEEE PLANS 2000, San Diego, CA, pp. 304–308. [9] A. M. Hynes et al., “Recent advances in silicon etching for MEMS using the ASE process,” Sens. Actuators A, Phys., vol. 74, pp. 13–17, 1999. [10] S. Wolf and R. N. Tauber, Silicon Processing for the VLSI Era: Vol. 1—Process Technology. Sunset Beach, CA: Lattice, 1986, pp. 184–185. [11] F. Ayazi et al., “A high aspect-ratio polysilicon vibrating ring gyroscope,” in Proc. Solid-State Sens. Actuator Workshop, Hilton Head, SC, June 4–8, 2000, pp. 289–292. [12] Y. B. Gianchandani and K. Najafi, “Bent-beam strain sensors,” J. Microelectromech. Syst., pp. 52–58, Mar. 1996. [13] R. D. Blevins, Formulas for Natural Frequency and Mode Shape. New York: Van Nostrand, 1979.
Farrokh Ayazi (S’96–M’99) was born in 1972. He received the B.S. degree in electrical engineering from the University of Tehran, Tehran, Iran, in 1994, and the M.S. and Ph.D. degrees in electrical engineering from The University of Michigan at Ann Arbor, in 1997 and 2000, respectively. In 2000, he joined the Faculty of the Georgia Institute of Technology, Atlanta, where he is currently an Assistant Professor in the School of Electrical and Computer Engineering. His research interests are in the areas of MEMS, high aspect-ratio silicon micromachining technologies, analog integrated circuits, RF MEMS, and integrated microsystems. Dr. Ayazi is a member of Sigma Xi. He received a Rackham Predoctoral Fellowship from the University of Michigan (1998–1999).
Khalil Najafi (S’84–M’85–SM’97–F’00) was born in 1958. He received the B.S., M.S., and Ph.D. degrees from The University of Michigan at Ann Arbor, in 1980, 1981, and 1986, respectively, all in electrical engineering. From 1986 to 1988, he was a Research Fellow. From 1988 to 1990, he was an Assistant Research Scientist. From 1990 to 1993, he was an Assistant Professor. From 1993 to 1998, he was an Associate Professor. Since September 1998, he has been a Professor and the Director of the Solid-State Electronics Laboratory, Department of Electrical Engineering and Computer Science, The University of Michigan at Ann Arbor. His research interests include micromachining technologies, solid-state micromachined sensors, actuators, MEMS, analog integrated circuits, implantable biomedical microsystems, hermetic micropackaging, and low-power wireless sensing/actuating systems. He is an Editor for SOLID-STATE SENSORS and an Associate Editor for the JOURNAL OF MICROMECHANICS AND MICROENGINEERING. Dr. Najafi has been active in the field of solid-state sensors and actuators for over 18 years, and has been involved in several conferences and workshops dealing with solid-state sensors and actuators, including the International Conference on Solid-State Sensors and Actuators, the Hilton-Head Solid-State Sensors and Actuators Workshop, and the IEEE/ASME MEMS Workshop. He is an editor for the IEEE TRANSACTIONS ON ELECTRON DEVICES, an associate editor for IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, and an associate editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He was the recipient of a National Science Foundation Young Investigator Award (1992–1997), the Beatrice Winner Award for Editorial Excellence presented at the 1986 International Solid-State Circuits Conference, he Paul Rappaport Award for co-authoring the Best Paper published in the IEEE TRANSACTIONS ON ELECTRON DEVICES, and the Best Paper Award presented at the 1999 International Solid-State Circuits Conference (ISSCC). In 1994 he received the University of Michigan’s Henry Russel Award for outstanding achievement and scholarship, and was selected the Professor of the Year in 1993. In 1998, he was named the Arthur F. Thurnau Professor for outstanding contributions to teaching and research, and received the College of Engineering’s Research Excellence Award.
