LINEARIZED CMOS OTA USING ACTIVE-ERROR FEEDFORWARD TECHNIQUE S. Szczepanski1, S.Koziel1 and E. Sánchez-Sinencio2. 1
Faculty of Electronics, Telecommunications and Inf., Gdansk University of Technology, 80-952 Gdansk, Poland 2 Department of Electrical Engineering Texas A&M University, College Station, TX 77843, USA ABSTRACT Highly linear operational transconductance amplifier (OTA) is developed, using CMOS differential pair transconductors in an active-error feedforward linearization configuration. As a result, improved linearity of the differential-input two-output OTA is obtained. SPICE simulations show that for the circuit working with a ±1.25V power supply, total harmonic distortion (THD) for f=1MHz at 0.4Vpp (0.8Vpp) is less than -72dB (-60dB) in comparison to -35dB (-20dB) without linearization. Moreover, the input voltage range of linear operation is increased by more than 300%. Power consumption of the overall circuit is 0.94mW.
1. INTRODUCTION
of the transconductor. By definition, coefficient g1 is the linear transconductance gm of the amplifier. Fig.1. shows the concept of transconductance amplifier linearization based on active-error feedforward method. All amplifiers G, G, G, modeled as in (1), are assumed to be identical. Moreover, it is assumed that resistor R in Fig.1 is linear and equal to 1/gm. In practice, e.g. in integrated circuit implementations some technologies offer high resistive poly which can be used to realize resistor R. Using (1), the output current iOUT of the overall circuit in Fig.1. can be written as follows: ¥ ¥ n n (2) iOUT (t ) = å gn [vIN (t )] + å gn [vIN (t ) - vR (t )] n=1
CMOS transconductance elements are useful building blocks for the design of many analog and analog-digital signal processing systems. Such applications usually require very linear voltage-to-current converters [1]-[2]. In this work, a highly linear operational transconductance amplifier (OTA) based on an active-error feedforward linearization scheme is proposed. The error signal is generated using an additional differential pair transconductor and a linear resistor. Feedforward linearization is widely used to reduce nonlinear distortion in amplifiers [3]-[7]. The proposed technique gives effective linearization, allows us to implement the OTA circuit which has extremely low power consumption, extended linear range of operation, as well as good transconductance tuning capability. Moreover, the effective excess phase compensation can be easily applied, which makes the circuit suitable for high-frequency applications.
vR (t ) = g1-1 ån=1 g n [vIN (t )] ¥
n =2
is
the
differential
input
(3)
[
iOUT(t ) = ån=1 gn [vIN (t )] + ån=1 gn - g1-1 åk=2 gk [vIN (t )] ¥
¥
n
¥
k
] (4)
Normally, vIN(t)-vR(t) is much smaller than the input voltage of transconductors G and G, which allows us to neglect the higher order terms in the output current of G. This leads to the following approximation: ¥ ¥ n n iOUT (t ) @ å gn [vIN (t )] - å gn [vIN (t )] = g1vIN (t ) (5) n=1
n =2
which shows the perfect cancellation of nonlinearities of the overall transconductance amplifier in Fig.1.
+ -
For the purpose of the subsequent analysis we will represent the nonlinear transfer characteristic of transconductor using power series expansion. More specifically, the output current of the transconductor iG is given by the following formula ¥ n (1) iG (v IN ) = å n =1 g n v IN (t ) = G (v IN ) vIN
n
This means that the voltage at the input of the transconductor G (working as an error amplifier) equals ¥ n v IN (t ) - v R (t ) = - g1-1 å g n [v IN (t )] . Hence, we obtain
2. FEEDFORWARD LINEARIZATION METHOD
where
n=1
where
G
iG
+ -
G
-
G
iG
R
vR
vIN
+
iOU T
iG
Fig.1. Three-block feedforward transconductance amplifier
voltage
This work was supported in part by the State Scientific Research Committee, Poland, under Grant 4T11B01625
;,(((
,
,6&$6
V DD
10 current mirror
iG Q1
Q2
THD [%]
+
8
v IN -
IS S
1
6 4
VSS
Fig.2. Simple CMOS differential pair transconductor
2
2
Consider a simple CMOS differential pair transconductor shown in Fig.2. It can be shown, using square-law MOS transistor modeling [8] that its normalized transfer characteristic around zero is:
0 0.0
(6) iG ( x ) = 2 I SS x 1 - x 2 where x is a normalized input voltage defined as x=vIN/2(VGS-VT), with vIN being a differential input voltage, VGS and VT - gate-source DC voltage and threshold voltage, respectively; ISS is the biasing tail current of the differential pair. For small VIN, x