Low-Noise Low-Pass Filter for ECG Portable ... - Semantic Scholar
Circuits Syst Signal Process (2013) 32:2029–2045 DOI 10.1007/s00034-013-9564-9
Low-Noise Low-Pass Filter for ECG Portable Detection Systems with Digitally Programmable Range Soliman A. Mahmoud · Ahmed Bamakhramah · Saeed A. Al-Tunaiji
Received: 6 November 2012 / Revised: 30 January 2013 / Published online: 13 February 2013 © Springer Science+Business Media New York 2013
Abstract This paper presents the design of an operational transconductance amplifier-C (OTA-C) low-pass filter for a portable Electrocardiogram (ECG) detection system. A fifth-order Butterworth filter using ladder topology is utilized to reduce the effect of component tolerance and to provide a maximally flat response. The proposed filter is based on a novel class AB digitally programmable fully differential OTA circuit. Based on this, PSPICE simulation results for the filter using 0.25-µm technology and operating under ±0.8 V voltage supply are also given. The filter provides a third harmonic distortion (HD3) of 53.5 dB for 100 mV p-p @50 Hz sinusoidal input, in√ put referred noise spectral density of 120 µVrms/ Hz, total power consumption of 30 µW, and a bandwidth of 243 Hz. These results demonstrate the ability of the filter to be used for ECG signal filtering that is located within 150 Hz. Keywords ECG · OTA-C filters · Low-voltage low-power CMOS circuits · Low-frequency filters 1 Introduction The world of biomedical electronics is rapidly changing with high future potential [12]. New designs with new technologies are emerging in which more features S.A. Mahmoud () · A. Bamakhramah · S.A. Al-Tunaiji Electrical and Computer Engineering Department, Sharjah University, Sharjah, United Arab Emirates e-mail: [email protected] A. Bamakhramah e-mail: [email protected] S.A. Al-Tunaiji e-mail: [email protected] S.A. Mahmoud Electrical Engineering Department, Fayoum University, Fayoum, Egypt e-mail: [email protected]
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Fig. 1 A block diagram illustrating the typical input stage of an ECG detection system
are placed into the biomedical devices. Biomedical devices need to be accurate, precise, and comfortable in usage as well as condensed in size. In case of portable devices, issues related to power consumption become also important. The designs for these portable devices must be capable enough to provide different tradeoffs between power and noise depending on the biomedical signal characteristics. For preprocessing the Electrocardiogram (ECG) signal (also called cardiac signal), a typical system shown in Fig. 1 is used [4]. Since the cardiac signals are weak amplitude signals, typically in the range of 400 µV–2.5 mV, a preamplifier is used to amplify the signal with a gain of 10–100 [3, 13]. After this amplifier, a low-pass filter (LPF) with low cut-off frequency (around 250 Hz) is used to eliminate the unwanted noise [3, 13]. This LPF is the key part in the whole system since the accuracy of the overall system depends on it. The major critical issues in designing such LPF are the linearity, input referred noise, and power consumption. The need of high linearity is to achieve low THD and acceptable IM3; also a high input referred noise can eliminate the weak cardiac signal. Moreover, implementing this LPF with low frequency (f = 1/RC) on an integrated chip (IC) is not a simple task. In an IC, a typical capacitor value is 10 pF, and a typical resistance value is 10 K [7]. Therefore, to implement LPF with low frequency on an IC, a resistance with value of 100 M is required, which means that a realization using active components is needed. In general, analog integrated filters can be realized using different approaches such as switched capacitor (SC) and continuous-time (CT) implementations. The SC filters are limited to low-frequency applications due to: (1) the sampling process and (2) the need for high supply voltage operation because of turning MOS switches on and off, and maintaining proper op-amp operation. On the other hand, the CT filters have a significant speed advantage over discrete-time filters because no sampling is required [6, 10, 15]. Therefore a technique to realize this filter using CT operational transconductance amplifier-C (OTA-C) filters is required in which the value of the transconductance (Gm) and the capacitors determine the cut off frequency value. As a result, a typical value of Gm should be very small (usually in the order of a few nA/V below ∼10 nA/V). Obtaining this OTA with this Gm leads to higher noise levels, so maintaining low Gm with low input referred noise requires an optimized design to achieve it. As a result, techniques were proposed to reduce and eliminate the noise problems such as spectral subtraction method in [17, 18]. Several filter designs have been proposed in the literature [7, 14, 19], and [16]. A systematic design and modeling for low-voltage and low-power OTA-C portable filter to detect ECG signal using MATLAB SIMULINK is given in [7]. A secondorder micro-power continuous-time filter using special features of the FGMOS transistor is presented in [14]. The realizations given in [19] are based on obtaining
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very small OTAs using current division, source degeneration, floating-gate techniques, and bulk driven techniques to obtain filters. Linear voltage-to-current transducers combined with current division and current cancellation techniques are used to implement low-distortion OTAs suitable for low-frequency application as given in [16]. In this paper, a digitally programmable OTA-C low-pass filter for ECG detection system is proposed. This filter uses low-voltage supply and provides low input referred noise spectral density together with low THD. The OTA is a balanced input differential output voltage-to-current converter with the use of a common feedback (CMFB) circuit to provide fixed performance under different load conditions. The use of programmable OTA in the filter is to compensate the errors due to fabrication process and due to any nonlinearity in the model parameters of the transistors. Also the use of tunable OTA will change the bandwidth of the filter according to the value of the Gm that will give more range of covered frequencies with similar noise. The objective of this LPF design is to achieve high linearity (by using linear programmable OTA), low input referred noise and low power consumption. This paper is organized as follows: In Sect. 2, the OTA design, together with its programmability concept, is discussed. Section 3 describes the filter characteristics and specifications suitable for an ECG detection system. PSPICE simulation results using 0.25-µm TSMC CMOS technology of the OTA and the filter are presented. Finally, Sect. 4 concludes this paper.
2 OTA Design The structure of the proposed fully differential OTA is based on the programmability concept in which a variable resistor is connected between the outputs of two buffers. Because of this structure, the buffer circuit must be utilized carefully to provide acceptable performance of the overall OTA. The CMOS circuits of the voltage buffer, resistor, and the OTA are described in this section with the simulation results. 2.1 Class AB buffer Circuit In this subsection, a low-power class AB CMOS buffer circuit is presented. Figure 2(a) shows the used buffer. This buffer is first proposed in [5]. To ensure voltage tracking, a constant biasing current Ib is forced through transistor M1, and the output voltage of the buffer assuming M1 is operating in the saturation region and is given by 2Ib Vo = Vi + VT − . (1) K The low output resistance of the buffer is achieved by taking the output from the source of the transistor M1 and by the action of negative feedback transistors M5 and M6. The operation concept of the class AB configuration is to control the output current bidirectionaly with low standby power consumption. In other words, if the output terminal is providing current, then the gate voltage of M5 and M3 will
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Fig. 2 (a) The class AB buffer circuit. (b) The simplified representation of the proposed programmable OTA
increase, which will decrease the current in M5. As a result, the gate voltage of M6 will increase because it is connected to the source of M3. Thus, the current in M6 will increase. Similarly, if the output terminal is drawing current, the gate voltage of M5 and M3 is decreased. Hence, the current through them is increased, and as a result, the gate voltage of M6 is decreased also. This will decrease the current in M6 and increase it in M5, thus, providing bidirectional output current. The small output resistance of the buffer circuit is approximately given by rout ≈
(1/rds1 ) + (1/rds15 ) 1 . · gm1 (gm5 + gm6 + (1/rds1 ) + (1/rds15 ))
(2)
The output resistance is reduced by the class AB negative feedback loop. Also note that when the circuit is supplying current, the transconductance of M6 dominates and that of M5 is negligible. Similarly, when the circuit is sinking current, the transconductance of M5 dominates, and M6 can be neglected. Moreover the noise behavior of the buffer circuit is to be calculated. Since the class AB connected to the drain of M1, the input referred noise of this network is divided by the high gain at the drain of M1. Therefore the input referred noise by the transistors M3, M4, M5, and M6 can be neglected. The main noise contribution of the buffer circuits comes from M1 directly and from the current source transistor. The input referred noise therefore is given by gm15 2 2 2 Vni2 = VnM1 + VnM15 . (3) gm1 The noise contributed by the current source transistor can by minimized by increasing the transconductance of transistor M1 and by using long channel transistors for the current source.
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To estimate the standby power consumption, assume that all transistors are in saturation region and that M3 and M4 are matched. Then it follows that VSG5 + VSG3 + VSG6 = VDD − VSS ,
(4)
VSG7 + VSG8 + VSG4 = VDD − VSS .
(5)
In standby mode, no current is withdrawn from the output terminals, and the current Ib is equal to the current flowing through MC . Also in standby mode, M5 and M6 have equal currents. Therefore, IM6 = IM5 = Isb . Thus, the standby power consumption is given by K4 PSB = VDD Ib + 2Isb + (VDD − 2VT n + VTp )2 . 2
(6)
(7)
The last term in the previous equation is the current through the level shift transistors M3 and M4. This current can be kept small by choosing a small aspect ratio for M3 and M4. 2.2 Digitally Programmable OTA Figure 2(b) shows the OTA structure with programmable transconductance, which depends on linearized NMOS transistor array connected between the output terminals of two buffers as mentioned earlier. The current through the resistor is given by Io =
V+ −V− . R + 2rout
(8)
Therefore, the transconductance is given by Gm =
1 , R + 2rout
(9)
where R=
VD − VS , IDS
K = KMR0 + KMR1 + · · · + KMR(d−1) , W KMRd = μn Cox , L d
(10) (11) (12)
where μn is the electron mobility, Cox is the gate oxide capacitance per unit area, and W/L is the transistor aspect ratio. Thus, the resistor value is controlled by the aspect ratio of the NMOS transistors, and the overall Gm will depend directly on the NMOS transistor aspect ratio. This will give a wider range to choose the desirable value of the resistance. Connecting
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the gate of any transistor to the maximum supply will turn it on, and the transistor will operate in the linear mode. Similarly, connecting the gate of a transistor to the minimum supply puts the transistor in the off mode. Through this mechanism, the circuit can be digitally programmed. The overall digitally programmable OTA is shown in Fig. 3. In Fig. 3, the current is copied from the output terminal of each buffer to the output terminals of the OTA using transistors M19, M20, M21, and M22. The gates of M19–M22 are connected to the gates of M12, M9, M11, and M7, respectively, which results in current mirroring to the output terminal. This mirroring action provides more flexibility to control the overall Gm by changing the aspect ratio of the transistors M19–M22. Moreover, the inputs to the differential OTA must be balanced to ensure maximum linear performance of the circuit. However, the OTA circuit will be followed by another OTA circuit as it will be shown later. To ensure that the output voltage of the OTA is nearly equal and following the input voltage, the output common mode (CM) voltage must be controlled. To prevent the change in the output common mode voltage, a common mode feedback (CMFB) circuit is needed [8]. It determines the output CM voltage and controls it to a specified value Vcm (usually midrail) even with the presence of large differential signals. When dual power supplies are used, Vcm is set to zero. The CMFB circuit consists of transistors Mce1, Mce2, Mc1, Mc2, Mc3, M29, and M30 in addition to two resistors (R) and two capacitors (C) that are used to control the output voltages (Vo1 and Vo2 ) [1]. The CMFB generates the CM voltage of the output signals at node Vcm0 via two equal resistors (R). This voltage is then compared to Vcm using differential amplifier Mc1 and Mc2 with the negative feedback forcing Vcm0 to follow Vcm . The two capacitors in the CMFB circuit improve the transient response of the averaging circuit by illuminating any overshoot may occur in the output signal of the averaging circuit (Vcm0 ). The operation of the CMFB circuit can be explained as follows. In the ideal case of fully balanced output signals, Vcm0 = 0. Since Vcm0 and Vcm are equal, the tail current Ibcm will be divided equally between Mc1 and Mc2. Therefore, a current Ibcm /2 will be passed via Mc3, Mc29, and Mc30 to the output nodes, and the circuit exhibits the proper biasing. Next, consider the case where the magnitude of Vo1 is greater than Vo2 , which results in a positive CM signal at Vcm0 . This voltage will cause the current in Mc29 and Mc30 to decrease pulling down the voltages Vo1 and Vo2 until the CM voltage Vcm0 is brought back to zero. Similarly, in case of a negative CM signal, the circuit will adjust Vcm0 to be equal to Vcm . 2.3 Simulation Results The OTA circuit is simulated using PSPICE 0.25-µm TSMC technology under ±0.8 voltage supply. Figure 4 shows the output impedance Zout of the buffer circuit shown in Fig. 2(a); it worth noting that the real part of this output impedance (rout ) is about 40 K. Figures 5 and 6 show the differential output current and the derivative of the differential output current, respectively, of the proposed OTA for different three bit code word assuming that the output terminals of the transconductance are loaded by Ro1 = Ro2 = 1 K. The Gm value varies from 3 nA/V up to 9 nA/V, while the input
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Fig. 3 The digitally programmable OTA
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Fig. 4 The output impedance Zout of the class AB buffer shown in Fig. 2(a)
Fig. 5 The differential output current of the proposed OTA for different 3-bit code words
Fig. 6 The derivative of the differential output current of the proposed OTA for different 3-bit code words
voltage scanned from −200 mV to 200 mV. Figure 7 shows the frequency response of the programmable OTA for the different three-bit code word combinations. Figure 8 presents the third-order intermodulation test (IM3) with two tones at (60 and 80 Hz)
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Fig. 7 The magnitude response of the output differential current of the proposed OTA for different 3 bit code words
Fig. 8 The output differential current of the proposed OTA under IM3 test for 60 and 80 Hz with amplitude of 100 mV p-p
to eliminate the out of band IM3, the IM3 test reveal a value of −37 dB for the OTA with Gm = 3 nA/V (001 combination) under the same load conditions. 3 Filter for ECG Detection In order to precisely obtain the ECG waveform, the detection circuit must be capable of attenuating the noise signals and the out-of-band interference signals. Therefore, the order of the filter and the cut-off frequency must be chosen to ensure maximum attenuation of the undesired interference. The requirement for ECG detection system leads to an increase in the filter constraints such as: (1) the high order (typically above fourth order), (2)√the low THD (60 dB), and (5) the low power consumption (60 dB), programmable range of bandwidth of 184–235 Hz, and acceptable power consumption of 40 µW. These achieved properties made the proposed programmable OTA-based LPF ideal for portable ECG detection systems.
References 1. H. Alzaher, H. Elwan, M. Ismail, A CMOS fully balanced second-generation current conveyor. IEEE Trans. Circuits Syst. II 50, 278–287 (2003) 2. R. Baker, CMOS Circuit Design, Layout, and Simulation, 3rd edn. (Wiley, New York, 2010) 3. E. Berbari, Principles of electrocardiography, in The Biomedical Engineering Handbook, ed. by E.J. Bronzino 2nd edn. (CRC Press, Boca Raton, 2000) 4. A. Bharadwaj, U. Kamath, Accurate ECG signal processing. Technical report. Cypress Semiconductor Corporation (2011) 5. H. Elwan, M. Ismail, A CMOS digitally programmable class AB OTA circuit. IEEE Trans. Circuits Syst. II 47, 1551–1556 (2000) 6. T. Hassan, S. Mahmoud, New CMOS DVCC realization and applications to instrumentation amplifier and active RC filters. AEÜ, Int. J. Electron. Commun. 64, 47–55 (2010) 7. S. Lee, C. Cheng, Systematic design and modeling of a OTA-C filter for portable ECG detection. IEEE Trans. Biomed. Circuits Syst. 3, 53–64 (2009) 8. S. Mahmoud, I. Awad, Fully differential CMOS current feedback operational amplifier. Analog Integr. Circuits Signal Process. 43, 61–69 (2005) 9. S. Mahmoud, A. Soliman, A CMOS programmable balanced output transconductor for analog signal processing. Int. J. Electron. 82, p605–620 (1997) 10. S. Mahmoud, A. Soliman, New CMOS fully differential difference transconductors and application to fully differential filters suitable for VLSI. Microelectron. J. 30, 169–192 (1999) 11. S. Mahmoud, A. Soliman, New MOS-C biquad filter using the current feedback operational amplifier. IEEE Trans. Circuits Syst. I 26, 1431–1440 (1999) 12. K. Ng, P. Chan, A CMOS analog front-end IC for portable EEG/ECG monitoring applications. IEEE Trans. Circuits Syst. I 52, 2335–2347 (2005) 13. R. Northrop, Analysis and Application of Analog Electronic Circuits to Biomedical Instrumentation, 1st edn. (CRC Press, Boca Raton, 2003) 14. E. Rodriguez-Villegas, A. Yufera, A. Rueda, A 1.25-V micropower Gm-C filter based on FGMOS transistors operating in weak inversion. IEEE J. Solid-State Circuits 39, 100–111 (2004) 15. M. Shaker, S. Mahmoud, A. Soliman, High-order Gm-C filters with current transfer function based on multiple loop feedback, in IEEE International Conference on Signal Processing and Communications (ICSPC 2007), (2007), pp. 85–88 16. S. Solis-Bustos, A 60-dB dynamic-range CMOS sixth-order 2.4-Hz low-pass filter for medical applications. IEEE Trans. Circuits Syst. II 47, 1391–1398 (2000) 17. R. Udrea, D. Vizireanu, S. Ciochina, An improved spectral subtraction method for speech enhancement using a perceptual weighting filter. Digit. Signal Process. 18, 581–587 (2008) 18. R. Udrea, D. Vizireanu, S. Ciochina, S. Halunga, Nonlinear spectral subtraction method for colored noise reduction using multi-band Bark scale. Signal Process. 88, 1299–1303 (2008) 19. A. Veeravalli, E. Sanchez-Sinencio, J. Silva-Martinez, Transconductance amplifier structures with very small transconductances: a comparative design approach. IEEE J. Solid-State Circuits 37, 770– 775 (2002)
Low-Noise Low-Pass Filter for ECG Portable Detection Systems with Digitally Programmable Range Soliman A. Mahmoud · Ahmed Bamakhramah · Saeed A. Al-Tunaiji
Received: 6 November 2012 / Revised: 30 January 2013 / Published online: 13 February 2013 © Springer Science+Business Media New York 2013
Abstract This paper presents the design of an operational transconductance amplifier-C (OTA-C) low-pass filter for a portable Electrocardiogram (ECG) detection system. A fifth-order Butterworth filter using ladder topology is utilized to reduce the effect of component tolerance and to provide a maximally flat response. The proposed filter is based on a novel class AB digitally programmable fully differential OTA circuit. Based on this, PSPICE simulation results for the filter using 0.25-µm technology and operating under ±0.8 V voltage supply are also given. The filter provides a third harmonic distortion (HD3) of 53.5 dB for 100 mV p-p @50 Hz sinusoidal input, in√ put referred noise spectral density of 120 µVrms/ Hz, total power consumption of 30 µW, and a bandwidth of 243 Hz. These results demonstrate the ability of the filter to be used for ECG signal filtering that is located within 150 Hz. Keywords ECG · OTA-C filters · Low-voltage low-power CMOS circuits · Low-frequency filters 1 Introduction The world of biomedical electronics is rapidly changing with high future potential [12]. New designs with new technologies are emerging in which more features S.A. Mahmoud () · A. Bamakhramah · S.A. Al-Tunaiji Electrical and Computer Engineering Department, Sharjah University, Sharjah, United Arab Emirates e-mail: [email protected] A. Bamakhramah e-mail: [email protected] S.A. Al-Tunaiji e-mail: [email protected] S.A. Mahmoud Electrical Engineering Department, Fayoum University, Fayoum, Egypt e-mail: [email protected]
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Fig. 1 A block diagram illustrating the typical input stage of an ECG detection system
are placed into the biomedical devices. Biomedical devices need to be accurate, precise, and comfortable in usage as well as condensed in size. In case of portable devices, issues related to power consumption become also important. The designs for these portable devices must be capable enough to provide different tradeoffs between power and noise depending on the biomedical signal characteristics. For preprocessing the Electrocardiogram (ECG) signal (also called cardiac signal), a typical system shown in Fig. 1 is used [4]. Since the cardiac signals are weak amplitude signals, typically in the range of 400 µV–2.5 mV, a preamplifier is used to amplify the signal with a gain of 10–100 [3, 13]. After this amplifier, a low-pass filter (LPF) with low cut-off frequency (around 250 Hz) is used to eliminate the unwanted noise [3, 13]. This LPF is the key part in the whole system since the accuracy of the overall system depends on it. The major critical issues in designing such LPF are the linearity, input referred noise, and power consumption. The need of high linearity is to achieve low THD and acceptable IM3; also a high input referred noise can eliminate the weak cardiac signal. Moreover, implementing this LPF with low frequency (f = 1/RC) on an integrated chip (IC) is not a simple task. In an IC, a typical capacitor value is 10 pF, and a typical resistance value is 10 K [7]. Therefore, to implement LPF with low frequency on an IC, a resistance with value of 100 M is required, which means that a realization using active components is needed. In general, analog integrated filters can be realized using different approaches such as switched capacitor (SC) and continuous-time (CT) implementations. The SC filters are limited to low-frequency applications due to: (1) the sampling process and (2) the need for high supply voltage operation because of turning MOS switches on and off, and maintaining proper op-amp operation. On the other hand, the CT filters have a significant speed advantage over discrete-time filters because no sampling is required [6, 10, 15]. Therefore a technique to realize this filter using CT operational transconductance amplifier-C (OTA-C) filters is required in which the value of the transconductance (Gm) and the capacitors determine the cut off frequency value. As a result, a typical value of Gm should be very small (usually in the order of a few nA/V below ∼10 nA/V). Obtaining this OTA with this Gm leads to higher noise levels, so maintaining low Gm with low input referred noise requires an optimized design to achieve it. As a result, techniques were proposed to reduce and eliminate the noise problems such as spectral subtraction method in [17, 18]. Several filter designs have been proposed in the literature [7, 14, 19], and [16]. A systematic design and modeling for low-voltage and low-power OTA-C portable filter to detect ECG signal using MATLAB SIMULINK is given in [7]. A secondorder micro-power continuous-time filter using special features of the FGMOS transistor is presented in [14]. The realizations given in [19] are based on obtaining
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very small OTAs using current division, source degeneration, floating-gate techniques, and bulk driven techniques to obtain filters. Linear voltage-to-current transducers combined with current division and current cancellation techniques are used to implement low-distortion OTAs suitable for low-frequency application as given in [16]. In this paper, a digitally programmable OTA-C low-pass filter for ECG detection system is proposed. This filter uses low-voltage supply and provides low input referred noise spectral density together with low THD. The OTA is a balanced input differential output voltage-to-current converter with the use of a common feedback (CMFB) circuit to provide fixed performance under different load conditions. The use of programmable OTA in the filter is to compensate the errors due to fabrication process and due to any nonlinearity in the model parameters of the transistors. Also the use of tunable OTA will change the bandwidth of the filter according to the value of the Gm that will give more range of covered frequencies with similar noise. The objective of this LPF design is to achieve high linearity (by using linear programmable OTA), low input referred noise and low power consumption. This paper is organized as follows: In Sect. 2, the OTA design, together with its programmability concept, is discussed. Section 3 describes the filter characteristics and specifications suitable for an ECG detection system. PSPICE simulation results using 0.25-µm TSMC CMOS technology of the OTA and the filter are presented. Finally, Sect. 4 concludes this paper.
2 OTA Design The structure of the proposed fully differential OTA is based on the programmability concept in which a variable resistor is connected between the outputs of two buffers. Because of this structure, the buffer circuit must be utilized carefully to provide acceptable performance of the overall OTA. The CMOS circuits of the voltage buffer, resistor, and the OTA are described in this section with the simulation results. 2.1 Class AB buffer Circuit In this subsection, a low-power class AB CMOS buffer circuit is presented. Figure 2(a) shows the used buffer. This buffer is first proposed in [5]. To ensure voltage tracking, a constant biasing current Ib is forced through transistor M1, and the output voltage of the buffer assuming M1 is operating in the saturation region and is given by 2Ib Vo = Vi + VT − . (1) K The low output resistance of the buffer is achieved by taking the output from the source of the transistor M1 and by the action of negative feedback transistors M5 and M6. The operation concept of the class AB configuration is to control the output current bidirectionaly with low standby power consumption. In other words, if the output terminal is providing current, then the gate voltage of M5 and M3 will
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Fig. 2 (a) The class AB buffer circuit. (b) The simplified representation of the proposed programmable OTA
increase, which will decrease the current in M5. As a result, the gate voltage of M6 will increase because it is connected to the source of M3. Thus, the current in M6 will increase. Similarly, if the output terminal is drawing current, the gate voltage of M5 and M3 is decreased. Hence, the current through them is increased, and as a result, the gate voltage of M6 is decreased also. This will decrease the current in M6 and increase it in M5, thus, providing bidirectional output current. The small output resistance of the buffer circuit is approximately given by rout ≈
(1/rds1 ) + (1/rds15 ) 1 . · gm1 (gm5 + gm6 + (1/rds1 ) + (1/rds15 ))
(2)
The output resistance is reduced by the class AB negative feedback loop. Also note that when the circuit is supplying current, the transconductance of M6 dominates and that of M5 is negligible. Similarly, when the circuit is sinking current, the transconductance of M5 dominates, and M6 can be neglected. Moreover the noise behavior of the buffer circuit is to be calculated. Since the class AB connected to the drain of M1, the input referred noise of this network is divided by the high gain at the drain of M1. Therefore the input referred noise by the transistors M3, M4, M5, and M6 can be neglected. The main noise contribution of the buffer circuits comes from M1 directly and from the current source transistor. The input referred noise therefore is given by gm15 2 2 2 Vni2 = VnM1 + VnM15 . (3) gm1 The noise contributed by the current source transistor can by minimized by increasing the transconductance of transistor M1 and by using long channel transistors for the current source.
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To estimate the standby power consumption, assume that all transistors are in saturation region and that M3 and M4 are matched. Then it follows that VSG5 + VSG3 + VSG6 = VDD − VSS ,
(4)
VSG7 + VSG8 + VSG4 = VDD − VSS .
(5)
In standby mode, no current is withdrawn from the output terminals, and the current Ib is equal to the current flowing through MC . Also in standby mode, M5 and M6 have equal currents. Therefore, IM6 = IM5 = Isb . Thus, the standby power consumption is given by K4 PSB = VDD Ib + 2Isb + (VDD − 2VT n + VTp )2 . 2
(6)
(7)
The last term in the previous equation is the current through the level shift transistors M3 and M4. This current can be kept small by choosing a small aspect ratio for M3 and M4. 2.2 Digitally Programmable OTA Figure 2(b) shows the OTA structure with programmable transconductance, which depends on linearized NMOS transistor array connected between the output terminals of two buffers as mentioned earlier. The current through the resistor is given by Io =
V+ −V− . R + 2rout
(8)
Therefore, the transconductance is given by Gm =
1 , R + 2rout
(9)
where R=
VD − VS , IDS
K = KMR0 + KMR1 + · · · + KMR(d−1) , W KMRd = μn Cox , L d
(10) (11) (12)
where μn is the electron mobility, Cox is the gate oxide capacitance per unit area, and W/L is the transistor aspect ratio. Thus, the resistor value is controlled by the aspect ratio of the NMOS transistors, and the overall Gm will depend directly on the NMOS transistor aspect ratio. This will give a wider range to choose the desirable value of the resistance. Connecting
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the gate of any transistor to the maximum supply will turn it on, and the transistor will operate in the linear mode. Similarly, connecting the gate of a transistor to the minimum supply puts the transistor in the off mode. Through this mechanism, the circuit can be digitally programmed. The overall digitally programmable OTA is shown in Fig. 3. In Fig. 3, the current is copied from the output terminal of each buffer to the output terminals of the OTA using transistors M19, M20, M21, and M22. The gates of M19–M22 are connected to the gates of M12, M9, M11, and M7, respectively, which results in current mirroring to the output terminal. This mirroring action provides more flexibility to control the overall Gm by changing the aspect ratio of the transistors M19–M22. Moreover, the inputs to the differential OTA must be balanced to ensure maximum linear performance of the circuit. However, the OTA circuit will be followed by another OTA circuit as it will be shown later. To ensure that the output voltage of the OTA is nearly equal and following the input voltage, the output common mode (CM) voltage must be controlled. To prevent the change in the output common mode voltage, a common mode feedback (CMFB) circuit is needed [8]. It determines the output CM voltage and controls it to a specified value Vcm (usually midrail) even with the presence of large differential signals. When dual power supplies are used, Vcm is set to zero. The CMFB circuit consists of transistors Mce1, Mce2, Mc1, Mc2, Mc3, M29, and M30 in addition to two resistors (R) and two capacitors (C) that are used to control the output voltages (Vo1 and Vo2 ) [1]. The CMFB generates the CM voltage of the output signals at node Vcm0 via two equal resistors (R). This voltage is then compared to Vcm using differential amplifier Mc1 and Mc2 with the negative feedback forcing Vcm0 to follow Vcm . The two capacitors in the CMFB circuit improve the transient response of the averaging circuit by illuminating any overshoot may occur in the output signal of the averaging circuit (Vcm0 ). The operation of the CMFB circuit can be explained as follows. In the ideal case of fully balanced output signals, Vcm0 = 0. Since Vcm0 and Vcm are equal, the tail current Ibcm will be divided equally between Mc1 and Mc2. Therefore, a current Ibcm /2 will be passed via Mc3, Mc29, and Mc30 to the output nodes, and the circuit exhibits the proper biasing. Next, consider the case where the magnitude of Vo1 is greater than Vo2 , which results in a positive CM signal at Vcm0 . This voltage will cause the current in Mc29 and Mc30 to decrease pulling down the voltages Vo1 and Vo2 until the CM voltage Vcm0 is brought back to zero. Similarly, in case of a negative CM signal, the circuit will adjust Vcm0 to be equal to Vcm . 2.3 Simulation Results The OTA circuit is simulated using PSPICE 0.25-µm TSMC technology under ±0.8 voltage supply. Figure 4 shows the output impedance Zout of the buffer circuit shown in Fig. 2(a); it worth noting that the real part of this output impedance (rout ) is about 40 K. Figures 5 and 6 show the differential output current and the derivative of the differential output current, respectively, of the proposed OTA for different three bit code word assuming that the output terminals of the transconductance are loaded by Ro1 = Ro2 = 1 K. The Gm value varies from 3 nA/V up to 9 nA/V, while the input
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Fig. 3 The digitally programmable OTA
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Fig. 4 The output impedance Zout of the class AB buffer shown in Fig. 2(a)
Fig. 5 The differential output current of the proposed OTA for different 3-bit code words
Fig. 6 The derivative of the differential output current of the proposed OTA for different 3-bit code words
voltage scanned from −200 mV to 200 mV. Figure 7 shows the frequency response of the programmable OTA for the different three-bit code word combinations. Figure 8 presents the third-order intermodulation test (IM3) with two tones at (60 and 80 Hz)
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Fig. 7 The magnitude response of the output differential current of the proposed OTA for different 3 bit code words
Fig. 8 The output differential current of the proposed OTA under IM3 test for 60 and 80 Hz with amplitude of 100 mV p-p
to eliminate the out of band IM3, the IM3 test reveal a value of −37 dB for the OTA with Gm = 3 nA/V (001 combination) under the same load conditions. 3 Filter for ECG Detection In order to precisely obtain the ECG waveform, the detection circuit must be capable of attenuating the noise signals and the out-of-band interference signals. Therefore, the order of the filter and the cut-off frequency must be chosen to ensure maximum attenuation of the undesired interference. The requirement for ECG detection system leads to an increase in the filter constraints such as: (1) the high order (typically above fourth order), (2)√the low THD (60 dB), and (5) the low power consumption (60 dB), programmable range of bandwidth of 184–235 Hz, and acceptable power consumption of 40 µW. These achieved properties made the proposed programmable OTA-based LPF ideal for portable ECG detection systems.
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