On-chip Detection of Process Shift and Process ... - Semantic Scholar
On-chip Detection of Process Shift and Process Spread for Silicon Debugging and Model-Hardware Correlation Islam A.K.M. Mahfuzul and Hidetoshi Onodera Department of Communications and Computer Engineering Graduate School of Informatics Kyoto University [email protected]
ATS, 2012/11/22
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
1 / 23
Outline
1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
2 / 23
Introduction
Background
Testing of Chip is a Huge Task Testing is a must to ensure correct operation. Test effort > Design effort Need correct strategy. Fault Types Manufacturing fault. Parametric fault. Test Types Functional test. Delay test. This research proposes process-sensitive monitor circuits for parametric fault based delay defects. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
3 / 23
Introduction
Background
Delay Defects Manufacturing defect or parametric defect? If parametric defect, how to debug the defect?
Leakage
What caused the delay defect? Threshold voltage fluctuation? Gate length deviation? etc. The model was not correct? Failed to predict the values. Need to correlate the model to hardware. Continuous feedback required.
Maximum Frequency Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
4 / 23
Introduction
Background
Process Variation Process variation
Leakage
pMOSFET Threshold Voltage
Variation in performance
Maximum Frequency
SS
Process spread FS Process shift TT
SF
FF
nMOSFET Threshold Voltage
Design option Design for worst cases. Design for typical case and bin the products. Maximum operating frequency?
Amount of spread for statistical design approach? Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
5 / 23
Introduction
Background
Process Control Module Conventional
PCM
How helpful are PCM data? Difference in layout. Location in the wafer. Not product-representative. DC vs. AC. Often different sizes due to probing. Product-representative monitor circuits 1 ⇒ On-chip Detection 1
Gattiker et al., ITC’2006. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
6 / 23
Introduction
Motivation and Contribution
Motivation and Contribution System (1) Circuit
Extraction technique (2)
Variation model
Transistor model
Fabrication
Monitoring process-characteristics from product chips. Efficient model-to-hardware correlation methodology. Distinguish manufacturing fault and parametric fault. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
7 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Outline 1
Introduction
2
Proposed Monitor Circuits On-chip Monitor Circuits Model-Hardware Correlation
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
8 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Proposed Monitor Circuits
Sensitivity to ∆Vthp
5
pMOSFET monitor
4 3 2 Standard inverter nMOSFET monitor
1 0 0
(a) Standard
(b) N-sensitive
Mahfuz (Kyoto University)
1
2 3 4 5 Sensitivity to ∆Vthn
6
7
Embed monitor circuits. Process-sensitive monitor structures.
(c) P-sensitive
Monitor Circuits
ATS, 2012/11/22
9 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Parameter-sensitive Monitor Structure Proposed Normalized Frequency
Normalized Frequency
Conventional
VDD-Vthn
3 nMOSFET
"L"
Ip = 0 In
2 1 pMOSFET
VDD
3 "L"
Ip = 0 In
2 1
0 -40 0 40 Threshold Voltage Change [mV]
-40 0 40 Threshold Voltage Change [mV]
Sensitive to both nMOSFET and pMOSFET Not-suitable for on-chip detection. Mahfuz (Kyoto University)
Monitor Circuits
Sensitive to either nMOSFET or pMOSFET. Suitable for on-chip detection. ATS, 2012/11/22
10 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
1.3
pMOSFET monitor frequency
pMOSFET on current [Normalized]
Corner Detection Capability FF
1.2
SF
1.1 1
TT
0.9 0.8
FS
SS
0.7 0.7
0.8 0.9 1 1.1 1.2 nMOSFET on current [Normalized]
FF
1.8
1.4
SF
1
TT FS
0.6
1.3
0.2
SS 0.6 1 1.4 1.8 nMOSFET monitor frequency
2.2
Process corners are distinguishable using the proposed monitor circuit outputs. Quick detection of process-characteristics. Reduce debugging time for delay defects.
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
11 / 23
Proposed Monitor Circuits
Model-Hardware Correlation
Model-hardware Correlation Extraction of Parameters
Performance 2
Parameter 2 Estimation
Measurement
FF
SF
Sensitivity matrix SS
Reference
Performance 1
Reference
FS
Parameter 1
Extract parameters from monitor circuit outputs2 . Need parameter-sensitized monitor circuits. Need to characterize monitor circuits by simulation. 2
Mahfuzul et al., ICMTS’2011 Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
12 / 23
Proposed Monitor Circuits
Model-Hardware Correlation
Model-Hardware Correlation Process shift
Process Shift Amount of shifts in process parameters. Global variation. #1
Parameter Extraction Consider RO frequency as a function of ∆Vthp ,∆Vthn and ∆L.
3 equations from 3 ROs. Solve the equations and derive unknown ∆Vthp ,∆Vthn and ∆L.a a
5
Monitor Circuits
#3
#4
(b) INV-NPASS-I
#5
#6
#7
(c) INV-PPASS-I
pMOSFET monitor
4 3 2 1 0 0
Mahfuzul, et al., ICMTS 2011 Mahfuz (Kyoto University)
(a) INV-STD
Sensitivity to ∆Vthp
F = f (∆Vthp , ∆Vthn , ∆L) = F0 + kp ∆Vthp + kn ∆Vthn + kl ∆L
#2
Standard inverter nMOSFET monitor
1
2 3 4 5 Sensitivity to ∆Vthn ATS, 2012/11/22
6 13 / 23
7
Proposed Monitor Circuits
Model-Hardware Correlation
Model-Hardware Correlation Process spread
Process Spread Amount of deviation in process parameters within a chip. Local variation. Parameter Extraction Assume linear sensitivity of each variability source. X F = F0 + KVthpi ∆Vthpi + KVthni ∆Vthni + KLi ∆Li . i
σF µF
2 =
X
kV2thpi σV2 thp + kV2thni σV2 thn + kLi2 σL2 .
i
3 equations from 3 ROs. Solve the equations and derive σVthp ,σVthn , and σL .a a
Fujimoto, et al., ICMTS 2012 Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
14 / 23
Measurements from Corner Chips
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips Test Chip Design Measurement Results
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
15 / 23
Measurements from Corner Chips
Test Chip Design
ROs 14x21
Controller
Test Chip ROs
Enable
65 nm triple well process. Array based structure to capture local variation. 14 × 21 = 294 instances of the same RO type. TT, SS, FF, FS, SF corner chips. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
16 / 23
Measurements from Corner Chips
Measurement Results
pMOSFET monitor freq. [normalized]
Monitor Frequencies 2.2 2 1.8 1.6
FF Model
1.4 SF
1.2 1
TT
0.8
FS
0.6 SS
0.4 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 nMOSFET monitor freq. [normalized]
2.2
Mismatch between corner model and measurement. Amount of process shift? Amounts of shifts in key process parameters?
Amount of spread? Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
17 / 23
Measurements from Corner Chips
Measurement Results
WID Variation 5
nMOSFET monitor pMOSFET monitor Standard inverter monitor
4.5 4
% Variation
3.5 3 2.5 2 1.5 1 0.5 0
TT SS FF FS SF
TT SS FF FS SF
TT SS FF FS SF
nMOSFET variability is larger than pMOSFET variability ⇒ Important for statistical design. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
18 / 23
Parameter Extraction Results
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
19 / 23
Parameter Extraction Results
pMOSFET threshold [normalized]
Shifts in Parameters 1.3 1.2
Model FS
Estimation
SS
1.1 Corner in model
1
TT
0.9 0.8 0.7 0.6 0.7
SF
FF
Estimated corner 0.8 0.9 1 1.1 1.2 nMOSFET threshold [normalized]
1.3
Amount of shifts are extracted. Prediction of performances. Feedback to model. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
20 / 23
Parameter Extraction Results
Spreads in Parameters Table: Extracted standard deviation of MOSFET threshold voltages and gate length from RO frequency measurements.
Corner TT SS FF FS SF
σVthn [mV] σVthp [mV] σL [nm] 16.6 11.9 0.89 18.3 14.5 0.53 20.9 16.6 1.14 18.2 13.3 0.99 18.2 13.6 0.99
FF corner has larger variation. SS corner has smaller ∆L variation. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
21 / 23
Conclusion
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
22 / 23
Conclusion
Conclusion Summary Use of monitor circuits for detection of process corner and process spread. Product-representative monitor circuits suitable for detection is proposed. Model-to-hardware correlation methodology is proposed. Test chip has been fabricated in a 65 nm process. Experimental results from corner chips show the validity of the proposed circuits.
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
23 / 23
ATS, 2012/11/22
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
1 / 23
Outline
1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
2 / 23
Introduction
Background
Testing of Chip is a Huge Task Testing is a must to ensure correct operation. Test effort > Design effort Need correct strategy. Fault Types Manufacturing fault. Parametric fault. Test Types Functional test. Delay test. This research proposes process-sensitive monitor circuits for parametric fault based delay defects. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
3 / 23
Introduction
Background
Delay Defects Manufacturing defect or parametric defect? If parametric defect, how to debug the defect?
Leakage
What caused the delay defect? Threshold voltage fluctuation? Gate length deviation? etc. The model was not correct? Failed to predict the values. Need to correlate the model to hardware. Continuous feedback required.
Maximum Frequency Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
4 / 23
Introduction
Background
Process Variation Process variation
Leakage
pMOSFET Threshold Voltage
Variation in performance
Maximum Frequency
SS
Process spread FS Process shift TT
SF
FF
nMOSFET Threshold Voltage
Design option Design for worst cases. Design for typical case and bin the products. Maximum operating frequency?
Amount of spread for statistical design approach? Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
5 / 23
Introduction
Background
Process Control Module Conventional
PCM
How helpful are PCM data? Difference in layout. Location in the wafer. Not product-representative. DC vs. AC. Often different sizes due to probing. Product-representative monitor circuits 1 ⇒ On-chip Detection 1
Gattiker et al., ITC’2006. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
6 / 23
Introduction
Motivation and Contribution
Motivation and Contribution System (1) Circuit
Extraction technique (2)
Variation model
Transistor model
Fabrication
Monitoring process-characteristics from product chips. Efficient model-to-hardware correlation methodology. Distinguish manufacturing fault and parametric fault. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
7 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Outline 1
Introduction
2
Proposed Monitor Circuits On-chip Monitor Circuits Model-Hardware Correlation
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
8 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Proposed Monitor Circuits
Sensitivity to ∆Vthp
5
pMOSFET monitor
4 3 2 Standard inverter nMOSFET monitor
1 0 0
(a) Standard
(b) N-sensitive
Mahfuz (Kyoto University)
1
2 3 4 5 Sensitivity to ∆Vthn
6
7
Embed monitor circuits. Process-sensitive monitor structures.
(c) P-sensitive
Monitor Circuits
ATS, 2012/11/22
9 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
Parameter-sensitive Monitor Structure Proposed Normalized Frequency
Normalized Frequency
Conventional
VDD-Vthn
3 nMOSFET
"L"
Ip = 0 In
2 1 pMOSFET
VDD
3 "L"
Ip = 0 In
2 1
0 -40 0 40 Threshold Voltage Change [mV]
-40 0 40 Threshold Voltage Change [mV]
Sensitive to both nMOSFET and pMOSFET Not-suitable for on-chip detection. Mahfuz (Kyoto University)
Monitor Circuits
Sensitive to either nMOSFET or pMOSFET. Suitable for on-chip detection. ATS, 2012/11/22
10 / 23
Proposed Monitor Circuits
On-chip Monitor Circuits
1.3
pMOSFET monitor frequency
pMOSFET on current [Normalized]
Corner Detection Capability FF
1.2
SF
1.1 1
TT
0.9 0.8
FS
SS
0.7 0.7
0.8 0.9 1 1.1 1.2 nMOSFET on current [Normalized]
FF
1.8
1.4
SF
1
TT FS
0.6
1.3
0.2
SS 0.6 1 1.4 1.8 nMOSFET monitor frequency
2.2
Process corners are distinguishable using the proposed monitor circuit outputs. Quick detection of process-characteristics. Reduce debugging time for delay defects.
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
11 / 23
Proposed Monitor Circuits
Model-Hardware Correlation
Model-hardware Correlation Extraction of Parameters
Performance 2
Parameter 2 Estimation
Measurement
FF
SF
Sensitivity matrix SS
Reference
Performance 1
Reference
FS
Parameter 1
Extract parameters from monitor circuit outputs2 . Need parameter-sensitized monitor circuits. Need to characterize monitor circuits by simulation. 2
Mahfuzul et al., ICMTS’2011 Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
12 / 23
Proposed Monitor Circuits
Model-Hardware Correlation
Model-Hardware Correlation Process shift
Process Shift Amount of shifts in process parameters. Global variation. #1
Parameter Extraction Consider RO frequency as a function of ∆Vthp ,∆Vthn and ∆L.
3 equations from 3 ROs. Solve the equations and derive unknown ∆Vthp ,∆Vthn and ∆L.a a
5
Monitor Circuits
#3
#4
(b) INV-NPASS-I
#5
#6
#7
(c) INV-PPASS-I
pMOSFET monitor
4 3 2 1 0 0
Mahfuzul, et al., ICMTS 2011 Mahfuz (Kyoto University)
(a) INV-STD
Sensitivity to ∆Vthp
F = f (∆Vthp , ∆Vthn , ∆L) = F0 + kp ∆Vthp + kn ∆Vthn + kl ∆L
#2
Standard inverter nMOSFET monitor
1
2 3 4 5 Sensitivity to ∆Vthn ATS, 2012/11/22
6 13 / 23
7
Proposed Monitor Circuits
Model-Hardware Correlation
Model-Hardware Correlation Process spread
Process Spread Amount of deviation in process parameters within a chip. Local variation. Parameter Extraction Assume linear sensitivity of each variability source. X F = F0 + KVthpi ∆Vthpi + KVthni ∆Vthni + KLi ∆Li . i
σF µF
2 =
X
kV2thpi σV2 thp + kV2thni σV2 thn + kLi2 σL2 .
i
3 equations from 3 ROs. Solve the equations and derive σVthp ,σVthn , and σL .a a
Fujimoto, et al., ICMTS 2012 Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
14 / 23
Measurements from Corner Chips
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips Test Chip Design Measurement Results
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
15 / 23
Measurements from Corner Chips
Test Chip Design
ROs 14x21
Controller
Test Chip ROs
Enable
65 nm triple well process. Array based structure to capture local variation. 14 × 21 = 294 instances of the same RO type. TT, SS, FF, FS, SF corner chips. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
16 / 23
Measurements from Corner Chips
Measurement Results
pMOSFET monitor freq. [normalized]
Monitor Frequencies 2.2 2 1.8 1.6
FF Model
1.4 SF
1.2 1
TT
0.8
FS
0.6 SS
0.4 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 nMOSFET monitor freq. [normalized]
2.2
Mismatch between corner model and measurement. Amount of process shift? Amounts of shifts in key process parameters?
Amount of spread? Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
17 / 23
Measurements from Corner Chips
Measurement Results
WID Variation 5
nMOSFET monitor pMOSFET monitor Standard inverter monitor
4.5 4
% Variation
3.5 3 2.5 2 1.5 1 0.5 0
TT SS FF FS SF
TT SS FF FS SF
TT SS FF FS SF
nMOSFET variability is larger than pMOSFET variability ⇒ Important for statistical design. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
18 / 23
Parameter Extraction Results
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
19 / 23
Parameter Extraction Results
pMOSFET threshold [normalized]
Shifts in Parameters 1.3 1.2
Model FS
Estimation
SS
1.1 Corner in model
1
TT
0.9 0.8 0.7 0.6 0.7
SF
FF
Estimated corner 0.8 0.9 1 1.1 1.2 nMOSFET threshold [normalized]
1.3
Amount of shifts are extracted. Prediction of performances. Feedback to model. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
20 / 23
Parameter Extraction Results
Spreads in Parameters Table: Extracted standard deviation of MOSFET threshold voltages and gate length from RO frequency measurements.
Corner TT SS FF FS SF
σVthn [mV] σVthp [mV] σL [nm] 16.6 11.9 0.89 18.3 14.5 0.53 20.9 16.6 1.14 18.2 13.3 0.99 18.2 13.6 0.99
FF corner has larger variation. SS corner has smaller ∆L variation. Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
21 / 23
Conclusion
Outline 1
Introduction
2
Proposed Monitor Circuits
3
Measurements from Corner Chips
4
Parameter Extraction Results
5
Conclusion
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
22 / 23
Conclusion
Conclusion Summary Use of monitor circuits for detection of process corner and process spread. Product-representative monitor circuits suitable for detection is proposed. Model-to-hardware correlation methodology is proposed. Test chip has been fabricated in a 65 nm process. Experimental results from corner chips show the validity of the proposed circuits.
Mahfuz (Kyoto University)
Monitor Circuits
ATS, 2012/11/22
23 / 23
