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Phase Control for Resonant DC–DC Converter With Class-DE Inverter and Class-E Rectifier Hiroo Sekiya, Member, IEEE, Shuichi Nemoto, Jianming Lu, Member, IEEE, and Takashi Yahagi, Member, IEEE
Abstract—In this paper, a phase control scheme for Class-DE-E dc–dc converter is proposed and its performance is clarified. The proposed circuit is composed of phase-controlled Class-DE inverter and Class-E rectifier. The proposed circuit achieves the fixed frequency control without frequency harmonics lower than the switching frequency. Moreover, it is possible to achieve the continuous control in a wide range of the line and load variations. The output voltage decreases in proportion to the increase of the phase shift. The proposed converter keeps the advantages of Class-DE-E dc–dc converter, namely, a high power conversion efficiency under a high-frequency operation and low switch-voltage stress. Especially, high power conversion efficiency can be kept for narrow range control. We present numerical calculations for the design and the numerical analyses to clarify the characteristics of the proposed control. By carrying out circuit experiments, we show a quantitative similarity between the numerical predictions and the experimental results. In our experiments, the measured efficiency is over 84% with 2.5 W output power for 1.0-MHz operating frequency at the nominal operation. Moreover, the output voltage is regulated from 100% to 39%, keeping over 57% power conversion efficiency by using the proposed control scheme. Index Terms—Class-DE inverter, Class-E rectifier, numerical calculation, phase control, resonant dc–dc converter.
I. INTRODUCTION
R
ESONANT dc–dc converter [1]–[4] with Class-DE inverter [5]–[9] and Class-E rectifier [10] realizes high efficient power conversion under high operating frequency (megahertz order) because of the realization of Class-E switching conditions [11]–[14] in both inverter and rectifier. In this paper, we call this converter as “Class-DE-E dc–dc converter.” The power conversion efficiency of Class-DE inverter under high-frequency is as high as that of a conventional Class-D type under lower frequency operation. Because of high-frequency operation, the converters with Class-E switching realize very small sizes of magnetic components, which is one of the greatest advantages. For example, a Class-E amplifier that is one of Class-E family achieves 10-GHz operation with 67% efficiency [15]. Moreover, the switch-voltage stress of Class-DE inverter Manuscript received August 11, 2004; revised March 31 2005. This work was supported in part by the Support Center for Advanced Telecommunications Technology Research (SCAT), The Telecommunications Advancement Foundation (TAF), and The Yazaki Memorial Foundation for science and Technology. This paper was presented in part at IEEE Symposium on Circuits and Systems, 2001. This paper was recommended by Associate Editor Prof. A. Ioinovici. H. Sekiya, J. Lu, and T. Yahagi are with Graduate School of Science and Technology, Chiba University, Chiba 263-8522, Japan (e-mail:
[email protected]). S. Nemoto was with the Department of Information and Image Science, Chiba University, Chiba 263-8522, Japan. He is now with the Internet Initiative Japan Inc., Tokyo 101-0051, Japan. Digital Object Identifier 10.1109/TCSI.2005.855741
is equal to the input voltage, which is much lower than that in Class-E inverter. This is also advantage of Class-DE-E dc–dc converter, especially compared with Class-E dc–dc converter [16] that also can achieve a high power conversion efficiency under a high-frequency operation. From above these advantages, it is expected that Class-DE-E dc–dc converter may be in monolithic integrated circuit and, thus, further reduce size and cost of power converters. Widespread potential applications are in many types of electronic systems, including power supplies for a low-voltage microprocessor load. High efficiency is particularly critical for battery-operated systems. One of the disadvantages of this converter is the difficulty of the output control with keeping high power conversion efficiency. Therefore, several control schemes have been proposed. Frequency modulation (FM) control [1] is a method which changes switching frequency. FM control, however, generates a wide and unpredictable noise spectrum, making EMI control more difficult, and a poor utilization of magnetic components. There is an important class of applications in which the fixed-frequency converters are preferable to the variable-frequency converters. Because of the requirement of the fixed frequency control, recently, thinned-out method is applied to Class-DE-E dc–dc converter [2]. This achieves a fixed frequency operation and high-power conversion efficiency in wide range of the line and load variations. Thinned-out method, however, generates some frequency harmonics lower than the switching frequency, and a large filter inductor of the rectifier is necessary. Moreover, continuous control is difficult by using thinned-out method. Pulsewidth modulation (PWM) control is one of the continuous control methods with fixed frequency [3], [17], which is applied to Class-DE-E dc–dc converter in [3]. PWM control changes a dead time of the switches, therefore, the zero voltage switching (ZVS) is never achieved on the outside of the nominal operation. Hence, the switching losses increase as the pulsewidth in the control is larger or smaller than the nominal state. The output voltage is almost constant for a small change of the pulsewidth from the nominal state. There is a nonlinearity relation between output voltage and pulsewidth. These are problems of PWM control to Class-DE-E dc–dc converter since the high efficiency cannot be kept when the output voltage is changed by varying pulse width. On the other hand, a phase control, which is also fixed frequency control scheme, is applied several resonant converters and inverters [8], [18]–[20]. In [18], the main concept of phase control was described. Two current sources such as series resonant circuits are operated on the same load and the phase shift between the two currents allows for the output current and power control. The main advantages are that the frequency can be kept
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SEKIYA et al.: PHASE CONTROL FOR RESONANT DC–DC CONVERTER
constant and it is possible to achieve continuous control. In phase control, the dead time keeps constant for the control range. This paper presents the phase control scheme for Class-DE-E dc–dc converter and the its performance is clarified. The proposed circuit is composed of phase-controlled Class-DE inverter [8] and Class-E rectifier. The proposed circuit achieves the fixed frequency control without frequency harmonics lower than the switching frequency. Moreover, it is possible to achieve the continuous control in a wide range of the line and load variations. The output voltage decreases in proportion to the increase of the phase shift from the nominal state. The proposed converter keeps the advantages of Class-DE-E dc–dc converter, namely, high power conversion efficiency under high-frequency operation and low switch-voltage stress. Especially, high power conversion efficiency can be kept for narrow range control. We present numerical calculations for the design and the numerical analyses to clarify the characteristics of the proposed control. By carrying out circuit experiments, we show a quantitative similarity between the numerical predictions and the experimental results. In our experiments, the measured efficiency is over 84% with 2.5 W output power for 1.0-MHz operating frequency at the nominal operation. Moreover, the output voltage is regulated from 100% to 39%, keeping over 57% power conversion efficiency by using proposed control scheme. In our experiments, one inverter cannot achieve ZVS in the control range. However, the other inverter is satisfied with ZVS in the same range. Moreover, the region of non-ZVS can be reduced by devising the design specifications of the nominal state, for example, asymmetric circuit configurations like [20]. Therefore, it can be said that the phase control is suitable to the control scheme for Class-DE-E dc–dc converter.
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Fig. 1. (a) Class-DE-E dc–dc converter. (b) Phase-controlled Class-DE-E dc–dc converter.
II. CIRCUIT DESCRIPTION A. Class-DE-E DC–DC Converter Fig. 1(a) shows a circuit topology of Class-DE-E dc–dc converter [1]–[4]. Class-DE-E dc–dc converter consists of Class-DE inverter [5]–[9] and Class-E rectifier [10]. Both Class-DE inverter and Class-E rectifier keep high power conversion efficiency under a high-frequency operation because of Class-E switching conditions [11]–[14] as shown in Fig. 2. Therefore, Class-DE-E dc–dc converter can also achieve the high power conversion efficiency under the high-frequency operation. 1) Class-DE Inverter: Class-DE inverter is composed of an input voltage source , two switches and with anti-parallel diode and , two capacitors and shunting each switch, a series-resonant circuit . Fig. 2(a) shows waveforms of Class-DE inverter when a switch on duty ratio of each switch is 0.25. The switch on duty ratio of Class-DE inverter can be specified to any values from zero to 0.5. This is because both of switches are on state simultaneously for more than 0.5 of the switch on duty ratio, which causes short circuit in the inverter and makes the circuit broken. The switches are driven by a driving pattern of and in Fig. 2(a), where and drive and , respectively. The driving pattern generates a dead time during the period when one switch has turned off before the other switch has turned on. During the dead time, the output current charges one shunt capacitor and discharges the other shunt capacitor, and the midpoint voltage between two switches,
Fig. 2. Nominal waveform of Class-DE-E dc–dc converter. (a) Waveform of inverter part. (b) Waveform of rectifier part.
namely, becomes or zero at the end of the dead time, allowing Class-E switching conditions. As shown in Fig. 2(a), the maximum voltages across the switches are equals to the input voltage . This is an advantage of Class-D type of inverter compared with Class-E inverter. Class-DE inverter has the both advantages of Class-D inverter and Class-E inverter, namely, high power conversion efficiency under high-frequency operation because of Class-E switching and low switch-voltage stress. 2) Class-E Rectifier: Class-E rectifier consists of an input current source that is same as the output current of the inverter, a diode with a shunt capacitor , a low-pass filter , and a load resistance . Fig. 2(b) shows waveforms of Class-E
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2)
3) Fig. 3.
Driving circuit with the phase control.
rectifier. In the rectifier, the difference of the input current and the output current flows into the diode or its shunt capacalternatively. While the diode is off, the current that itor is expressed as flows through the capacitor . When the diode voltage decreases to the threshold voltage, it turns on. In the off period, the power dissipation caused in is negligible. the diode is nearly zero since the diode current While the diode is on, the current flows through the diode. In this period, the power dissipation in the diode is kept small since the diode voltage is equal to the threshold voltage. At the diode turn-off transition, the capacitor current is zero. Therefore, the derivative of the diode voltage is also zero as shown in Fig. 2(b). This is also characteristic of Class-E circuits. That reduces the switching losses and noises, and enables the rectifier to operate with high power conversion efficiency at a high operating frequency.
4) 5)
the switches. Therefore, it is assumed that a value of on resistance of one MOSFET is equivalent to those of the other MOSFETs. All inductors and capacitors in the circuit have the equivand alent series resistances (ESRs). We define as ESRs of capacitor and inductor , respectively. The sum of ESRs of a resonant capacitor and a resonant inductor in inverter is expressed as . Shunt capacitance of each switching device, namely , , , and , includes switch device capacitance. The ESRs of the switch device capacitance are neglected. All passive elements including switch on resistors and ESRs operate as linear elements. The switch on duty ratio of inverter 1 is the same as that of . It is inevitable inverter 2. In this paper, it is stated as that two switch in same inverter are on state simultaneously . This causes short circuit in the inverter for and breaks the converter. Moreover, the dead time must be needed in order to achieve Class-E switching. Therefore, is determined as . the range of
B. Circuit Equations Following the above assumptions, the equivalent circuit of the proposed converter is illustrated as shown in Fig. 4. The circuit equations are given as
B. Phase-Controlled Class-DE-E DC–DC Converter Fig. 1(b) depicts a phase-controlled Class-DE-E dc–dc converter. It includes two Class-DE inverters: inverter 1 and inverter 2. Two inverters are driven at same operating frequency, and have a controllable phase shift between their output currents and [8]. The output current of the inverter, namely the input current of the rectifier, can be controlled by varying phase shift between the driving signals of inverter 1 and 2 in the range of . As a result, the output power of the dc–dc converter can be regulated against load and line variations by varying . Here, we define that means the phase shift for a nominal operation. When the phase shift , the operation of each inverter is in nominal, that is, both inverters keep the Class-E switching conditions. Fig. 3 shows a topology of a driving circuit with phase control. The phase between two inverters are shifted by adjusting the variable resistor. In this study, the variable resistor is adjusted by hand.
(1) where subscript means the number of the inverter, is an represents an angular operating angular frequency, and displacement. Moreover, expresses the voltage considering , namely ESRs of capacitor
III. NUMERICAL CALCULATIONS (2)
A. Assumptions In order to derive the waveforms of the converter, we give the following assumptions. 1) The switching devices, namely diodes and MOSFETs including anti-parallel diode have zero switching times, large off resistance enough to neglect the current through the switches, and nonzero on resistance. On resistances of the MOSFETs, the anti-parallel diodes, and the diode of the rectifier are stated as , , and , respectively. In this paper, we use a same kind of the MOSFETs for
. We consider the circuit operations in the interval , and mean the resistance of the switches In (1), , and the diode , respectively. From Assumption 1, the is illustrated as shown in Fig. 4(b), resistance of the switch and given as; if the switch is on. if both the switch and are off. anti-parallel diode of if anti-parallel diode of is on.
(3)
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diode on MOSFET. On the other hand, from Assumption 1. for for
is given as follows
(8)
where is a threshold voltage of the diode . . By applying In this paper, we substitute 1 M for Runge–Kutta method to solve the circuit equations (1)–(8), the waveforms of the converter are given numerically. C. Output Voltage If the waveforms from (1)–(8) in the steady state, the voltage is a direct voltage which is equivalent to the output voltage because of low pass filter . However, has a little ac component in the strict sense. In this paper, the output voltage is calculated from (9)
Fig. 4. Equivalent circuit. (a) Circuit topology of equivalent circuit. (b) Expression of the resistance R .
The waveforms in the steady state are given quickly by using shooting method as shown in Appendix A. D. Power Losses and Efficiency
When we define that the switch turns on at , the resistances of the switches are expressed as (4)–(7) at the bottom is a threshold voltage of the anti-parallel of the page, where
for for for for for for for for for
and and
(4)
or or
and and and and
(6) and and
or or
for for for for for for
(5)
or or
for for for for for for
The numerical waveforms express power losses on parasitic resistors since the circuit equations (1)–(8) include switch on resistance and ESRs of the inductors and capacitors. In the numer-
and and
and and
or or
(7)
and and
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ical calculations, the continuities of the voltages and the currents are ensured though the switching devices have zero switching times from assumption 1. Therefore, the capacitor dissipations caused by non-ZVS also are included in numerical calculations. As a result, the power conversion efficiency can be calculated from the input and output power, that is
order) and quite different from that of capacifrequency ( order). By using the parameters, however, the scale tance ( are close to those about caof parameters about frequency and . pacitance By using the parameters and assumptions, the circuit equations (1) are rewritten to the normalized circuit equations as follows:
(10) where,
is the input current that is calculated from
(11)
In this paper, we use a trapezoidal rule for the integrations in (9) and (11). IV. EXPERIMENTAL RESULTS A. Design Procedure for Class-DE-E DC–DC Converter For the design of Class-DE-E dc–dc converter, we assume that all ESRs of the capacitors are zero. The values of capacitance are unknown before the design though those of inductance are known. In our experiments, the scales of ESRs of the existing capacitors are quite smaller than those of inductors. Moreover, several capacitors are connected in parallel in the experimental circuit, so the affects of ESRs of the capacitors are very small. This assumption is effective to simplify the circuit equations (1). This is because that the nested constructions of the differentials are eliminated and the dimensions of the circuit equations are degenerated. Therefore, we consider it is allowed to neglect the ESRs of the capacitors for the design. In order to express the circuit equations, the parameters of the circuit are defined as follows. 1) ( , 2): The resonant angular frequency at inverter . 2) ( , 2): The ratio of the resonant frequency at inverter to the operating (switching) frequency. 3) ( , 2): The ratio of the capacitance of a resonant capacitor to a shunt capacitor of the switch . at inverter , where, 4) : The ratio of the capacitance of a resonant capacitor at inverter 1 to a shunt capacitor of the diode . 5) ( , 2): The parameters for the resonant circuit at inverter . This definition is similar to that of the loaded quality factor of the inverter [12]. The definition of the above parameters is one of the techniques for the derivation of design values. From these parameters, the scales of the parameters are normalized since units of each element are canceled. For example, the scale of operating
(12) These equations are used for the derivations of design values. Only using the circuit equations (3)–(12), we can design phase-controlled Class-DE-E dc–dc converter for any design specifications. The design procedure is similar to [4], [13], and [16] as shown in Appendix B. The benefits of the proposed design procedure are as follows. • When the circuit equations are derived, the design values of the proposed converter are given numerically. This means that the design procedure deals with the various conditions, e.g., any output of the inverter, any switch on duty ratio, , nonzero on resistance of active deany phase shift vices, and so on. • Compared with the design procedure in [1]–[3], the design values are accurate in spite of generalized circuit topology. • The steps of the design except derivation of the circuit equations are carried out with aid of computer. Compared with the design procedure in [1], we can design generalized phase-controlled Class-DE-E dc–dc converter accurately with a few works. • The design values are found quickly since Newtons method is the fast algorithm in order to solve the algebraic equations. B. Design Example At first, the following specifications are given; the phase shift , the operating frequency for nominal state MHz, the input voltage V, the output voltage V, the output resistance , the switch on duty ratio , and . The filter elements are H and . Moreover, , and V are given since IRF530 MOSFET is used as switches. We use the Shottky barrier diode and V are given. 11DQ04. Therefore,
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TABLE I CIRCUIT PARAMETERS FOR NOMINAL OPERATION
Fig. 5. Nominal waveforms of phase-controlled Class-DE-E dc–dc converter for = 0 , V = 20 V, V = 5:0 V and R = 10 . (a) Numerical predictions. (b) Observed waveforms in the experiments. Vertical of V , v , v and v : 20 V/div, D , D , and v : 5 V/div, i and i : 1 A/div. Horizontal: 400 ns/div.
From above specifications, the elemental values of the inducH. Therefore, we make tors are determined as inductors , , and before the calculations for the design of the converter. From these inductors, the ESRs are measured as , , and . These values are used for the calculations of the design. Following the design procedure as shown in Appendix B, we derive the design parameters as , , . Therefore, the elemental values are acquired as and nF, nF, nF, and nF ( , 2). C. Discussion of Results Fig. 5 shows the numerical and experimental waveforms for . It is confirmed that both of inverters are satisfied with Class-E switching conditions. This state is defined as a nominal state. We also define , , and as the input voltage, the output voltage and the output resistance for the nominal state, that is, V, V and . The elemental values of the experimental circuit are shown in Table I. In this case, measured efficiency is 84.2% with 2.5 W output power at an operating frequency of 0.99 MHz. Fig. 6 depicts the example waveforms of Class-DE-E . In this state, we dc–dc converter with phase control for can find that the amplitude of the output current at inverter 1 is larger than that at inverter 2. Moreover, inverter 2 cannot realize ZVS though inverter 1 achieves one. That is because the load resistance at the output of the resonant circuit for inverter 2 becomes larger than that of the nominal state. This phenomenon
is similar to the phase controlled Class-E inverter [19]. Fig. 7 . In this case, the two indepicts the waveforms for verters are synchronized at anti-phase and the input current of the rectifier is almost zero. Therefore, the output voltage is also almost zero. , inverters 1 and 2 always In the range of achieve ZVS and non-ZVS, respectively. The voltage at turn on , that is, V instant is maximum for V for . This means that the switching voltage is . reduced by decreasing and increasing phase shift from This is different from PWM control whose switching voltage is larger as pulsewidth is far from nominal state. Because of non-ZVS switching, the switching losses occur at turn on instant. However, it is much smaller than the Class-D type converter since the dead time of the proposed converter can be constant. The proposed converter achieves Class-E switching in the nominal state. Therefore, the slope of the switching voltage is small and high power conversion efficiency can be kept for a small phase shift. As a result, high power-conversion efficiency can be kept for a narrow range control. The non-ZVS problem is diminished when the nominal state is specified for like [20]. We consider that this is a future problem to clarify. From these experimental results, we can find that the output
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Fig. 6. Waveforms of phase-controlled Class-DE-E dc–dc converter for = 90 , V = 20 V and R = 10 . (a) Numerical predictions. The output voltage V is 2.5 V. (b) Observed waveforms in the experiments. The output voltage V is 1.9 V. Vertical of V , v and v : 20 V/div, D , D , and v : 5 V/div, i and i : 1 A/div, v : 10 V/div. Horizontal: 400 ns/div. Fig. 8. Output voltage V =V function of phase shift for V
Fig. 7. Waveforms of phase-controlled Class-DE-E dc–dc converter for = 180 , V = 20 V and R = 10 . (a) Numerical predictions. The output voltage V is 0.0 V. (b) Observed waveforms in the experiments. The output voltage V is 0.0 V. Vertical of V , v and v : 20 V/div, D and D : 5 V/div, i and i : 0.5 A/div, v and v : 1 V/div. Horizontal: 400 ns/div.
voltage is regulated from 100% to 0% by applying phase control to Class-DE-E dc–dc converter.
=V
and power conversion efficiency as a and R = R .
and the power Fig. 8 shows the output voltage conversion efficiency as a function of the phase shift for and . The output power is highest under the nominal operation, namely, for since the currents of two inverters are synchronized at in-phase. On the other hand, since two the lowest output power is generated for inverters are synchronized at anti-phase. The output voltage decreases in proportion to the increase of the phase shift for . In our experiments, the phase shift control can reduce the output voltage from 100% to 39%, keeping over 57% power conversion efficiency by varying from 0 to 95 . Fig. 9 shows the phase shift and the power-conversion effifor ciency as a function of the input voltage and . The output voltage is proportional to when no control is applied, that is the input voltage . Moreover, it is clarified that the output decreases in proportion to the increase of the phase voltage for from shift as Fig. 8. From these considerations, the phase shift for keeping is inverse proportional to the input output voltage as . In the numerical calcuvoltage lations, we confirm that the performance of follows this apis kept for proximate equations. The output voltage by changing from 0 to 174 . The experfor varying imental circuit maintains output voltage the input voltage from 100% to 223%, keeping over 69% power conversion efficiency by changing from 0 to 92 .
SEKIYA et al.: PHASE CONTROL FOR RESONANT DC–DC CONVERTER
Fig. 9. Phase shift and power conversion efficiency as a function of input voltage V =V for V V and R R .
=
=
Fig. 10 depicts the phase shift and the power conversion for efficiency as a function of the load resistance and . In the numerical calculations, the output voltage is kept for by changing from 0 to 133 . The phase shift converges at as the load resistance becomes large. This means the it need less than 133 phase shift for load variances. This control range is same as that of phase-controlled Class-DE inverter in [8]. The experimental circuit maintains output voltage for varying the load resistance from 100% to 200%, keeping over 63% power conversion efficiency by changing from 0 to 53 . From Figs. 5–10, we confirm a very good similarity between the numerical predictions and the experimental results. The calculated power conversion efficiency is accurate since the numerical waveforms include power losses at active device on resistance, those at ESRs, and switching losses in case of nonZVS. The analyses of power dissipations are needed to derive power conversion efficiency in [6], [7] and [19]. However, this method can derive it without analyses of power dissipations. Moreover, it is unnecessary to derive waveform equations since the design procedure never requires them. Therefore, we can omit many works for the analysis. Furthermore, if the circuit equations are derived, the other processes, namely, the design and the derivations of the output power and the power conversion efficiency, are carried out with aid of computer. By using shooting method like Appendix A, the characteristics curves in Figs. 5–10 are cal-
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Fig. 10. Phase shift and power conversion efficiency as a function of load for V V and V V . resistance R=R
=
=
culated quickly. From Figs. 5–10, we can indicate the validity of both the numerical calculations and the experimental results. V. CONCLUSION This paper has been presented the phase control scheme for Class-DE-E dc–dc converter and its performance. The proposed circuit is composed of phase-controlled Class-DE inverter and Class-E rectifier. The proposed circuit achieves the fixed frequency control without frequency harmonics lower than the switching frequency. Moreover, it is possible to achieve the continuous control in a wide range of the line and load variations. The output voltage decreases in proportion to the increase of the phase shift. The proposed converter keeps the advantages of Class-DE-E dc–dc converter, namely, high power conversion efficiency under high-frequency operation and low switch-voltage stress. Especially, high power conversion efficiency can be kept for narrow range control. We present numerical calculations for the design and the numerical analyses to clarify the characteristics of the proposed control. By carrying out circuit experiments, we show a quantitative similarity between the numerical predictions and the experimental results. In our experiments, the measured efficiency is over 84% with 2.5 W output power for 1.0-MHz operating frequency at the nominal operation. Moreover, the output voltage is regulated from 100% to 39%, keeping over 57% power conversion efficiency by using proposed control scheme.
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APPENDIX
. Since the design parameters are unknown, (12) can be written as
A. Derivation of Waveforms in Steady State When
we
(19)
define ,
(1) can be written as
and the transient conditions are given instead of (15) as (20)
(13) where We assume that (1) has a solution defined on with every initial condition . If the converter is in the steady state, the equation
. In the nominal operations, the switches of the inverter achieve Class-E switching conditions. Class-E switching conditions mean that the switches are satisfied with both ZVS, namely
(14) (21) is given. If the design values are derived, the equation
and zero slope of voltage switching, namely (15)
and . is given as the transient conditions between by solving (15) by using Newtons method. We can derive The computation of Newtons method is expressed as (16) where is an iteration number. Moreover, , which is given by matrix of
is Jacobian
(22) The output voltage is given as follows:
.. .
is given in (9). Therefore, the equation
(23)
(17) of For computations of (16), we can derive by applying Runge–Kutta method to (1). And the elements of can be determined by solving the firstJacobian matrix order variational equations with
(18)
of is derived by solving (18) from 0 to by using Runge–Kutta method. The computations of (16) are iter, where , i.e., in this ated for paper. From above computations, the unknown initial values are found quickly, and the waveforms in the steady states are also found simultaneously.
From above considerations, we recognize the design of phase-controlled Class-DE-E dc–dc converter boils down to the derivations of the solution of the algebraic equations (20)–(23). We have 14 algebraic equations though there are 27 unknown values, namely, , , and . Therefore, we give the values of the 14 parameters as unknown parameters for the design. In this , , and are unknown paper, we set the parameters , , 2). The other parameters parameters for the design ( are given as the design specifications. Especially, the values and are determined in order to neglect ac ripple in of the output voltage. By using variational equations for circuit parameters, namely with
B. Design Procedure The design values are derived from transient conditions, switching conditions, and specificated output voltage. In this paper, the normalized circuit equations (12) are applied in stead of (1). Therefore, we redefine
(24) and Newton method like Appendix A, we can derive the unknown parameters. This means the design values which are , , , , and are determined.
SEKIYA et al.: PHASE CONTROL FOR RESONANT DC–DC CONVERTER
The basic source programs appear in [13]. The design values can be derived by rewriting the circuit equations and variational equations in the source programs of [13]. We welcome to any questions about the source programs. The source programs about this paper are open if there is a requirement to us. The contact e-mail address is:
[email protected]. REFERENCES [1] H. Koizumi, M. Fujii, T. Suetsugu, and S. Mori, “New resonant dc–dc converter with Class-DE inverter and Class-E rectifier,,” J. Circuits Syst. Comp., vol. 5, no. 4, pp. 559–574, Apr. 1995. [2] H. Koizumi, H. Sekiya, M. Matsuo, S. Mori, and I. Sasase, “Resonant dc–dc converter with Class-DE inverter and Class-E rectifier using thinned-out method (deleting some of pulses to the rectifier),” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no. 1, pp. 123–126, Jan. 2001. [3] K. Shinoda, M. Matsuo, T. Suetsugu, and S. Mori, “PWM control scheme of resonant dc–dc converter with Class-DE inverter and Class-E rectifier,” in Proc. Telecommunications Energy Conf. (INTELEC’96), Oct. 1996, pp. 829–832. [4] H. Sekiya, J. Lu, and T. Yahagi, “Design and analysis of Class-DE-E dc–dc converters with any output of the inverter and any duty ratio,” in Proc. Int. Symp. Nonlinear Theory and its Applications (NOLTA’02), Oct. 2002, pp. 207–210. [5] H. Koizumi, T. Suetsugu, M. Fujii, K. Shinoda, S. Mori, and K. Ikeda, “Class-DE high-efficiency tuned power amplifier,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 43, no. 1, pp. 51–60, Jan. 1996. [6] H. Sekiya, I. Sasase, and S. Mori, “Exact analysis of Class-DE amplifier with FM and PWM control,” IEICE Trans. Commun., vol. E86-B, no. 10, Oct. 2003. [7] H. Sekiya, H. Koizumi, S. Mori, I. Sasase, J. Lu, and T. Yahagi, “FM/PWM control scheme in Class-DE inverter,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 51, no. 7, pp. 1250–1260, Jul. 2004. [8] H. Koizumi, T. Suetsugu, M. Fujii, K. Shinoda, and S. Mori, “Phase-controlled Class-DE inverter,” in Proc. 17th Int. Telecommunications Energy Conf. (INTELEC ’95), Nov. 1995, pp. 86–92. [9] M. K. Kazimierczuk and W. Szaraniec, “Class-D zero-voltage switching inverter with only one shunt capacitor,” Proc. IEE B, Electric Power Applications, vol. 139, no. 5, pp. 449–456, Sep. 1992. [10] M. K. Kazimierczuk, “Analysis of Class-E zero-voltage-switching rectifier,” IEEE Trans. Circuits Syst., vol. 37, no. 6, pp. 747–755, Jun. 1990. [11] N. O. Sokal and A. D. Sokal, “Class-E—a new Class-of high-efficiency tuned single-endedswitching power amplifiers,” IEEE J. Solid-State Circuits, vol. 10, no. 3, pp. 168–176, Jun. 1975. [12] F. H. Raab, “Idealized operation of the Class-E tuned power amplifier,” IEEE Trans. Circuits Syst., vol. 24, no. 12, pp. 725–735, Dec. 1977. [13] H. Sekiya, I. Sasase, and S. Mori, “Computation of design values for Class-E amplifiers without using waveform equations,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 49, no. 7, pp. 966–978, Jul. 2002. [14] N. O. Sokal, “Class-E RF power amplifiers,” QEX, no. 204, pp. 9–20, Jan./Feb. 2001. [15] N. Wang, V. Yousefzadeh, D. Maksimovic, S. Pajic, and Z. B. Popovic, “60% efficient 10-GHz power amplifier with dynamic drain bias control,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 3, pp. 1077–1081, Mar. 2004. [16] H. Sekiya, J. Lu, and T. Yahagi, “Design of generalized Class-E DC/DC converter,” Int. J. Circuit Theory Appl., vol. 31, no. 3, pp. 229–248, May/Jun. 2003. [17] A. K. S. Bhat, “Fixed-frequency PWM series-parallel resonant converter,” IEEE Trans. Ind. Appl., vol. 28, no. 5, Sep./Oct. 1992. [18] M. K. Kazimierczuk, “Synthesis of phase-modulated dc/ac inverters and dc–dc converters,” Proc. IEE B, Electric Power Applications, vol. 139, no. 4, pp. 387–394, Jul. 1992. [19] K. Shinoda, T. Suetsugu, M. Matsuo, and S. Mori, “Analysis of phasecontrolled resonant dc-ac inverters with Class-E amplifier and frequency multipliers,” IEEE Trans. Ind. Electron., vol. 45, no. 3, pp. 412–420, Jun. 1998. [20] D. Kawamoto, H. Sekiya, H. Koizumi, I. Sasase, and S. Mori, “Design of phase-controlled Class-E inverter with asymmetric circuit configuration,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 51, no. 10, pp. 523–528, Oct. 2004.
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Hiroo Sekiya (S’97–M’01) was born in Tokyo, Japan, on July 5, 1973. He received the B.E., M.E., and Ph. D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 1996, 1998, and 2001 respectively. Since April 2001, he has been with Graduate School of Science and Technology, Chiba University, Chiba, Japan where he is a Research Associate. His research interests include high-frequency high-efficiency tuned power amplifiers, frequency multipliers, resonant dc–dc power converter, dc/ac inverters, bifurcation and chaotic phenomena in nonlinear electrical circuits, and digital signal processing for speech, image and communication. Dr. Sekiya is a member of the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan, Society Information Theory and its Application (SITA), Japan, and Research Institute of Signal Processing (RISP), Japan.
Shuichi Nemoto received the B.E. in information and image engineering from Chiba University, Chiba, Japan, in 2003. Since April 2003, he has been with Internet Initiative Japan Inc., Tokyo, Japan. While an undergraduate, his research interests were resonant dc-dc converter with Class-E switching.
Jianming Lu (M’93) received the M.S. and Ph.D. degrees from Chiba University, Japan, in 1990 and 1993, respectively. In 1993, he joined Chiba University, Chiba, Japan, as an Associate in the Department of Information and Computer Sciences. Since 1994 he has been with the Graduate School of Science and Technology, Chiba University, and in 1998 he was promoted to Associate Professor in the Graduate School of Science and Technology, Chiba University. His current research interests are in the theory and applications of digital signal processing and control theory. Dr. Lu is a member of IEICE (Japan), SICE (Japan), IEEJ (Japan), and JSME (Japan).
Takashi Yahagi (M’78) received the B.S., M.S., and Ph.D. degrees all in electronics engineering from the Tokyo Institute of Technology, Tokyo, Japan, in 1966, 1968 and 1971, respectively. In 1971, he joined Chiba University, Chiba, Japan, as a Lecturer in the Department of Electronics Engineering. From 1974 to 1984 he was an Associate Professor, and in 1984 he was promoted to Professor in the Department of Electrical Engineering. From 1989 to 1998, he was with the Department of Information and Computer Sciences. Since 1998 he has been with the Graduate School of Science and Technology, Chiba University. His current research interests are in the theory and applications of digital signal processing and other related areas. He is the editor of the Library of Digital Signal Processing (Tokyo, Japan: Corona Pub.). Since 1999, he has been Chairman of the IEEE Japan Chapter of Signal Processing Society. Dr. Yahagi is a member of IEICE (Japan), The New York Academy of Sciences, and the ISCIE (Japan).