Power Processing Circuits for Piezoelectric Vibration-Based Energy ...
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Power Processing Circuits for Piezoelectric Vibration-Based Energy Harvesters Reinhilde D’hulst, Tom Sterken, Member, IEEE, Robert Puers, Senior Member, IEEE, Geert Deconinck, Senior Member, IEEE, and Johan Driesen, Member, IEEE
Abstract—The behavior of a piezoelectric vibration-driven energy harvester with different power processing circuits is evaluated. Two load types are considered: a resistive load and an ac–dc rectifier load. An optimal resistive and optimal dc-voltage load for the harvester is analytically calculated. The difference between the optimal output power flow from the harvester to both load circuits depends on the coupling coefficient of the harvester. Two power processing circuits are designed and built, the first emulating a resistive input impedance and the second with a constant input voltage. It is shown that, in order to design an optimal harvesting system, the combination of both the ability of the circuit to harvest the optimal harvester power and the processing circuit efficiency needs to be considered and optimized. Simulations and experimental validation using a custom-made piezoelectric harvester show that the efficiency of the overall system is 64% with a buck converter as a power processing circuit, whereas an efficiency of only 40% is reached using a resistor-emulating approach. Index Terms—Energy efficiency, energy harvester, piezoelectric devices, power conditioning.
I. I NTRODUCTION
T
HE current advances in performance and functionality of micro- and nanosystems have stimulated the development of intelligent networks of autonomous systems. The demand for a small, mobile, and reliable energy supply for each autonomous network node has led to the development of a new type of generators, as the use of conventional electrochemical batteries is not always an option because of the need for replacement and the volume dependence on the amount of stored energy. Motion energy or vibrations are an attractive source for powering miniature energy-harvesting generators [1]. Vibration energy can be converted into electrical energy through piezoelectric [2], electromagnetic [3], and electrostatic [4] devices. This paper focuses on piezoelectric devices. The output power of such devices, made using micromachining techniques, is limited, ranging from milliwatts down to only a few microwatts.
Manuscript received May 8, 2009; revised July 29, 2009; accepted November 8, 2009. Date of publication March 1, 2010; date of current version November 10, 2010. R. D’hulst was with the Department of Electrical Engineering, Katholieke Universiteit Leuven, 3000 Leuven, Belgium. She is now with VITO. T. Sterken was with the Interuniversitary Center for Microelectronics, 3001 Leuven, Belgium. He is now with the University of Ghent, 9000 Ghent, Belgium. R. Puers, G. Deconinck, and J. Driesen are with the Department of Electrical Engineering, Katholieke Universiteit Leuven, 3000 Leuven, Belgium (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2010.2044126
The output voltage of an energy harvester, generally, is not directly compatible with what is needed to power the load electronics; moreover, the power transfer from an energy harvester, generally, can be maximized by optimizing the load impedance connected to the harvester. Thus, a power processing circuit needs to be connected between harvester and load. To date in literature, the work on power processing circuits for vibrationbased energy harvesters can be roughly classified into two different approaches. In a first approach, the efficiency of the power processing circuit itself is the major point of attention, including the design of efficient control circuitry for the interface circuit (see, among others, [5]–[7]). In a second approach, maximizing the output power transfer from the energy harvester is the main focus (see, among others, [8]–[10]). In this paper, it will be shown that, in order to design an optimal harvesting system, the combination of both the efficiency and the ability of the processing circuit to harvest the maximum available output power needs to be optimal. This optimal combination depends on the harvester design. Two different load types are considered in this paper: a resistive load and an ac–dc rectifier load. In literature, much work has been done concerning the optimal power flow of the harvester in case the load is a linear resistor (see, among others, [11]). Since the vibration-based harvester provides a varying ac power and because electronic loads typically need a stable dc power supply, it is useful to analyze the harvester behavior when connected to an ac–dc rectifier. Other load types, as described in [6], [12], and [13], are not considered in this paper. The remainder of this paper is organized as follows. Section II discusses the modeling of piezoelectric energy harvesters. Section III describes the behavior of the model with the two different load types. In Section IV, the design and, in particular, the efficiency of the power processing circuits are discussed. In Section V, all findings are illustrated by simulations and measurements on a custom-made piezoelectric harvester. II. H ARVESTER M ODEL Energy harvesters of the inertial type are considered, i.e., the motion of the vibration source is coupled to the generator by means of the inertia of a seismic mass. This mass m is modeled as being suspended by a spring with spring constant k, while its motion is damped by a parasitic damping d due to friction and air. The mass is also damped by the generator, the piezoelectric transducer, exerting a force Fg . The displacement of the mass
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D’HULST et al.: POWER PROCESSING CIRCUITS FOR PIEZOELECTRIC VIBRATION-BASED ENERGY HARVESTERS
Fig. 1.
Electrical circuit equivalent of vibration-based harvester model.
Fig. 2.
Electronic equivalent of a velocity-damped inertial energy harvester.
is z(t), and the displacement of the package is y(t). I and U are the outgoing current and voltage, respectively. This system is governed by the following differential equation: m¨ y = m¨ z + dz˙ + kz + Fg .
(1)
Different configurations and implementations of the piezoelectric generator lead to the same general electromechanical model of a piezo tranducer [14]–[16] Fg = Kz + ΓU (2) I = Γz˙ − C0 U˙ . Parameter Γ is a measure for the electromechanical coupling of the piezo element, and C0 is the clamped capacitance of the piezo element. K is a measure for the stiffness of the piezo element. Fig. 1 shows an electrical circuit equivalent of the harvester model, including the piezoelectric element. In this electrical circuit, the voltages represent forces, and charges represent displacements. The stiffness of the piezo element K is neglected in Fig. 1 and is assumed to be incorporated into the mechanical spring constant k.
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Fig. 3. Optimal output power of an energy harvester with resistive load, normalized to Plim , versus operating frequency and squared coupling coefficient (ζ = 0.016).
B. Resistive Load The harvested power dissipated in a resistive load is analytically calculated using the equivalent circuit in Fig. 1. For every operating frequency ω, an optimal load resistance Ropt exists. The expression for the optimal load resistance written in terms of the natural resonance frequency ωn = k/m, the normalized parasitic damping factor ζ = d/2mωn , the normalized frequency Ω = ω/ωn , and usingthe definition of the electromechanical coupling factor κ = Γ2 /(kC0 + Γ2 ) gives [16], [17] (1 − Ω2 )2 + 4ζ 2 Ω2 1 Ropt = . (4) ωC0 1 2 2 + 4ζ 2 Ω2 1−κ2 − Ω The corresponding output power dissipated in the optimal load resistance is given by the following equation, with Y0 being the amplitude of the input vibration: 2
Pres =
III. O PTIMAL P OWER O UTPUT
κ2 1−κ2
A. Power Output Limit The output power of both load cases considered, resistive load and ac–dc rectifier load, is compared to the theoretical absolute maximum output power of an inertial energy harvester, i.e., the output power of a harvester with the damping force of the generator proportional to the velocity of the seismic mass. An electronic equivalent of this theoretical harvester is shown in Fig. 2. The output power dissipated in the load dampingRload reaches a maximum at the resonance frequency ωn = k/m if the load resistor has an impedance that is identical to the parasitic damping d. The maximal output power is given by the following equation, with a being the acceleration imposed on the system: Plim
a2 m2 . = 8d
(3)
Ω κ mω 3 Y02 8ζ 1−κ2 .
2 1 2 −Ω 2 2 2 ) + 2ζΩ + (1−Ω 2ζΩ + 1−κ2ζΩ 2ζΩ
(5) The optimal harvested power depends on the electromechanical coupling factor κ. Fig. 3 shows a plot of the optimal harvester output power, normalized to Plim , versus the normalized operating frequency Ω and the squared coupling coefficient κ2 with the damping factor ζ arbitrarily set to 0.016. At both open- and short-circuit resonance frequencies, the output power tends to Plim for larger coupling factors. C. AC–DC Rectifier Load The output power of an energy harvester connected to an ac–dc rectifier, with a fixed voltage Ucc at the dc side, is analytically calculated as well. The relation between the mass
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Fig. 5. Maximal harvester power for both load cases versus squared coupling factor (ζ = 0.016). Fig. 4. Harvester output power, normalized to Plim , transferred to the optimal dc load via an ac–dc rectifier versus operating frequency and squared coupling factor (ζ = 0.016).
displacement amplitude zM and the dc voltage Ucc is given by (6), with a being the (constant) acceleration of the mass and ϕ being the phase difference between the applied force to the mass (i.e., the displacement of the package) and the displacement of the mass [16], [18]. The phase difference ϕ is not negligible if the electromechanical coupling of the device is not too weak. −ma cos(φ) = −mzM ω 2 + kzM + Ucc Γ (6) 2 −mazM sin(φ) π2 = −dzM ω π2 + 2Ucc (ΓzM − Ucc C0 ).
Fig. 6.
Schematic overview of the piezo bimorph harvesting structure. TABLE I M EASURED M ODEL PARAMETERS OF B IMORPH H ARVESTING D EVICE AT AN I NPUT ACCELERATION OF 5 m/s2
The forward voltage loss over the needed rectifier is neglected in (6) in order to have a fair comparison with the resistive load case where no rectifier was taken into account either. The expression for the average output power, dissipated in the fixed-voltage sink Ucc is ω (7) Prect = 2Ucc (ΓzM − Ucc C0 ). π Prect varies with Ucc . Similar to the resistive load case, an optimal voltage Ucc can be found for every operating frequency [16], [18]. It is however not possible to calculate this optimum analytically. Fig. 4 shows the plot of a numerically determined optimal Prect , normalized to Plim , versus normalized frequency and squared coupling coefficient. For large coupling factors, the optimal power at both resonance frequencies also tends to Plim . There is no difference in maximal output power between both discussed load cases for a harvester device with large coupling coefficient. However, for weakly coupled harvester devices, a resistive load tends to capture more power from the harvester device, as can be seen in Fig. 5. D. Harvester Example To illustrate the previous analysis, a commercially available piezo bimorph element is chosen as the energy-harvesting device. Fig. 6 shows a schematic diagram of the harvesting structure with its dimensions. The bimorph element is glued
Fig. 7. Predicted and measured output powers of bimorph device versus (a) resistive load and (b) ac–dc rectifier load.
upon a substrate to create a cantilever beam configuration, and a small mass of 1 g is attached to its tip. The harvester is excited by a shaker connected to a function generator via a power amplifier. The open-circuit resonance frequency of the device lies around 301 Hz. The model parameters of the device are measured according to the procedure given in [19] and are given in Table I. The parameters are measured while imposing an acceleration of 5 m/s2 to the harvesting device. Fig. 7 shows the output power of the bimorph device as predicted
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Fig. 8. Electrical circuit schematic of a buck–boost converter without an input filter capacitor.
by the aforementioned modeling, together with the measured output power, for both a varying resistive load and a varying output dc voltage after being rectified by a full-bridge diode rectifier. The output power measurements are accurate to 1 μW. The measured forward voltage drop over the rectifier diodes is 0.45 V. In order to have a clear point of comparison for both the modeled and the measured output power, the output power is plotted against the amplitude of the voltage on the piezo output capacitor C0 in Fig. 7(b). The output power is measured at the dc side of the rectifier and does not incorporate the losses in the rectifier and, hence, the difference between the modeled and measured powers. The squared mechanical coupling factor κ2 of the device is 0.03. As was mentioned before (see Fig. 5), the ac–dc resistive load performs better at lower coupling factors. IV. D ESIGN OF P OWER P ROCESSING C IRCUITS As already stated, a power management circuit is needed to transform the harvester output voltage to a dc voltage of an appropriate level, and moreover, the power management circuit should also provide the optimal load to the harvesting device. The choice can be made to provide the optimal resistive load to the harvester, but according to previous analysis, a fixed dc voltage may allow the harvester to perform nearly optimal as well, depending on the electromechanical coupling factor of the harvester. The question is now which power processing circuit will lead to the optimal harvesting system. For that reason, efficiency analysis is made for both circuits. An analytic loss model is set up for both power processing circuits in order to be able to find the most efficient circuit configuration in a quick yet accurate way. A. Processing Circuit Providing Resistive Load A buck–boost dc–dc converter without an input filter capacitor (see Fig. 8), operating in discontinuous conduction mode, has a “resistive” input impedance and may thus be well suited to operate as a power processing circuit for harvesting devices [10], [20]. Fig. 9 shows the input current of the converter. The input resistance of the circuit Rin is controlled through the duty cycle of the switching element, generally a MOSFET, according to (8), with L being the used inductance, fs being the switching frequency, and δ = Ton fs being the duty cycle of the switching element. Note that (8) only holds if fs fh , the
Fig. 9. Input current of a buck–boost converter without an input filter capacitor.
input vibration frequency of the harvester. The output voltage Uout of the converter is assumed to be held constant. Rin =
2Lfs . δ2
(8)
For the efficiency analysis, the losses in the switch (switching losses as well as conduction losses due to its series resistance Rsw ), the losses in diode D, in the full-bridge rectifier, and the losses in the inductor L due to its equivalent series resistance ResrL are taken into account. The harvester is modeled as a current source parallel to the output capacitor C0 to simplify the determination of the voltages and currents in the converter [21] (see Fig. 8). The current amplitude of the source Ih is defined by the optimal harvester output Pres power and the optimal resistive load Ropt Ih =
2Pres Ropt
2 1 + ω 2 C02 Ropt
Ropt
.
(9)
The current through the inductor is calculated for the two phases of the switching period (switch closed and switch open) by evaluating the differential equations describing the circuit. The losses in this circuit are as follows. 1) MOSFET loss: The MOSFET loss Pmos is the sum of the conduction loss Pon , the switching loss Psw , and the gatedrive loss Pdrv [22]. The conduction loss of the switch is calculated as the loss in Rsw , the on-resistance of the switch. As the converter operates in discontinuous conduction mode, the current is zero at the beginning of each switching period, so that the switching loss during on-switching of the switch is negligible. The gate-drive loss of the switch is given by [23], [24] Pdrv = Ugs Qg fs
(10)
where Ugs and Qg are the gate–source voltage at the ON state and the gate charge, respectively. 2) Diode loss: The diode loss Pdiode is given by (11), with UD being the diode forward voltage and iavg_out being the average output current of the converter. Reverse
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TABLE II PARAMETERS OF D EVICES U SED IN P OWER P ROCESSING C IRCUITS
Fig. 11. Electrical circuit schematic of a buck converter with an input filter capacitor.
B. Processing Circuit Providing Fixed Voltage
Fig. 10. Efficiency of a buck–boost converter with a resistive input impedance of 580 kΩ and an input power of 49.4 μW.
recovery of the diode is neglected in this analytic loss model Pdiode = UD iavg_out .
(11)
3) Inductor loss: The loss PL in the inductor is calculated as the loss in its equivalent series parasitic resistance ResrL . 4) Bridge rectifier loss: The power loss in the bridge rectifier Prect is given by the following equation, with iavg_in being the average input current of the converter: Prect = 2iavg_in UD .
(12)
The efficiency of the converter is then expressed as η=
PRopt . PRopt + Pmos + Pdiode + PL + Prect
(13)
The efficiency of a converter used as a power processing circuit for the previously mentioned bimorph harvester device is calculated for varying switching frequency and inductance. The optimal resistive load conditions of the bimorph harvesting device (see Table I) are taken as input for the efficiency calculations. The device parameters used are listed in Table II. An output voltage of 3 V is chosen. Fig. 10 shows a plot of the calculated efficiency versus switching frequency and inductance. The highest efficiency, i.e., 51%, is reached using a switching frequency of 3 kHz and an inductance of 150 μH. The duty cycle at this point is 0.125%. Switching frequencies beyond 3 kHz are not suitable anymore, as the switching frequency is not sufficiently large anymore compared to the vibration source frequency.
A fixed dc voltage can be provided through, e.g., a buck converter with a sufficiently large input filter capacitor (see Fig. 11). The input voltage of the converter is controlled through the duty cycle. Because of the very low power processed by the circuit, the converter is most likely to operate in discontinuous conduction mode. Analogous to the previous section, the harvester is modeled as a current source to simplify the determination of the voltages and currents in the converter (see Fig. 11). The input current of the converter Iin is defined by the optimal harvester output power Prect and the optimal fixed output voltage Uopt [see (14)]. In the analytic calculations, the forward voltage drop over the rectifier diodes UD was not taken into account. In the analytic loss model, however, these voltage drops are not neglected, and thus, the converter has to provide a voltage at its input equal to Uopt minus twice the diode voltage drop UD . Iin =
Prect . Uopt + 2UD
(14)
The current through the inductor is again calculated for the two phases in the switching period. By using the expressions for the inductor current, the input voltage of the converter can be calculated. The duty cycle δneeded to obtain the optimal Uopt is then found through iteration. The losses in this circuit are as follows. 1) MOSFET loss: The switch conduction loss Pon can be obtained from the rms current through the switch and the switch on-resistance Rsw . As only discontinuous conduction is considered, no switching loss occurs during on-switching of the switch. The gate-drive loss is given by (10). 2) Diode loss: The diode loss can be obtained using (11), with iavg_out being the average output current of the converter. 3) Inductor loss: The loss in the inductor due to its series resistance is calculated using the rms inductor current. 4) Bridge rectifier loss: The loss in the bridge rectifier is Prect = 2Iin UD .
(15)
5) Input filter loss: The loss in the input filter capacitor is calculated as the loss in the series and parallel parasitic resistors (ResrC and RparC , respectively). The efficiency of the converter is then calculated using (13). The efficiency of a buck converter is calculated for varying switching frequency and inductance, using the optimal dc-load
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TABLE III C OMPARISON OF PS PICE S IMULATION R ESULTS AND T HEORETICAL E FFICIENCY C ALCULATIONS
Fig. 12. Efficiency of a buck converter with an input voltage of 4.9 V and an input power of 39.8 μW.
conditions of the bimorph harvesting device as input (see Table I). An output voltage of 3 V is chosen. Fig. 12 shows a plot of the calculated efficiency versus switching frequency and inductance. The highest efficiency, i.e., 60.3%, is reached using a switching frequency of 3 kHz and an inductance of 150 μH. The duty cycle in the optimal point is 0.18%. The conclusion drawn from Figs. 10 and 12 is that the optimal efficiency of a buck converter with a fixed input voltage is considerably higher than the efficiency of a buckboost converter emulating a resistive input impedance. It must be noted that the theoretical optimal efficiencies are rather low because of the very low given power budget. C. Influence of Control Circuitry The analytically calculated efficiencies mentioned are the open-loop efficiencies. Adding adequate control circuitry to the power processing circuits might lead to an increased efficiency of the design. In the rectifier load case, the input voltage of the converter should always be regulated toward the optimal value. By using hysteretic (thermostatlike) control, this is a control strategy where the converter is switched on only when the voltage on the filter capacitor rises above a previously set limit, the overall efficiency of the circuit is dramatically increased, since the circuit dissipates only a portion of the time, as shown in [5]. Such type of control, switching on and off of the circuit, is not suitable for power processing circuits providing resistive load, as the input of these converters is not buffered. This indicates that the difference in efficiency between both types of converters can be increased even more by adding control circuitry. The analytic calculations show that the overall output power of the example piezoelectric harvesting system (i.e., the harvester with its power conditioning circuit) is comparable for both load cases, although the output power of the harvester itself is much higher when the load is resistive, compared to the rectifier load. By adding a control circuitry, the overall output power of the harvesting system using the buck converter as interface circuit will be higher compared to the output power of the system with a buck–boost converter providing the optimal resistive load.
V. S IMULATIONS AND M EASUREMENTS Both power management circuits have been implemented in PSpice and have been simulated together with the electronic circuit equivalent of the bimorph piezo energy harvester. The used MOSFET model is a 2N7002, and the diode model is a BAS16W. The energy harvester is driven at its short-circuit resonance frequency. The switching frequency and the inductance value of both power management circuits are taken from the optimal efficiency point in previous calculations. A comparison of the simulation results with the theoretical calculations is given in Table III. Circuit1 represents the buck–boost converter emulating a resistive load, Circuit2 is the buck converter providing a fixed input voltage to the harvester. First, the simulations show that both circuits are very well able to capture the available power out of the harvester. Second, the simulated losses in the circuits are consistent with the analytic calculated ones, except that the gate-drive losses of the MOSFET are slightly lower in simulations because the gate charge Qg is lower than given in the datasheet of the MOSFET due to the very low drain–source currents. The simulations also show that the modeling of the losses in the diode bridge rectifier is not so accurate. The simulation results also indicate that, although the output power of the harvester when connected to the resistive load is considerably higher than the output power of the harvester with rectifier load, the overall output power of both processing circuits is comparable. Both dc–dc converters have been built on a printed circuit board using commercially available discrete devices. The used MOSFET is a 2N7002, and the diode is a BAS16W. The inductors are ferrite drum core inductors in an SMD 1210-package. A PIC18F4550 microcontroller is used to generate the pulsewidth-modulated (PWM) gate-drive signals, and an HCPL3180 is the gate driver. The microcontroller and the gate-drive circuitry are powered from an external source, as the optimization toward low power consumption of the control components is beyond the scope of this paper. The minimal PWM frequency generated by the microcontroller is 3 kHz, with a minimal duty cycle of 0.2%. An inductor with an inductance value of 470 μH leads to a duty cycle that is larger than the minimal 0.2% for both circuits, and hence, this inductance value has been used in the practical realization. As can be seen in Fig. 10, the theoretical efficiency of the buck–boost converter providing the resistive load with an inductance value of
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TABLE IV M EASUREMENTS ON B OTH P OWER P ROCESSING C IRCUITS
470 μH is 51%. The efficiency of the buck converter with the same inductor is 60%, as shown in Fig. 12. The output voltage of both circuits is set to 3 V, and the piezo bimorph harvester is driven at its open circuit resonance frequency with an acceleration of 5 m/s2 . A summary of the main measurements on both circuits is given in Table IV. The output power of the harvester, connected to Circuit1, is measured to be about 48 μW. This value is consistent with the theoretical optimal output of the harvester as shown in Fig. 7. From this measurement, it can be concluded that the input resistance emulated by the buck–boost converter is correctly seen by the energy harvester. The efficiency of the converter is rather low, about 40%, without taking the gate-drive losses into account. Using Circuit2, the voltage at the output of the harvester, after rectification, is set to 4.8 V, the measured output voltage is about 39 μW, and this value is also quite consistent with the theoretical value as shown in Fig. 7. The efficiency of the converter is about 64%, without taking the power loss in the gate driver into account. The measured and calculated power losses are also shown in Table IV. The differences between the measured and the modeled power loss are about 15% for Circuit2 and 25% for Circuit1, without taking the gate-drive losses into account. The higher measurement losses are probably due to parasitic effects that have not been taken into account in the model, e.g., parasitic capacitances that become relatively important because of the high frequencies present. From the measurements, it can be concluded that, for this particular harvester configuration, the open-loop efficiency of the standard buck-converter processing circuit is considerably higher than the efficiency of the buck–boost converter, as was predicted by theoretical calculations and simulations. Moreover, the measurements show that the overall power output of the piezoelectric harvesting system with the standard buck converter as power processing circuit is higher, even though the harvester power output with the converter providing the optimal resistive load is higher. VI. C ONCLUSION In this paper, the behavior of a piezoelectric vibration-driven energy harvester has been assessed with two different power processing circuits. An optimal linear resistive load, as well as an optimal dc voltage load of the energy harvester, can be analytically calculated for every operating frequency. To determine which load leads to the optimal overall efficiency of a system consisting of an energy harvester connected to a power processing circuit, two power processing circuits are
designed: the first one emulating a resistive input impedance and the second one with a constant input voltage. A buck–boost dc–dc converter without input filter capacitor, operating in discontinuous conduction mode, is shown to have a resistive input impedance. A buck converter with input filter capacitor is used to evaluate the rectifier load case. An analytic loss model of both converters is set up to determine the optimal operating point of the converters. If the model parameters of a certain energy harvester are known, the output power of the energy harvester after power processing can be calculated using the analytic loss models of the converters. Generally, it can be concluded that, in order to design an optimal harvesting system, it is not sufficient to employ the power processing strategy that is able to harvest the maximal amount of energy out of the harvester. The efficiency of the power processing circuit is equally important. This has been illustrated by means of a piezo bimorph taken as harvester device. The harvester generates more power if connected to the optimal resistive load than if connected to the optimal dc load. However, the loss calculations show that the efficiency of the converter emulating a resistive input impedance is much lower (51%) than the efficiency of the buck converter (60%) at their optimal operating points. The efficiency of the latter processing circuit can be increased even more by adding control circuitry. Hence, for this example, it can be concluded that the efficiency of the overall system of a harvesting device with power processing circuit will be better if the processing circuit has a fixed dc voltage as input. This conclusion is validated through simulations and experimental measurements. An output power of 19 μW was measured after power processing with the resistor-emulation approach, whereas a 25-μW output power was measured with the fixed-voltage approach.
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processing,” IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 52, no. 4, pp. 584–595, Apr. 2005. E. Lefeuvre, D. Audigier, C. Richard, and D. Guyomar, “Buck-boost converter for sensorless power optimization of piezoelectric energy harvester,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 2018–2025, Sep. 2007. P. Mitcheson, T. Green, E. Yeatman, and A. Holmes, “Architectures for vibration-driven micropower generators,” J. Microelectromech. Syst., vol. 13, no. 3, pp. 429–440, Jun. 2004. Y. Hu, H. Xue, T. Hu, and H. Hu, “Nonlinear interface between the piezoelectric harvesting structure and the modulating circuit of an energy harvester with a real storage battery,” IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 55, no. 1, pp. 148–160, Jan. 2008. L. Garbuio, M. Lallart, D. Guyomar, C. Richard, and D. Audigier, “Mechanical energy harvester with ultralow threshold rectification based on SSHI nonlinear technique,” IEEE Trans. Ind. Electron., vol. 56, no. 4, pp. 1048–1056, Apr. 2009. A. Tabesh and L. Frechette, “An accurate analytical model for electromechanical energy conversion in a piezoelectric cantilever beam for energy harvesting,” in Proc. 7th Int. Workshop Micro Nanotechnol. Power Gener. Energy Convers. Appl. PowerMEMS, Freiburg, Germany, Nov. 2007, pp. 61–64. A. Badel, A. Benayad, E. Lefeuvre, L. Lebrun, C. Richard, and D. Guyomar, “Single crystals and nonlinear process for outstanding vibration-powered electrical generators,” IEEE Trans. Ultrason., Ferroelectr., Freq. Control, vol. 53, no. 4, pp. 673–684, Apr. 2006. R. D’hulst, T. Sterken, P. Fiorini, R. Puers, and J. Driesen, “Energy scavengers : Modeling and behavior with different load circuits,” in Proc. 33rd IEEE IECON, Taipei, Taiwan, Nov. 2007, pp. 2169–2174. N. duToit, B. Wardle, and S. Kim, “Design considerations for MEMSscale piezoelectric mechanical vibration energy harvesters,” Integr. Ferroelectr., vol. 71, no. 1, pp. 121–160, Jul. 2005. Y. C. Shu and I. C. Lien, “Analysis of power output for piezoelectric energy harvesting systems,” Smart Mater. Struct., vol. 15, no. 6, pp. 1499– 1512, Dec. 2006. M. Renaud, T. Sterken, A. Schmitz, P. Fiorini, C. Van Hoof, and R. Puers, “Piezoelectric harvesters and MEMS technology: Fabrication, modeling and measurements,” in Proc. 14th TRANSDUCERS, Lyon, France, Jun. 2007, pp. 891–894. R. D’hulst, P. Mitcheson, and J. Driesen, “CMOS buck-boost power processing circuitry for PowerMEMS harvesters,” in Proc. 6th Int. Workshop Micro Nanotechnol. Power Gener. Energy Convers. Appl. PowerMEMS, Berkeley, CA, Nov. 29–Dec. 1, 2006. G. K. Ottman, H. F. Hofmann, A. C. Bhatt, and G. A. Lesieutre, “Adaptive piezoelectric energy harvesting circuit for wireless remote power supply,” IEEE Trans. Power Electron., vol. 17, no. 5, pp. 669–676, Sep. 2002. R. Sodhi, S. Brown, Sr., and D. Kinzer, “Integrated design environment for DC/DC converter FET optimization,” in Proc. 11th ISPSD, Toronto, ON, Canada, May 1999, pp. 241–244. S. Musunuri and P. L. Chapman, “Optimization of CMOS transistors for low power DC-DC converters,” in Proc. IEEE 36th Power Electron. Spec. Conf., Recife, Brazil, Jun. 2005, pp. 2151–2157. Y. Katayama, M. Edo, T. Denta, T. Kawashima, and T. Ninomiya, “Optimum design method of CMOS IC for DC-DC converter that integrates power stage MOSFETs,” in Proc. IEEE 35th PESC, Jun. 2004, vol. 6, pp. 4486–4491.
Reinhilde D’hulst received the M.Sc. degree in electrical engineering and the Ph.D. degree from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 2004 and 2009, respectively. As a member of the Electrical Energy research group (ELECTA), Department of Electrical Engineering, K.U.Leuven, she worked on power processing circuits for energy harvesters. She is currently with VITO, the Flemisch Institute for Technological Research, where she conducts research on power electronics in a smart grid environment.
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Tom Sterken (M’02) received the Diploma degree in electrical engineering from the University of Ghent, Ghent, Belgium, in 2001 and the Ph.D. degree from the Katholieke Universiteit Leuven, Leuven, Belgium, in 2009. From 2002 to 2008, he was with the Interuniversitary Center for Microelectronics, Leuven, working on the design, modeling, and fabrication of miniature power generators based on MEMS technology. This research resulted in his Ph.D. degree. He is currently with the Centre for Microsystems Technology group, University of Ghent, where he is working on ultrathin chip packaging and stretchable electronics. Robert Puers (SM’95) was born in Antwerp, Belgium, in 1953. He received the B.S. degree in electrical engineering from University of Ghent, Ghent, Belgium, in 1974 and the M.S. and Ph.D. degrees from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1977 and 1986, respectively. In 1980, he joined ESAT, K.U.Leuven, as a Research Assistant, where he became the Director (NFWO) of the clean room facilities for silicon and hybrid circuit technology at the ESAT–MICAS laboratories in 1986. He was a pioneer in the European research efforts in silicon micromachined sensors, microelectromechanical systems (MEMS), and packaging techniques, for biomedical implantable systems as well as for industrial devices. He is currently a full Professor with K.U.Leuven, teaching courses in “microsystems and sensors” and “biomedical instrumentation and stimulation” and also a basic course in “lectronics, system control, and information technology.” He is the author or coauthor of more than 350 papers on biotelemetry, sensors, MEMS, and packaging in reviewed journals or international conferences. He is the Editor-in-Chief of the Journal of Micromechanics and Microengineering of the Institute of Physics (IOP). Dr. Puers is a Fellow of the IOP (U.K.) and a council member of the International Microelectronics and Packaging Society. He is the General Chairman of the Eurosensors conferences. Geert Deconinck (SM’01) received the M.Sc. degree in electrical engineering and the Ph.D. degree in engineering from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1991 and 1996, respectively. He was a Postdoctoral Fellow of the Fund for Scientific Research—Flanders from 1997 to 2003. He is currently a full Professor (hoogleraar) with K.U.Leuven. He is also a Staff Member of ESAT/ELECTA (Electrical Energy and Computing Architectures), K.U.Leuven, where he performs research on designing dependable system architectures for industrial automation and control, assessing their dependability attributes and characterizing infrastructure interdependences. Dr. Deconinck is a member of the IEEE SMC Technical Committee on Infrastructure Systems and Services, the Royal Flemish Engineering Society, and the Institute of Engineering and Technology. He is a senior member of the IEEE Reliability Society, IEEE Computer Society, and IEEE Power and Energy Society. He is the Chairman of the TI society BIRA on industrial automation. Johan Driesen (M’97) was born in Belgium in 1973. He received the M.Sc. degree and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1996 and 2000, respectively. His Ph.D. focused on the finite-element solution of coupled thermal–electromagnetic problems and related applications in electrical machines and drives, microsystems, and power quality issues. From 2000 to 2001, he was a Visiting Researcher with the Imperial College of Science, Technology and Medicine, London, U.K. In 2002, he was with the University of California, Berkeley. He is currently an Associate Professor with K.U.Leuven, where he teaches power electronics and drives. Currently, he conducts research on distributed energy resources, including renewable energy systems, power electronics, and its applications, for instance, in renewable energy and electric vehicles.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 12, DECEMBER 2010
Power Processing Circuits for Piezoelectric Vibration-Based Energy Harvesters Reinhilde D’hulst, Tom Sterken, Member, IEEE, Robert Puers, Senior Member, IEEE, Geert Deconinck, Senior Member, IEEE, and Johan Driesen, Member, IEEE
Abstract—The behavior of a piezoelectric vibration-driven energy harvester with different power processing circuits is evaluated. Two load types are considered: a resistive load and an ac–dc rectifier load. An optimal resistive and optimal dc-voltage load for the harvester is analytically calculated. The difference between the optimal output power flow from the harvester to both load circuits depends on the coupling coefficient of the harvester. Two power processing circuits are designed and built, the first emulating a resistive input impedance and the second with a constant input voltage. It is shown that, in order to design an optimal harvesting system, the combination of both the ability of the circuit to harvest the optimal harvester power and the processing circuit efficiency needs to be considered and optimized. Simulations and experimental validation using a custom-made piezoelectric harvester show that the efficiency of the overall system is 64% with a buck converter as a power processing circuit, whereas an efficiency of only 40% is reached using a resistor-emulating approach. Index Terms—Energy efficiency, energy harvester, piezoelectric devices, power conditioning.
I. I NTRODUCTION
T
HE current advances in performance and functionality of micro- and nanosystems have stimulated the development of intelligent networks of autonomous systems. The demand for a small, mobile, and reliable energy supply for each autonomous network node has led to the development of a new type of generators, as the use of conventional electrochemical batteries is not always an option because of the need for replacement and the volume dependence on the amount of stored energy. Motion energy or vibrations are an attractive source for powering miniature energy-harvesting generators [1]. Vibration energy can be converted into electrical energy through piezoelectric [2], electromagnetic [3], and electrostatic [4] devices. This paper focuses on piezoelectric devices. The output power of such devices, made using micromachining techniques, is limited, ranging from milliwatts down to only a few microwatts.
Manuscript received May 8, 2009; revised July 29, 2009; accepted November 8, 2009. Date of publication March 1, 2010; date of current version November 10, 2010. R. D’hulst was with the Department of Electrical Engineering, Katholieke Universiteit Leuven, 3000 Leuven, Belgium. She is now with VITO. T. Sterken was with the Interuniversitary Center for Microelectronics, 3001 Leuven, Belgium. He is now with the University of Ghent, 9000 Ghent, Belgium. R. Puers, G. Deconinck, and J. Driesen are with the Department of Electrical Engineering, Katholieke Universiteit Leuven, 3000 Leuven, Belgium (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2010.2044126
The output voltage of an energy harvester, generally, is not directly compatible with what is needed to power the load electronics; moreover, the power transfer from an energy harvester, generally, can be maximized by optimizing the load impedance connected to the harvester. Thus, a power processing circuit needs to be connected between harvester and load. To date in literature, the work on power processing circuits for vibrationbased energy harvesters can be roughly classified into two different approaches. In a first approach, the efficiency of the power processing circuit itself is the major point of attention, including the design of efficient control circuitry for the interface circuit (see, among others, [5]–[7]). In a second approach, maximizing the output power transfer from the energy harvester is the main focus (see, among others, [8]–[10]). In this paper, it will be shown that, in order to design an optimal harvesting system, the combination of both the efficiency and the ability of the processing circuit to harvest the maximum available output power needs to be optimal. This optimal combination depends on the harvester design. Two different load types are considered in this paper: a resistive load and an ac–dc rectifier load. In literature, much work has been done concerning the optimal power flow of the harvester in case the load is a linear resistor (see, among others, [11]). Since the vibration-based harvester provides a varying ac power and because electronic loads typically need a stable dc power supply, it is useful to analyze the harvester behavior when connected to an ac–dc rectifier. Other load types, as described in [6], [12], and [13], are not considered in this paper. The remainder of this paper is organized as follows. Section II discusses the modeling of piezoelectric energy harvesters. Section III describes the behavior of the model with the two different load types. In Section IV, the design and, in particular, the efficiency of the power processing circuits are discussed. In Section V, all findings are illustrated by simulations and measurements on a custom-made piezoelectric harvester. II. H ARVESTER M ODEL Energy harvesters of the inertial type are considered, i.e., the motion of the vibration source is coupled to the generator by means of the inertia of a seismic mass. This mass m is modeled as being suspended by a spring with spring constant k, while its motion is damped by a parasitic damping d due to friction and air. The mass is also damped by the generator, the piezoelectric transducer, exerting a force Fg . The displacement of the mass
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D’HULST et al.: POWER PROCESSING CIRCUITS FOR PIEZOELECTRIC VIBRATION-BASED ENERGY HARVESTERS
Fig. 1.
Electrical circuit equivalent of vibration-based harvester model.
Fig. 2.
Electronic equivalent of a velocity-damped inertial energy harvester.
is z(t), and the displacement of the package is y(t). I and U are the outgoing current and voltage, respectively. This system is governed by the following differential equation: m¨ y = m¨ z + dz˙ + kz + Fg .
(1)
Different configurations and implementations of the piezoelectric generator lead to the same general electromechanical model of a piezo tranducer [14]–[16] Fg = Kz + ΓU (2) I = Γz˙ − C0 U˙ . Parameter Γ is a measure for the electromechanical coupling of the piezo element, and C0 is the clamped capacitance of the piezo element. K is a measure for the stiffness of the piezo element. Fig. 1 shows an electrical circuit equivalent of the harvester model, including the piezoelectric element. In this electrical circuit, the voltages represent forces, and charges represent displacements. The stiffness of the piezo element K is neglected in Fig. 1 and is assumed to be incorporated into the mechanical spring constant k.
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Fig. 3. Optimal output power of an energy harvester with resistive load, normalized to Plim , versus operating frequency and squared coupling coefficient (ζ = 0.016).
B. Resistive Load The harvested power dissipated in a resistive load is analytically calculated using the equivalent circuit in Fig. 1. For every operating frequency ω, an optimal load resistance Ropt exists. The expression for the optimal load resistance written in terms of the natural resonance frequency ωn = k/m, the normalized parasitic damping factor ζ = d/2mωn , the normalized frequency Ω = ω/ωn , and usingthe definition of the electromechanical coupling factor κ = Γ2 /(kC0 + Γ2 ) gives [16], [17] (1 − Ω2 )2 + 4ζ 2 Ω2 1 Ropt = . (4) ωC0 1 2 2 + 4ζ 2 Ω2 1−κ2 − Ω The corresponding output power dissipated in the optimal load resistance is given by the following equation, with Y0 being the amplitude of the input vibration: 2
Pres =
III. O PTIMAL P OWER O UTPUT
κ2 1−κ2
A. Power Output Limit The output power of both load cases considered, resistive load and ac–dc rectifier load, is compared to the theoretical absolute maximum output power of an inertial energy harvester, i.e., the output power of a harvester with the damping force of the generator proportional to the velocity of the seismic mass. An electronic equivalent of this theoretical harvester is shown in Fig. 2. The output power dissipated in the load dampingRload reaches a maximum at the resonance frequency ωn = k/m if the load resistor has an impedance that is identical to the parasitic damping d. The maximal output power is given by the following equation, with a being the acceleration imposed on the system: Plim
a2 m2 . = 8d
(3)
Ω κ mω 3 Y02 8ζ 1−κ2 .
2 1 2 −Ω 2 2 2 ) + 2ζΩ + (1−Ω 2ζΩ + 1−κ2ζΩ 2ζΩ
(5) The optimal harvested power depends on the electromechanical coupling factor κ. Fig. 3 shows a plot of the optimal harvester output power, normalized to Plim , versus the normalized operating frequency Ω and the squared coupling coefficient κ2 with the damping factor ζ arbitrarily set to 0.016. At both open- and short-circuit resonance frequencies, the output power tends to Plim for larger coupling factors. C. AC–DC Rectifier Load The output power of an energy harvester connected to an ac–dc rectifier, with a fixed voltage Ucc at the dc side, is analytically calculated as well. The relation between the mass
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Fig. 5. Maximal harvester power for both load cases versus squared coupling factor (ζ = 0.016). Fig. 4. Harvester output power, normalized to Plim , transferred to the optimal dc load via an ac–dc rectifier versus operating frequency and squared coupling factor (ζ = 0.016).
displacement amplitude zM and the dc voltage Ucc is given by (6), with a being the (constant) acceleration of the mass and ϕ being the phase difference between the applied force to the mass (i.e., the displacement of the package) and the displacement of the mass [16], [18]. The phase difference ϕ is not negligible if the electromechanical coupling of the device is not too weak. −ma cos(φ) = −mzM ω 2 + kzM + Ucc Γ (6) 2 −mazM sin(φ) π2 = −dzM ω π2 + 2Ucc (ΓzM − Ucc C0 ).
Fig. 6.
Schematic overview of the piezo bimorph harvesting structure. TABLE I M EASURED M ODEL PARAMETERS OF B IMORPH H ARVESTING D EVICE AT AN I NPUT ACCELERATION OF 5 m/s2
The forward voltage loss over the needed rectifier is neglected in (6) in order to have a fair comparison with the resistive load case where no rectifier was taken into account either. The expression for the average output power, dissipated in the fixed-voltage sink Ucc is ω (7) Prect = 2Ucc (ΓzM − Ucc C0 ). π Prect varies with Ucc . Similar to the resistive load case, an optimal voltage Ucc can be found for every operating frequency [16], [18]. It is however not possible to calculate this optimum analytically. Fig. 4 shows the plot of a numerically determined optimal Prect , normalized to Plim , versus normalized frequency and squared coupling coefficient. For large coupling factors, the optimal power at both resonance frequencies also tends to Plim . There is no difference in maximal output power between both discussed load cases for a harvester device with large coupling coefficient. However, for weakly coupled harvester devices, a resistive load tends to capture more power from the harvester device, as can be seen in Fig. 5. D. Harvester Example To illustrate the previous analysis, a commercially available piezo bimorph element is chosen as the energy-harvesting device. Fig. 6 shows a schematic diagram of the harvesting structure with its dimensions. The bimorph element is glued
Fig. 7. Predicted and measured output powers of bimorph device versus (a) resistive load and (b) ac–dc rectifier load.
upon a substrate to create a cantilever beam configuration, and a small mass of 1 g is attached to its tip. The harvester is excited by a shaker connected to a function generator via a power amplifier. The open-circuit resonance frequency of the device lies around 301 Hz. The model parameters of the device are measured according to the procedure given in [19] and are given in Table I. The parameters are measured while imposing an acceleration of 5 m/s2 to the harvesting device. Fig. 7 shows the output power of the bimorph device as predicted
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Fig. 8. Electrical circuit schematic of a buck–boost converter without an input filter capacitor.
by the aforementioned modeling, together with the measured output power, for both a varying resistive load and a varying output dc voltage after being rectified by a full-bridge diode rectifier. The output power measurements are accurate to 1 μW. The measured forward voltage drop over the rectifier diodes is 0.45 V. In order to have a clear point of comparison for both the modeled and the measured output power, the output power is plotted against the amplitude of the voltage on the piezo output capacitor C0 in Fig. 7(b). The output power is measured at the dc side of the rectifier and does not incorporate the losses in the rectifier and, hence, the difference between the modeled and measured powers. The squared mechanical coupling factor κ2 of the device is 0.03. As was mentioned before (see Fig. 5), the ac–dc resistive load performs better at lower coupling factors. IV. D ESIGN OF P OWER P ROCESSING C IRCUITS As already stated, a power management circuit is needed to transform the harvester output voltage to a dc voltage of an appropriate level, and moreover, the power management circuit should also provide the optimal load to the harvesting device. The choice can be made to provide the optimal resistive load to the harvester, but according to previous analysis, a fixed dc voltage may allow the harvester to perform nearly optimal as well, depending on the electromechanical coupling factor of the harvester. The question is now which power processing circuit will lead to the optimal harvesting system. For that reason, efficiency analysis is made for both circuits. An analytic loss model is set up for both power processing circuits in order to be able to find the most efficient circuit configuration in a quick yet accurate way. A. Processing Circuit Providing Resistive Load A buck–boost dc–dc converter without an input filter capacitor (see Fig. 8), operating in discontinuous conduction mode, has a “resistive” input impedance and may thus be well suited to operate as a power processing circuit for harvesting devices [10], [20]. Fig. 9 shows the input current of the converter. The input resistance of the circuit Rin is controlled through the duty cycle of the switching element, generally a MOSFET, according to (8), with L being the used inductance, fs being the switching frequency, and δ = Ton fs being the duty cycle of the switching element. Note that (8) only holds if fs fh , the
Fig. 9. Input current of a buck–boost converter without an input filter capacitor.
input vibration frequency of the harvester. The output voltage Uout of the converter is assumed to be held constant. Rin =
2Lfs . δ2
(8)
For the efficiency analysis, the losses in the switch (switching losses as well as conduction losses due to its series resistance Rsw ), the losses in diode D, in the full-bridge rectifier, and the losses in the inductor L due to its equivalent series resistance ResrL are taken into account. The harvester is modeled as a current source parallel to the output capacitor C0 to simplify the determination of the voltages and currents in the converter [21] (see Fig. 8). The current amplitude of the source Ih is defined by the optimal harvester output Pres power and the optimal resistive load Ropt Ih =
2Pres Ropt
2 1 + ω 2 C02 Ropt
Ropt
.
(9)
The current through the inductor is calculated for the two phases of the switching period (switch closed and switch open) by evaluating the differential equations describing the circuit. The losses in this circuit are as follows. 1) MOSFET loss: The MOSFET loss Pmos is the sum of the conduction loss Pon , the switching loss Psw , and the gatedrive loss Pdrv [22]. The conduction loss of the switch is calculated as the loss in Rsw , the on-resistance of the switch. As the converter operates in discontinuous conduction mode, the current is zero at the beginning of each switching period, so that the switching loss during on-switching of the switch is negligible. The gate-drive loss of the switch is given by [23], [24] Pdrv = Ugs Qg fs
(10)
where Ugs and Qg are the gate–source voltage at the ON state and the gate charge, respectively. 2) Diode loss: The diode loss Pdiode is given by (11), with UD being the diode forward voltage and iavg_out being the average output current of the converter. Reverse
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TABLE II PARAMETERS OF D EVICES U SED IN P OWER P ROCESSING C IRCUITS
Fig. 11. Electrical circuit schematic of a buck converter with an input filter capacitor.
B. Processing Circuit Providing Fixed Voltage
Fig. 10. Efficiency of a buck–boost converter with a resistive input impedance of 580 kΩ and an input power of 49.4 μW.
recovery of the diode is neglected in this analytic loss model Pdiode = UD iavg_out .
(11)
3) Inductor loss: The loss PL in the inductor is calculated as the loss in its equivalent series parasitic resistance ResrL . 4) Bridge rectifier loss: The power loss in the bridge rectifier Prect is given by the following equation, with iavg_in being the average input current of the converter: Prect = 2iavg_in UD .
(12)
The efficiency of the converter is then expressed as η=
PRopt . PRopt + Pmos + Pdiode + PL + Prect
(13)
The efficiency of a converter used as a power processing circuit for the previously mentioned bimorph harvester device is calculated for varying switching frequency and inductance. The optimal resistive load conditions of the bimorph harvesting device (see Table I) are taken as input for the efficiency calculations. The device parameters used are listed in Table II. An output voltage of 3 V is chosen. Fig. 10 shows a plot of the calculated efficiency versus switching frequency and inductance. The highest efficiency, i.e., 51%, is reached using a switching frequency of 3 kHz and an inductance of 150 μH. The duty cycle at this point is 0.125%. Switching frequencies beyond 3 kHz are not suitable anymore, as the switching frequency is not sufficiently large anymore compared to the vibration source frequency.
A fixed dc voltage can be provided through, e.g., a buck converter with a sufficiently large input filter capacitor (see Fig. 11). The input voltage of the converter is controlled through the duty cycle. Because of the very low power processed by the circuit, the converter is most likely to operate in discontinuous conduction mode. Analogous to the previous section, the harvester is modeled as a current source to simplify the determination of the voltages and currents in the converter (see Fig. 11). The input current of the converter Iin is defined by the optimal harvester output power Prect and the optimal fixed output voltage Uopt [see (14)]. In the analytic calculations, the forward voltage drop over the rectifier diodes UD was not taken into account. In the analytic loss model, however, these voltage drops are not neglected, and thus, the converter has to provide a voltage at its input equal to Uopt minus twice the diode voltage drop UD . Iin =
Prect . Uopt + 2UD
(14)
The current through the inductor is again calculated for the two phases in the switching period. By using the expressions for the inductor current, the input voltage of the converter can be calculated. The duty cycle δneeded to obtain the optimal Uopt is then found through iteration. The losses in this circuit are as follows. 1) MOSFET loss: The switch conduction loss Pon can be obtained from the rms current through the switch and the switch on-resistance Rsw . As only discontinuous conduction is considered, no switching loss occurs during on-switching of the switch. The gate-drive loss is given by (10). 2) Diode loss: The diode loss can be obtained using (11), with iavg_out being the average output current of the converter. 3) Inductor loss: The loss in the inductor due to its series resistance is calculated using the rms inductor current. 4) Bridge rectifier loss: The loss in the bridge rectifier is Prect = 2Iin UD .
(15)
5) Input filter loss: The loss in the input filter capacitor is calculated as the loss in the series and parallel parasitic resistors (ResrC and RparC , respectively). The efficiency of the converter is then calculated using (13). The efficiency of a buck converter is calculated for varying switching frequency and inductance, using the optimal dc-load
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TABLE III C OMPARISON OF PS PICE S IMULATION R ESULTS AND T HEORETICAL E FFICIENCY C ALCULATIONS
Fig. 12. Efficiency of a buck converter with an input voltage of 4.9 V and an input power of 39.8 μW.
conditions of the bimorph harvesting device as input (see Table I). An output voltage of 3 V is chosen. Fig. 12 shows a plot of the calculated efficiency versus switching frequency and inductance. The highest efficiency, i.e., 60.3%, is reached using a switching frequency of 3 kHz and an inductance of 150 μH. The duty cycle in the optimal point is 0.18%. The conclusion drawn from Figs. 10 and 12 is that the optimal efficiency of a buck converter with a fixed input voltage is considerably higher than the efficiency of a buckboost converter emulating a resistive input impedance. It must be noted that the theoretical optimal efficiencies are rather low because of the very low given power budget. C. Influence of Control Circuitry The analytically calculated efficiencies mentioned are the open-loop efficiencies. Adding adequate control circuitry to the power processing circuits might lead to an increased efficiency of the design. In the rectifier load case, the input voltage of the converter should always be regulated toward the optimal value. By using hysteretic (thermostatlike) control, this is a control strategy where the converter is switched on only when the voltage on the filter capacitor rises above a previously set limit, the overall efficiency of the circuit is dramatically increased, since the circuit dissipates only a portion of the time, as shown in [5]. Such type of control, switching on and off of the circuit, is not suitable for power processing circuits providing resistive load, as the input of these converters is not buffered. This indicates that the difference in efficiency between both types of converters can be increased even more by adding control circuitry. The analytic calculations show that the overall output power of the example piezoelectric harvesting system (i.e., the harvester with its power conditioning circuit) is comparable for both load cases, although the output power of the harvester itself is much higher when the load is resistive, compared to the rectifier load. By adding a control circuitry, the overall output power of the harvesting system using the buck converter as interface circuit will be higher compared to the output power of the system with a buck–boost converter providing the optimal resistive load.
V. S IMULATIONS AND M EASUREMENTS Both power management circuits have been implemented in PSpice and have been simulated together with the electronic circuit equivalent of the bimorph piezo energy harvester. The used MOSFET model is a 2N7002, and the diode model is a BAS16W. The energy harvester is driven at its short-circuit resonance frequency. The switching frequency and the inductance value of both power management circuits are taken from the optimal efficiency point in previous calculations. A comparison of the simulation results with the theoretical calculations is given in Table III. Circuit1 represents the buck–boost converter emulating a resistive load, Circuit2 is the buck converter providing a fixed input voltage to the harvester. First, the simulations show that both circuits are very well able to capture the available power out of the harvester. Second, the simulated losses in the circuits are consistent with the analytic calculated ones, except that the gate-drive losses of the MOSFET are slightly lower in simulations because the gate charge Qg is lower than given in the datasheet of the MOSFET due to the very low drain–source currents. The simulations also show that the modeling of the losses in the diode bridge rectifier is not so accurate. The simulation results also indicate that, although the output power of the harvester when connected to the resistive load is considerably higher than the output power of the harvester with rectifier load, the overall output power of both processing circuits is comparable. Both dc–dc converters have been built on a printed circuit board using commercially available discrete devices. The used MOSFET is a 2N7002, and the diode is a BAS16W. The inductors are ferrite drum core inductors in an SMD 1210-package. A PIC18F4550 microcontroller is used to generate the pulsewidth-modulated (PWM) gate-drive signals, and an HCPL3180 is the gate driver. The microcontroller and the gate-drive circuitry are powered from an external source, as the optimization toward low power consumption of the control components is beyond the scope of this paper. The minimal PWM frequency generated by the microcontroller is 3 kHz, with a minimal duty cycle of 0.2%. An inductor with an inductance value of 470 μH leads to a duty cycle that is larger than the minimal 0.2% for both circuits, and hence, this inductance value has been used in the practical realization. As can be seen in Fig. 10, the theoretical efficiency of the buck–boost converter providing the resistive load with an inductance value of
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TABLE IV M EASUREMENTS ON B OTH P OWER P ROCESSING C IRCUITS
470 μH is 51%. The efficiency of the buck converter with the same inductor is 60%, as shown in Fig. 12. The output voltage of both circuits is set to 3 V, and the piezo bimorph harvester is driven at its open circuit resonance frequency with an acceleration of 5 m/s2 . A summary of the main measurements on both circuits is given in Table IV. The output power of the harvester, connected to Circuit1, is measured to be about 48 μW. This value is consistent with the theoretical optimal output of the harvester as shown in Fig. 7. From this measurement, it can be concluded that the input resistance emulated by the buck–boost converter is correctly seen by the energy harvester. The efficiency of the converter is rather low, about 40%, without taking the gate-drive losses into account. Using Circuit2, the voltage at the output of the harvester, after rectification, is set to 4.8 V, the measured output voltage is about 39 μW, and this value is also quite consistent with the theoretical value as shown in Fig. 7. The efficiency of the converter is about 64%, without taking the power loss in the gate driver into account. The measured and calculated power losses are also shown in Table IV. The differences between the measured and the modeled power loss are about 15% for Circuit2 and 25% for Circuit1, without taking the gate-drive losses into account. The higher measurement losses are probably due to parasitic effects that have not been taken into account in the model, e.g., parasitic capacitances that become relatively important because of the high frequencies present. From the measurements, it can be concluded that, for this particular harvester configuration, the open-loop efficiency of the standard buck-converter processing circuit is considerably higher than the efficiency of the buck–boost converter, as was predicted by theoretical calculations and simulations. Moreover, the measurements show that the overall power output of the piezoelectric harvesting system with the standard buck converter as power processing circuit is higher, even though the harvester power output with the converter providing the optimal resistive load is higher. VI. C ONCLUSION In this paper, the behavior of a piezoelectric vibration-driven energy harvester has been assessed with two different power processing circuits. An optimal linear resistive load, as well as an optimal dc voltage load of the energy harvester, can be analytically calculated for every operating frequency. To determine which load leads to the optimal overall efficiency of a system consisting of an energy harvester connected to a power processing circuit, two power processing circuits are
designed: the first one emulating a resistive input impedance and the second one with a constant input voltage. A buck–boost dc–dc converter without input filter capacitor, operating in discontinuous conduction mode, is shown to have a resistive input impedance. A buck converter with input filter capacitor is used to evaluate the rectifier load case. An analytic loss model of both converters is set up to determine the optimal operating point of the converters. If the model parameters of a certain energy harvester are known, the output power of the energy harvester after power processing can be calculated using the analytic loss models of the converters. Generally, it can be concluded that, in order to design an optimal harvesting system, it is not sufficient to employ the power processing strategy that is able to harvest the maximal amount of energy out of the harvester. The efficiency of the power processing circuit is equally important. This has been illustrated by means of a piezo bimorph taken as harvester device. The harvester generates more power if connected to the optimal resistive load than if connected to the optimal dc load. However, the loss calculations show that the efficiency of the converter emulating a resistive input impedance is much lower (51%) than the efficiency of the buck converter (60%) at their optimal operating points. The efficiency of the latter processing circuit can be increased even more by adding control circuitry. Hence, for this example, it can be concluded that the efficiency of the overall system of a harvesting device with power processing circuit will be better if the processing circuit has a fixed dc voltage as input. This conclusion is validated through simulations and experimental measurements. An output power of 19 μW was measured after power processing with the resistor-emulation approach, whereas a 25-μW output power was measured with the fixed-voltage approach.
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Reinhilde D’hulst received the M.Sc. degree in electrical engineering and the Ph.D. degree from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 2004 and 2009, respectively. As a member of the Electrical Energy research group (ELECTA), Department of Electrical Engineering, K.U.Leuven, she worked on power processing circuits for energy harvesters. She is currently with VITO, the Flemisch Institute for Technological Research, where she conducts research on power electronics in a smart grid environment.
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Tom Sterken (M’02) received the Diploma degree in electrical engineering from the University of Ghent, Ghent, Belgium, in 2001 and the Ph.D. degree from the Katholieke Universiteit Leuven, Leuven, Belgium, in 2009. From 2002 to 2008, he was with the Interuniversitary Center for Microelectronics, Leuven, working on the design, modeling, and fabrication of miniature power generators based on MEMS technology. This research resulted in his Ph.D. degree. He is currently with the Centre for Microsystems Technology group, University of Ghent, where he is working on ultrathin chip packaging and stretchable electronics. Robert Puers (SM’95) was born in Antwerp, Belgium, in 1953. He received the B.S. degree in electrical engineering from University of Ghent, Ghent, Belgium, in 1974 and the M.S. and Ph.D. degrees from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1977 and 1986, respectively. In 1980, he joined ESAT, K.U.Leuven, as a Research Assistant, where he became the Director (NFWO) of the clean room facilities for silicon and hybrid circuit technology at the ESAT–MICAS laboratories in 1986. He was a pioneer in the European research efforts in silicon micromachined sensors, microelectromechanical systems (MEMS), and packaging techniques, for biomedical implantable systems as well as for industrial devices. He is currently a full Professor with K.U.Leuven, teaching courses in “microsystems and sensors” and “biomedical instrumentation and stimulation” and also a basic course in “lectronics, system control, and information technology.” He is the author or coauthor of more than 350 papers on biotelemetry, sensors, MEMS, and packaging in reviewed journals or international conferences. He is the Editor-in-Chief of the Journal of Micromechanics and Microengineering of the Institute of Physics (IOP). Dr. Puers is a Fellow of the IOP (U.K.) and a council member of the International Microelectronics and Packaging Society. He is the General Chairman of the Eurosensors conferences. Geert Deconinck (SM’01) received the M.Sc. degree in electrical engineering and the Ph.D. degree in engineering from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1991 and 1996, respectively. He was a Postdoctoral Fellow of the Fund for Scientific Research—Flanders from 1997 to 2003. He is currently a full Professor (hoogleraar) with K.U.Leuven. He is also a Staff Member of ESAT/ELECTA (Electrical Energy and Computing Architectures), K.U.Leuven, where he performs research on designing dependable system architectures for industrial automation and control, assessing their dependability attributes and characterizing infrastructure interdependences. Dr. Deconinck is a member of the IEEE SMC Technical Committee on Infrastructure Systems and Services, the Royal Flemish Engineering Society, and the Institute of Engineering and Technology. He is a senior member of the IEEE Reliability Society, IEEE Computer Society, and IEEE Power and Energy Society. He is the Chairman of the TI society BIRA on industrial automation. Johan Driesen (M’97) was born in Belgium in 1973. He received the M.Sc. degree and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven (K.U.Leuven), Leuven, Belgium, in 1996 and 2000, respectively. His Ph.D. focused on the finite-element solution of coupled thermal–electromagnetic problems and related applications in electrical machines and drives, microsystems, and power quality issues. From 2000 to 2001, he was a Visiting Researcher with the Imperial College of Science, Technology and Medicine, London, U.K. In 2002, he was with the University of California, Berkeley. He is currently an Associate Professor with K.U.Leuven, where he teaches power electronics and drives. Currently, he conducts research on distributed energy resources, including renewable energy systems, power electronics, and its applications, for instance, in renewable energy and electric vehicles.
