Reliability and performance scaling of very high speed SiGe HBTs Greg Freeman *, Jae-Sung Rieh, Zhijian Yang, Fernando Guarin IBM Microelectronics Semiconductor Research and Development Center, 2070 Rt. 52, Hopewell Junction, New York, NY 12533, USA Received 5 November 2003
Abstract We discuss the SiGe HBT structural changes required for very high performance. The increase in collector concentration, affecting current density and avalanche current, appears to be the most fundamental concern for reliability. In device design, a narrow emitter and reduced poly–single-crystal interfacial oxide are important elements in minimizing device parameter shifts. From the application point of view, avalanche hot-carriers appear to present new constraints, which may be managed through limiting voltage (to 1.5·–2· BVCEO ), or through circuit designs robust to base current parameter shifts. 2003 Elsevier Ltd. All rights reserved.
1. Introduction SiGe HBT speed and noise performance continue to improve, with demonstrated results among the highest speed and lowest noise of any device in any material system. Recent performance results exceed 350 GHz fT [1] and NFMIN results demonstrated below 0.4 dB at 10 GHz [2]. Compared to III–V devices, only the smallest dimension HEMT devices [3] or laboratory InP HBT devices [4] have demonstrated such high fT or low NFMIN , and silicon NFETs are expected to achieve comparable fT performance at the 25 nm node. Largely responsible for the silicon-based HBT advancement are material innovations, the first of which is 10–25% Ge incorporation into the silicon lattice, which provides bandgap modifications and drift-fields to enhance performance above non-Ge containing devices. Another more recent material innovation is the additional incorporation of