Self-Polarized Capacitive Silicon Micromechanical Resonators via ...
Self-Polarized Capacitive Silicon Micromechanical Resonators via Charge Trapping Ashwin K. Samarao and Farrokh Ayazi School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, 30332-0250 [email protected]; [email protected] Abstract We present for the first time a charge trapping technique as a viable passive biasing mechanism for capacitive silicon micromechanical resonators. Potential wells are created on the surface of the microresonator to trap charges for mimicking a polarization voltage (Vp) of 8 V. With no externally applied Vp, the resonance peak of a 20 µm thick silicon bulk acoustic resonator (SiBAR) with 50 nm transduction air-gaps comes up by ~25 dB from the noise floor. An insertion loss (I.L.) of 30.7 dB and a quality factor (Q) of 59,000 has been measured in vacuum at a resonance frequency of 104.81 MHz.
aspect-ratio air-gaps for electrostatic transduction. Trenches etched in silicon using the DRIE process defines the dimensions of the SiBAR while a subsequent thermally grown silicon dioxide sacrificial layer defines the air-gap between the SiBAR and the drive/sense polysilicon electrodes (Figure 1, 2(a)).
Introduction After nearly four decades of continued interest and research, silicon micromechanical resonators/oscillators are finally being commercialized for timing and frequency control applications [1]. Among the many available transduction schemes for silicon microresonators, piezoelectric [2] and capacitive [3] mechanisms have been extensively explored over the years due to their individual superior performances. While the former offers lower motional impedance and relative ease of fabrication, the latter offers very high fQ (resonance frequency × quality factor) product [4] that translates to low-jitter in oscillators and high-precision in resonant sensor systems. However, the additional circuitry needed to generate the DC polarization voltage (Vp) for capacitive actuation renders such oscillators and sensor systems incompatible with low voltage processes [5]. One approach to alleviate the need for an externally-applied DC voltage is to use the resonant silicon microstructures suspended on the oxide layer of a SOI as capacitors to store charges [6]. However, a DC bias source is still needed to start-up the resonator and to intermittently replenish the leaked charges. This work, on the other hand, explores a passive charge injection technique for start-up and trapping of these charges via potential wells on the surface of the silicon microresonator for continued operation. Unless perturbed externally, the charges remain trapped thus enabling a self-polarization technique without the need for any externally applied Vp. We demonstrate such zero-Vp operation on a rectangular single-crystal silicon bulk acoustic resonator (or SiBAR, Figure 1). SiBARs are primarily fabricated using the conventional HARPSS process [3] to achieve very high
978-1-4244-7419-6/10/$26.00 ©2010 IEEE
Figure 1: (a) SEM and (b) Simulated width-extensional mode (WEM) shape of the SiBAR. (W = 40 µm; L = 6 × W = 240 µm; T = 20 µm). E and ρ are the Young’s modulus and density of silicon.
A DC polarization voltage (Vp) is typically applied externally to the resonator to generate an electrostatic field in the narrow capacitive air-gaps. When an AC voltage is applied to the drive electrode, the resulting time-varying electrostatic force applied to the corresponding face of the resonator induces an acoustic wave that propagates through the resonator. At the target frequency (ƒ0) determined by W, the resulting width-extensional mode of resonance (Figure 1(b)) modulates the transduction air-gap on the other side inducing a voltage on the sense electrode. Charge Trapping in SiBARs To create the charge traps, we added an additional step of annealing in nitrogen ambient at 1100 °C for one hour prior to the thermal oxidation step (Figure 2(b)).
Figure 2 (a): (i) Etch trenches in silicon; (ii) Thermal growth of spacer oxide; (iii) Deposit and pattern doped LPCVD polysilicon followed by HF release;
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Figure 2 (b): In this work: (i) Additional N2 annealing at 1100 °C for 1 hour; (ii) Charge traps (exaggerated for clarity) created during thermal oxidation; (iii) Charge traps exposed to electrodes after final HF release;
Annealing in N2 ambient diffuses nitrogen into the surface of the silicon resonator creating a thin silicon rich silicon-nitride layer (SRN) [7]. Upon subsequent thermal oxidation, high densities of charge traps are created in SRN [8]. The strain due to the oxidation of silicon through a thin SRN layer weakens the silicon-nitrogen bond resulting in dangling bonds near the oxide-nitride interface that act as charge traps [9]. These charge traps are similar to those reported in the metal-oxide-nitride-oxide-semiconductor (MONOS) nonvolatile memory devices [10]. Since the thermal oxide in this work defines the capacitive air-gap between the silicon resonator and its electrodes, it is removed in the final step thereby exposing the charge traps on the resonator surface facing the electrodes. Now, any external charge injected into the silicon resonator will create a charge front that propagates through the silicon bulk and sequentially fill these traps via Fowler-Nordheim tunneling. The charge traps are known to be amphoteric; they can be filled with either electrons from the conduction band or holes from the valence band of silicon [11].
further prevents the back flow of trapped charges unless an externally-applied Vp forces the charge carriers to tunnel through the barrier. Though ideally an infinite retention time of the trapped charges is possible, exposure to atmospheric humidity and subsequent growth of native oxide on the surface of a non-encapsulated resonator reduces the trapped charge density over time. As a result, a progressive attenuation of the signal strength by ~5 dB is observed over 4~5 weeks. As expected, the removal of native oxide in HF is found to restore the signal back to its original strength. Such leakage of trapped charges over time could potentially be avoided in a hermetically-encapsulated SiBAR (e.g. via wafer level packaging) thereby offering long-term stable zero-Vp operation. Interestingly, the high temperature nitrogen annealing in this work offers an additional benefit; it helps to reflow the silicon slightly on the trench sidewalls, which in turn greatly reduces the surface roughness from the Bosch DRIE process thereby enabling reliable sub-100-nanometer air-gaps. As a result of this step, an ultra-uniform and smooth capacitive air-gap as small as 50 nm have been realized for a substrate thickness of 20 µm, making it one of the highest aspect-ratio air-gaps (400:1) reported to date (Figure 4).
Figure 4: Ion milling using FIB reveals an ultra uniform and smooth narrow capacitive air-gap of ~50 nm between the SiBAR and the electrodes as a result of N2 annealing.
Results Figure 5 shows the measured as-is response from the device shown in Figure 3. Without applying any external Vp, an I.L. of 30.7 dB and a Q of 59,000 is measured for this device in vacuum at a resonance frequency of 104.81 MHz. Figure 3: SiBAR with ultrasonically wire-bonded aluminum. A very narrow Schottky barrier is formed at the interface between aluminum and very highly-doped silicon (< 0.001 ohm-cm).
As a proof of concept, the electrostatic discharge (ESD) during ultrasonic bonding of an aluminum wire (Figure 3) [12] has been found sufficient to create the necessary charge injection for filling the traps, thereby charging the resonator surface and mimicking a polarization voltage (Vp). Such a device can be electrostatically transduced as-is without the application of any external Vp (i.e., zero-Vp operation). In addition to the potential barrier of the charge traps, the very narrow Schottky barrier that forms at the interface between aluminum and very highly-doped silicon (
aspect-ratio air-gaps for electrostatic transduction. Trenches etched in silicon using the DRIE process defines the dimensions of the SiBAR while a subsequent thermally grown silicon dioxide sacrificial layer defines the air-gap between the SiBAR and the drive/sense polysilicon electrodes (Figure 1, 2(a)).
Introduction After nearly four decades of continued interest and research, silicon micromechanical resonators/oscillators are finally being commercialized for timing and frequency control applications [1]. Among the many available transduction schemes for silicon microresonators, piezoelectric [2] and capacitive [3] mechanisms have been extensively explored over the years due to their individual superior performances. While the former offers lower motional impedance and relative ease of fabrication, the latter offers very high fQ (resonance frequency × quality factor) product [4] that translates to low-jitter in oscillators and high-precision in resonant sensor systems. However, the additional circuitry needed to generate the DC polarization voltage (Vp) for capacitive actuation renders such oscillators and sensor systems incompatible with low voltage processes [5]. One approach to alleviate the need for an externally-applied DC voltage is to use the resonant silicon microstructures suspended on the oxide layer of a SOI as capacitors to store charges [6]. However, a DC bias source is still needed to start-up the resonator and to intermittently replenish the leaked charges. This work, on the other hand, explores a passive charge injection technique for start-up and trapping of these charges via potential wells on the surface of the silicon microresonator for continued operation. Unless perturbed externally, the charges remain trapped thus enabling a self-polarization technique without the need for any externally applied Vp. We demonstrate such zero-Vp operation on a rectangular single-crystal silicon bulk acoustic resonator (or SiBAR, Figure 1). SiBARs are primarily fabricated using the conventional HARPSS process [3] to achieve very high
978-1-4244-7419-6/10/$26.00 ©2010 IEEE
Figure 1: (a) SEM and (b) Simulated width-extensional mode (WEM) shape of the SiBAR. (W = 40 µm; L = 6 × W = 240 µm; T = 20 µm). E and ρ are the Young’s modulus and density of silicon.
A DC polarization voltage (Vp) is typically applied externally to the resonator to generate an electrostatic field in the narrow capacitive air-gaps. When an AC voltage is applied to the drive electrode, the resulting time-varying electrostatic force applied to the corresponding face of the resonator induces an acoustic wave that propagates through the resonator. At the target frequency (ƒ0) determined by W, the resulting width-extensional mode of resonance (Figure 1(b)) modulates the transduction air-gap on the other side inducing a voltage on the sense electrode. Charge Trapping in SiBARs To create the charge traps, we added an additional step of annealing in nitrogen ambient at 1100 °C for one hour prior to the thermal oxidation step (Figure 2(b)).
Figure 2 (a): (i) Etch trenches in silicon; (ii) Thermal growth of spacer oxide; (iii) Deposit and pattern doped LPCVD polysilicon followed by HF release;
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Figure 2 (b): In this work: (i) Additional N2 annealing at 1100 °C for 1 hour; (ii) Charge traps (exaggerated for clarity) created during thermal oxidation; (iii) Charge traps exposed to electrodes after final HF release;
Annealing in N2 ambient diffuses nitrogen into the surface of the silicon resonator creating a thin silicon rich silicon-nitride layer (SRN) [7]. Upon subsequent thermal oxidation, high densities of charge traps are created in SRN [8]. The strain due to the oxidation of silicon through a thin SRN layer weakens the silicon-nitrogen bond resulting in dangling bonds near the oxide-nitride interface that act as charge traps [9]. These charge traps are similar to those reported in the metal-oxide-nitride-oxide-semiconductor (MONOS) nonvolatile memory devices [10]. Since the thermal oxide in this work defines the capacitive air-gap between the silicon resonator and its electrodes, it is removed in the final step thereby exposing the charge traps on the resonator surface facing the electrodes. Now, any external charge injected into the silicon resonator will create a charge front that propagates through the silicon bulk and sequentially fill these traps via Fowler-Nordheim tunneling. The charge traps are known to be amphoteric; they can be filled with either electrons from the conduction band or holes from the valence band of silicon [11].
further prevents the back flow of trapped charges unless an externally-applied Vp forces the charge carriers to tunnel through the barrier. Though ideally an infinite retention time of the trapped charges is possible, exposure to atmospheric humidity and subsequent growth of native oxide on the surface of a non-encapsulated resonator reduces the trapped charge density over time. As a result, a progressive attenuation of the signal strength by ~5 dB is observed over 4~5 weeks. As expected, the removal of native oxide in HF is found to restore the signal back to its original strength. Such leakage of trapped charges over time could potentially be avoided in a hermetically-encapsulated SiBAR (e.g. via wafer level packaging) thereby offering long-term stable zero-Vp operation. Interestingly, the high temperature nitrogen annealing in this work offers an additional benefit; it helps to reflow the silicon slightly on the trench sidewalls, which in turn greatly reduces the surface roughness from the Bosch DRIE process thereby enabling reliable sub-100-nanometer air-gaps. As a result of this step, an ultra-uniform and smooth capacitive air-gap as small as 50 nm have been realized for a substrate thickness of 20 µm, making it one of the highest aspect-ratio air-gaps (400:1) reported to date (Figure 4).
Figure 4: Ion milling using FIB reveals an ultra uniform and smooth narrow capacitive air-gap of ~50 nm between the SiBAR and the electrodes as a result of N2 annealing.
Results Figure 5 shows the measured as-is response from the device shown in Figure 3. Without applying any external Vp, an I.L. of 30.7 dB and a Q of 59,000 is measured for this device in vacuum at a resonance frequency of 104.81 MHz. Figure 3: SiBAR with ultrasonically wire-bonded aluminum. A very narrow Schottky barrier is formed at the interface between aluminum and very highly-doped silicon (< 0.001 ohm-cm).
As a proof of concept, the electrostatic discharge (ESD) during ultrasonic bonding of an aluminum wire (Figure 3) [12] has been found sufficient to create the necessary charge injection for filling the traps, thereby charging the resonator surface and mimicking a polarization voltage (Vp). Such a device can be electrostatically transduced as-is without the application of any external Vp (i.e., zero-Vp operation). In addition to the potential barrier of the charge traps, the very narrow Schottky barrier that forms at the interface between aluminum and very highly-doped silicon (
