Senior Design Projects: An Analog Circuit
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
93
Research-Oriented Junior/Senior Design Projects: An Analog Circuit Design Example Wael M. Halalu, Student Member, IEEE, and Ahmed S. Elwakil, Member, IEEE
Abstract—Briefly, the advantages of offering research-oriented design projects for undergraduate students of particular interest and talent are discussed. A successful research-based analog circuit design project is described as an example. The project is concerned with developing bipolar transistor circuit cells capable of realizing arbitrary nonlinear current transfer characteristics in piecewiselinear form using the Static Translinear Principle (STLP). The obtained results are shown. Index Terms—Analog electronics, nonlinear circuits, piecewiselinear functions, translinear circuits.
I. INTRODUCTION
J
UNIOR/SENIOR design projects are key elements in most Electrical, Electronic, and Computer Engineering undergraduate programs, and indeed in many other disciplines. Students usually engage in these two course-equivalent subjects near the end of their four-year (or five-year) study, most likely during the final four semesters. The importance of these design projects is highly emphasized by many educational establishments as well as by industrial representatives, who integrate questions concerning these projects in their interviews of fresh graduates seeking employment. One can summarize the main objectives of junior/senior design projects in a number of points, as follows. 1) One objective is to enable students to integrate theoretical and practical skills gained throughout their lecture and laboratory coverage of different courses. However, rarely can a project be completed without the involved students having to read extensively and search for extra information not available in their textbooks, lecture notes, or laboratory manuals. This important objective opens students’ eyes to the realization that the degree by which they have digested the fundamental ideas of their core courses will dictate their ability to access more knowledge. 2) The spirit of teamwork and the associated concepts of effective task partitioning, time and budget allocation, load distribution, scheduling, etc., are important outcomes of design projects that deserve emphasized attention when it comes to evaluating and grading. 3) Successful documentation and presentation of the work performed throughout the project is an equally impor-
Manuscript received June 9, 2002; revised January 6, 2003. W. M. Halalu is with the Department of Electrical and Electronic Engineering, University of Sharjah, Sharjah, United Arab Emirates, and also with Abu Dhabi Etisalat, United Arab Emirates. A. S. Elwakil is with the Department of Electrical and Electronic Engineering, University of Sharjah, Sharjah, United Arab Emirates. Digital Object Identifier 10.1109/TE.2003.818273
tant objective. In particular, students are expected to learn how to professionally prepare a document that will enable others to understand, confirm, and possibly extend their findings. In addition to these generic objectives, the nature of the design project itself and the quality of the involved students might force supervisors to reshuffle priorities. In this context, the situation is considered where a student or group of students show particular interest and evident talent in a specific subject. In addition, the students have sincere desires to continue their postgraduate studies immediately after graduation. Although such a combination is not so common, it should be carefully considered when it does appear, particularly since such students are excellent candidates for joining respective research groups within their institutions or elsewhere. The following sections describe a research-based junior design project that has been tailored to introduce to a particularly talented student in electronic circuit design two advanced topics in this area. In this project, the merits of teamwork have been sacrificed for the sake of giving the student a very clear idea of the meaning of scientific research and significance of published material. Such a clear view is expected to aid the student in a future research-oriented career. However, the authors believe that the student will be sufficiently exposed to teamwork values during his or her senior design project, a condition generally recommended in a similar case. II. BACKGROUND Analog electronic circuit design is offered as an elective course in many universities. The emphasis in this course is usually on integrated circuit design techniques, both in bipolar and in metal–oxide–semiconductor (MOS) technologies, covering topics such as amplifier design, tuned filters, oscillators, analog-to-digital (A/D) and digital-to-analog (D/A) converters [1]–[4]. However, some instructors find it adequate to introduce advanced topics to the students, such as switched-capacitor and translinear circuits, particularly when they detect an encouraging response. The student who carried the junior design project described here was among nine other students attending this elective course. The Static Translinear Principle (STLP) was explained to the students in a series of lectures with several of its applications both in bipolar and MOS circuits. One cannot find this important principle in any undergraduate textbook and, therefore, has to revert to a specialized book such as [5] and some introductory research articles [6], [7]. Although the translinear principle has been around for quite a long time, only recently has it received more attention and renewed interest. The reason lies in the technological advances
0018-9359/04$20.00 © 2004 IEEE
94
Fig. 1.
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
Simple four-transistor bipolar translinear cells: (a) stacked cell and (b) folded cell.
Fig. 2. Translinear cell proposed in [12].
which have made it possible to realize well-matched bipolar and MOS transistors. Furthermore, the rapidly increasing demand for low-voltage and high-frequency analog circuits has resurrected the so-called “current-mode” design approach as an alternative to the traditional and historically motivated “voltage-mode” approach [8]. Most circuits developed for current-mode operation, such as current conveyors, current feedback amplifiers, and log-domain circuits, are based on the translinear principle. One major impact of the STLP on the way students approach relatively sophisticated transistor circuits is that they start searching for loops of transistors for which they can write loop equations rather than trying to understand the function performed by each individual transistor separately. In particular, and considering the case of bipolar transistors, the STLP applies to a loop of connected transistors with forward-biased base-emitter junctions satisfying the following conditions [6]:
Fig. 3. Proposed cell with current programmable slope.
1) the number of clockwise NPN junctions is equal to junctions; the number of counterclockwise NPN junctions is equal to 2) the number of clockwise PNP junctions. the number of counterclockwise PNP Hence, assuming NPN transistors and PNP transistors, one can write the loop equation as
(1) where current
and are even. It is well known that the collector relates to the base-emitter voltage as: where is the device saturation current and
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
Fig. 4.
95
(a)
(b)
(c)
(d)
0 00 2], (c)
PSpice simulations of the cell in Fig. 3 (a) S = [0:2 : 1] and (b) S = [ 1;
is the thermal voltage. Substituting in (1) for strictly matched transistor pairs yields
:
S
= [3 : 15], and (d) S = [08; 02].
TABLE I INPUT/OUTPUT LINEARITY RANGE FOR DIFFERENT SUPPLIES
(2) Thus, for the stacked and folded transistor loops shown in Fig. 1(a) and (b), respectively, one can write If all transistors are biased to operate in the active ; is the emitter region, then also current. Worth noting is that analysis of translinear circuits is straightforward once the correct loops have been identified. However, the synthesis procedure is not as simple and requires a particularly talented designer. III. DESIGN PROJECT Among the important nonconventional applications of translinear circuits is the realization of arbitrary piecewise-linear voltage/current transfer and driving-point characteristics which are needed for realization of neural networks, fuzzy logic membership functions, nonlinear function approximations, and chaos generation [9]–[11]. In [12], the eight-transistor translinear cell shown in Fig. 2 was proposed. Two loops can be identified, those formed by transistors and respectively. By applying (2), it can be verified that the cell realizes the function
Fig. 5. Percentage error in measured I
versus slope S .
which represents a possible current multiplier/divider. However, where is a programmable one can also write Therefore, by using cells, slope set via the ratio each with a different slope, and by summing their output
96
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
Fig. 6.
PSpice simulation of the frequency characteristics of the proposed cell at S = 15.
currents (as shall be demonstrated subsequently), an arbitrary -segment piecewise-linear current transfer characteristic can be synthesized. By inspecting the cell in Fig. 2, two major disadvantages could be noticed. 1) The cell depends on complimentary NPN and PNP transistor pairs which increase the error because of process mismatches. 2) The slope can only be positive and cannot be negative. To obtain a negative slope, all transistors have to be interchanged with their complements. The target of the proposed junior design project was to introduce an alternative cell that solves these two major problems and verifies its utilization in synthesizing a number of complex functions. First, the student was assigned a period of extensive reading, mainly involving [5], in order to grasp the essentials of STLP, particularly the dc biasing techniques. Next, the student was requested to study the research article [12], analyze all the circuits described therein, and verify the presented PSpice simulations. The challenging target of the project was, thereafter, presented to the student to develop several ideas, investigate all of them, and select the best proposal. Finally, the student introduced a novel cell with acceptable performance. A. Proposed Cell The cell proposed by the student is shown in Fig. 3. As seen, and requires the cell operates from a single power supply and level-shifting current The two a dc biasing voltage input currents are and , whereas the output is the differential current The MOS transistors and provide the biasing dc tail currents. Two translinear loops can be identified in Fig. 3; the first is the loop, and the second is the
loop. Applying (2) yields the following loop equations, respectively: and
(3)
Hence, the output current is given by Note that since the input current is level shifted by the dc current , it can acquire a positive or a negative value proholds. This result means that both vided the condition negative and positive slopes can be obtained using this cell. Note also that all transistors in the cell are NPN type, as targeted. To confirm the operation of the cell, PSpice simulations were 2.5 V, 1 mA and scanperformed with ning from 0.1 to 0.5 mA in steps of 0.1 mA. The resulting programmable slopes are shown in Fig. 4(a) and (b), respectively. Note that replication of , the sign inversion of , and are all performed using the subtraction necessary to obtain current mirrors (not shown in Fig. 3). Because of the constraint , it is clear the maximum value for is 2, imposing a limitation not present in [12]. Fortunately, this problem can be in the marked easily solved by replacing the current source The realized dotted box of Fig. 3 with another input current function thus becomes . The maximum positive slope achieved by the cell in this case was found , as shown in to be 15, while the minimum negative slope is Fig. 4(c) and (d), respectively. Values greater than these reduce the linearity range of the cell, rendering it impractical, particularly for low supply voltages, as summarized in Table I. was found to be offset from null by a nearly constant value which depends only on the realized slope; 300 A at the maximum slope ( ); and 15 A at the minimum ). Fig. 5 shows the percentage error in as the slope ( slope is increased for different supplies. Analytically, the relabecause of an absolute error in the current tive error in
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
97
(a)
(b) Fig. 7. Realization of a six-segment staircase function: (a) cell structure and (b) PSpice simulation.
source is equal to . Hence, this error can be reduced by using sufficiently large values for . Worth noting is that the dominant factor limiting the linear op, eration of the cell under low supplies is the MOS transistor which rapidly enters its triode region. With the generic models of NPN and MOS transistors used in simulations, the bandwidth was around 1.6 MHz, as shown in Fig. 6, of the cell at . and extends to 2.6 MHz at B. Synthesis of Piecewise-Linear Functions Having characterized the performance of the proposed cell, the student proceeded to synthesis of some complex piecewise-linear current transfer characteristics. First, a six-segment staircase is realized via using six cells, connected as shown
in Fig. 7(a). The slopes of the odd-numbered cells all equal ( 1 mA, 0.2 mA); whereas the slopes of the ( 1 mA, 0.2 mA). even-numbered cells are all One needs to displace the beginning of each segment to the end of the previous one by using external displacement currents . The values used here are 0, 35 A, 80 A, 100 A, 150 A, and 170 A for the six cells, respectively. Evidently, 1.5 mA is common for all cells, as is the input current . PSpice simulation of the obtained staircase is shown in Fig. 7(b). Next, a four-segment function is synthesized by removing cells 5 and 6 from Fig. 7(a). The slopes of the four segments ( 200 A, 1 mA), were chosen to be ( 400 A, 1 mA), ( 800 A, 1 mA), and ( 650 A, 1 mA), respectively.
98
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
(a)
(b) Fig. 8.
PSpice simulations of four-segment, piecewise-linear functions: (a) with arbitrary slopes and (b) double-triangle characteristics.
To generate the characteristics shown in Fig. 8(a), the displacement currents were 0, 250 A, 500 A, and 700 A for cell 1 to cell 4, respectively. We might as well equate the positive and negative slopes to obtain the double-triangle characteristics shown in Fig. 8(b), used in many fuzzy-logic applications. Worth noting is that realizing such current input/output nonlinear functions using op amps, operational transconductance amplifiers (OTAs) , or similar devices is rather difficult and complicated. The best choice is to revert to basic transistor cells in this case; the contribution of the translinear principle is hence pronounced.
IV. CONCLUSION The findings of a single student assigned a research-based junior design project concerned with synthesizing current-mode piecewise-linear functions were presented. The student also was able to modify his cell in order to realize arbitrary power law ; . functions, obtaining the relation Some observations are as follows. • The prolonged extensive reading period at the beginning of a research-based project is vital. The duty of the supervisor is to make sure the student is not lost in details beyond his or her capabilities at this stage.
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
• Smoothly introducing the student to the periodicals and scientific journals common in this area of research is important.
99
[12] M. T. Abuelma’atti and S. M. Abed, “A translinear circuit for piecewiselinear approximations of nonlinear functions,” Microelectron. J., vol. 29, pp. 441–444, 1998.
REFERENCES [1] A. S. Sedra and K. C. Smith, Microelectronic Circuits. NewYork: Oxford Univ. Press, 1998. [2] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design. NewYork/Oxford: Oxford Univ. Press, 2002. [3] R. Van de Plassche, J. Huijsing, and W. Sansen, Analog Circuit Design. Norwell, MA: Kluwer, 2000. [4] J. Huijsing, R. van de Plassche, and W. Sansen, Analog Circuit Design. Operational Amplifiers, Analog to Digital Convertors, Analog Computer Aided Design. Norwell, MA: Kluwer, 1993. [5] J. Mulder, W. A. Serdijn, A. C. Van der Woerd, and A. H. Van Roermund, Dynamic Translinear and Log-Domain Circuits: Analysis and Synthesis. Norwell, MA: Kluwer, 1999. [6] B. Gilbert, “Translinear circuits: A proposed classification,” Electron. Lett., vol. 11, pp. 14–16, Jan. 1975. [7] B. L. Hart, “Translinear circuit principle: A reformulation,” Electron. Lett., vol. 15, pp. 801–803, Nov. 1979. [8] C. Toumazou, J. Lidgey, and A. Payne, Emerging Techniques for High Frequency BJT Amplifier Design: A Current-Mode Perspective. Oxford, U.K.: Parchment Press, Ltd., 1994. [9] S. Liu, D. Wu, H. Tsao, and J. Tsay, “Nonlinear circuit applications with current conveyors,” IEE Proc. Circuits Devices Syst., vol. 140, pp. 1–6, 1993. [10] S. Kuta, “Current mode circuit implementation of PWL functions,” Analog Integrated Circuits & Signal Processing, vol. 16, pp. 285–297, 1998. [11] A. S. Elwakil and M. P. Kennedy, “Construction of classes of circuitindependent chaotic oscillators using passive-only nonlinear devices,” IEEE Trans. Circuits Syst. I, vol. 48, pp. 289–307, Mar. 2001.
Wael M. Halalu (S’03) was born in Abu Dhabi, United Arab Emirates. He received the B.Sc. degree in electrical engineering from the Department of Electrical and & Electronic Engineering at Sharjah University, United Arab Emirates, in 2003. He is currently working toward the M.Sc. degree. He is currently an Engineer with the Abu Dhabi Etisalat company.
Ahmed S. Elwakil (M’03) was born in Cairo, Egypt. He received the B.Sc. and M.Sc. degrees from the Department of Electronics and Communications at Cairo University, Cairo, Egypt, in 1995 and 1997, respectively, and the Ph.D. degree from the Department of Electrical and Electronic Engineering, the National University of Ireland, Dublin, in 2000. Since September 2000, he has been with the Department of Electrical and Electronic Engineering, Sharjah University, United Arab Emirates, as an Assistant Professor. He has also served as an Instructor for a number of courses on basic very large scale integrated (VLSI) design organized by the United Nations University (UNU) and the International Centre for Theoretical Physics (ICTP). His research interests primarily include the areas of analog circuit design, circuit theory, nonlinear dynamics, and chaos theory. He is author and coauthor of more than 60 publications in these areas. Dr. Elwakil is a Member of the IEEE Technical Committee on Nonlinear Circuits and has served as a Reviewer and Review Committee Member for many journals and international conferences. He has also served as an Associate Member of the ICTP, an Associate Member of the Centre for Chaos Control and Synchronization at the City University of Hong Kong, and a Member of the Institution of Electrical Engineers (IEE).
93
Research-Oriented Junior/Senior Design Projects: An Analog Circuit Design Example Wael M. Halalu, Student Member, IEEE, and Ahmed S. Elwakil, Member, IEEE
Abstract—Briefly, the advantages of offering research-oriented design projects for undergraduate students of particular interest and talent are discussed. A successful research-based analog circuit design project is described as an example. The project is concerned with developing bipolar transistor circuit cells capable of realizing arbitrary nonlinear current transfer characteristics in piecewiselinear form using the Static Translinear Principle (STLP). The obtained results are shown. Index Terms—Analog electronics, nonlinear circuits, piecewiselinear functions, translinear circuits.
I. INTRODUCTION
J
UNIOR/SENIOR design projects are key elements in most Electrical, Electronic, and Computer Engineering undergraduate programs, and indeed in many other disciplines. Students usually engage in these two course-equivalent subjects near the end of their four-year (or five-year) study, most likely during the final four semesters. The importance of these design projects is highly emphasized by many educational establishments as well as by industrial representatives, who integrate questions concerning these projects in their interviews of fresh graduates seeking employment. One can summarize the main objectives of junior/senior design projects in a number of points, as follows. 1) One objective is to enable students to integrate theoretical and practical skills gained throughout their lecture and laboratory coverage of different courses. However, rarely can a project be completed without the involved students having to read extensively and search for extra information not available in their textbooks, lecture notes, or laboratory manuals. This important objective opens students’ eyes to the realization that the degree by which they have digested the fundamental ideas of their core courses will dictate their ability to access more knowledge. 2) The spirit of teamwork and the associated concepts of effective task partitioning, time and budget allocation, load distribution, scheduling, etc., are important outcomes of design projects that deserve emphasized attention when it comes to evaluating and grading. 3) Successful documentation and presentation of the work performed throughout the project is an equally impor-
Manuscript received June 9, 2002; revised January 6, 2003. W. M. Halalu is with the Department of Electrical and Electronic Engineering, University of Sharjah, Sharjah, United Arab Emirates, and also with Abu Dhabi Etisalat, United Arab Emirates. A. S. Elwakil is with the Department of Electrical and Electronic Engineering, University of Sharjah, Sharjah, United Arab Emirates. Digital Object Identifier 10.1109/TE.2003.818273
tant objective. In particular, students are expected to learn how to professionally prepare a document that will enable others to understand, confirm, and possibly extend their findings. In addition to these generic objectives, the nature of the design project itself and the quality of the involved students might force supervisors to reshuffle priorities. In this context, the situation is considered where a student or group of students show particular interest and evident talent in a specific subject. In addition, the students have sincere desires to continue their postgraduate studies immediately after graduation. Although such a combination is not so common, it should be carefully considered when it does appear, particularly since such students are excellent candidates for joining respective research groups within their institutions or elsewhere. The following sections describe a research-based junior design project that has been tailored to introduce to a particularly talented student in electronic circuit design two advanced topics in this area. In this project, the merits of teamwork have been sacrificed for the sake of giving the student a very clear idea of the meaning of scientific research and significance of published material. Such a clear view is expected to aid the student in a future research-oriented career. However, the authors believe that the student will be sufficiently exposed to teamwork values during his or her senior design project, a condition generally recommended in a similar case. II. BACKGROUND Analog electronic circuit design is offered as an elective course in many universities. The emphasis in this course is usually on integrated circuit design techniques, both in bipolar and in metal–oxide–semiconductor (MOS) technologies, covering topics such as amplifier design, tuned filters, oscillators, analog-to-digital (A/D) and digital-to-analog (D/A) converters [1]–[4]. However, some instructors find it adequate to introduce advanced topics to the students, such as switched-capacitor and translinear circuits, particularly when they detect an encouraging response. The student who carried the junior design project described here was among nine other students attending this elective course. The Static Translinear Principle (STLP) was explained to the students in a series of lectures with several of its applications both in bipolar and MOS circuits. One cannot find this important principle in any undergraduate textbook and, therefore, has to revert to a specialized book such as [5] and some introductory research articles [6], [7]. Although the translinear principle has been around for quite a long time, only recently has it received more attention and renewed interest. The reason lies in the technological advances
0018-9359/04$20.00 © 2004 IEEE
94
Fig. 1.
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
Simple four-transistor bipolar translinear cells: (a) stacked cell and (b) folded cell.
Fig. 2. Translinear cell proposed in [12].
which have made it possible to realize well-matched bipolar and MOS transistors. Furthermore, the rapidly increasing demand for low-voltage and high-frequency analog circuits has resurrected the so-called “current-mode” design approach as an alternative to the traditional and historically motivated “voltage-mode” approach [8]. Most circuits developed for current-mode operation, such as current conveyors, current feedback amplifiers, and log-domain circuits, are based on the translinear principle. One major impact of the STLP on the way students approach relatively sophisticated transistor circuits is that they start searching for loops of transistors for which they can write loop equations rather than trying to understand the function performed by each individual transistor separately. In particular, and considering the case of bipolar transistors, the STLP applies to a loop of connected transistors with forward-biased base-emitter junctions satisfying the following conditions [6]:
Fig. 3. Proposed cell with current programmable slope.
1) the number of clockwise NPN junctions is equal to junctions; the number of counterclockwise NPN junctions is equal to 2) the number of clockwise PNP junctions. the number of counterclockwise PNP Hence, assuming NPN transistors and PNP transistors, one can write the loop equation as
(1) where current
and are even. It is well known that the collector relates to the base-emitter voltage as: where is the device saturation current and
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
Fig. 4.
95
(a)
(b)
(c)
(d)
0 00 2], (c)
PSpice simulations of the cell in Fig. 3 (a) S = [0:2 : 1] and (b) S = [ 1;
is the thermal voltage. Substituting in (1) for strictly matched transistor pairs yields
:
S
= [3 : 15], and (d) S = [08; 02].
TABLE I INPUT/OUTPUT LINEARITY RANGE FOR DIFFERENT SUPPLIES
(2) Thus, for the stacked and folded transistor loops shown in Fig. 1(a) and (b), respectively, one can write If all transistors are biased to operate in the active ; is the emitter region, then also current. Worth noting is that analysis of translinear circuits is straightforward once the correct loops have been identified. However, the synthesis procedure is not as simple and requires a particularly talented designer. III. DESIGN PROJECT Among the important nonconventional applications of translinear circuits is the realization of arbitrary piecewise-linear voltage/current transfer and driving-point characteristics which are needed for realization of neural networks, fuzzy logic membership functions, nonlinear function approximations, and chaos generation [9]–[11]. In [12], the eight-transistor translinear cell shown in Fig. 2 was proposed. Two loops can be identified, those formed by transistors and respectively. By applying (2), it can be verified that the cell realizes the function
Fig. 5. Percentage error in measured I
versus slope S .
which represents a possible current multiplier/divider. However, where is a programmable one can also write Therefore, by using cells, slope set via the ratio each with a different slope, and by summing their output
96
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
Fig. 6.
PSpice simulation of the frequency characteristics of the proposed cell at S = 15.
currents (as shall be demonstrated subsequently), an arbitrary -segment piecewise-linear current transfer characteristic can be synthesized. By inspecting the cell in Fig. 2, two major disadvantages could be noticed. 1) The cell depends on complimentary NPN and PNP transistor pairs which increase the error because of process mismatches. 2) The slope can only be positive and cannot be negative. To obtain a negative slope, all transistors have to be interchanged with their complements. The target of the proposed junior design project was to introduce an alternative cell that solves these two major problems and verifies its utilization in synthesizing a number of complex functions. First, the student was assigned a period of extensive reading, mainly involving [5], in order to grasp the essentials of STLP, particularly the dc biasing techniques. Next, the student was requested to study the research article [12], analyze all the circuits described therein, and verify the presented PSpice simulations. The challenging target of the project was, thereafter, presented to the student to develop several ideas, investigate all of them, and select the best proposal. Finally, the student introduced a novel cell with acceptable performance. A. Proposed Cell The cell proposed by the student is shown in Fig. 3. As seen, and requires the cell operates from a single power supply and level-shifting current The two a dc biasing voltage input currents are and , whereas the output is the differential current The MOS transistors and provide the biasing dc tail currents. Two translinear loops can be identified in Fig. 3; the first is the loop, and the second is the
loop. Applying (2) yields the following loop equations, respectively: and
(3)
Hence, the output current is given by Note that since the input current is level shifted by the dc current , it can acquire a positive or a negative value proholds. This result means that both vided the condition negative and positive slopes can be obtained using this cell. Note also that all transistors in the cell are NPN type, as targeted. To confirm the operation of the cell, PSpice simulations were 2.5 V, 1 mA and scanperformed with ning from 0.1 to 0.5 mA in steps of 0.1 mA. The resulting programmable slopes are shown in Fig. 4(a) and (b), respectively. Note that replication of , the sign inversion of , and are all performed using the subtraction necessary to obtain current mirrors (not shown in Fig. 3). Because of the constraint , it is clear the maximum value for is 2, imposing a limitation not present in [12]. Fortunately, this problem can be in the marked easily solved by replacing the current source The realized dotted box of Fig. 3 with another input current function thus becomes . The maximum positive slope achieved by the cell in this case was found , as shown in to be 15, while the minimum negative slope is Fig. 4(c) and (d), respectively. Values greater than these reduce the linearity range of the cell, rendering it impractical, particularly for low supply voltages, as summarized in Table I. was found to be offset from null by a nearly constant value which depends only on the realized slope; 300 A at the maximum slope ( ); and 15 A at the minimum ). Fig. 5 shows the percentage error in as the slope ( slope is increased for different supplies. Analytically, the relabecause of an absolute error in the current tive error in
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
97
(a)
(b) Fig. 7. Realization of a six-segment staircase function: (a) cell structure and (b) PSpice simulation.
source is equal to . Hence, this error can be reduced by using sufficiently large values for . Worth noting is that the dominant factor limiting the linear op, eration of the cell under low supplies is the MOS transistor which rapidly enters its triode region. With the generic models of NPN and MOS transistors used in simulations, the bandwidth was around 1.6 MHz, as shown in Fig. 6, of the cell at . and extends to 2.6 MHz at B. Synthesis of Piecewise-Linear Functions Having characterized the performance of the proposed cell, the student proceeded to synthesis of some complex piecewise-linear current transfer characteristics. First, a six-segment staircase is realized via using six cells, connected as shown
in Fig. 7(a). The slopes of the odd-numbered cells all equal ( 1 mA, 0.2 mA); whereas the slopes of the ( 1 mA, 0.2 mA). even-numbered cells are all One needs to displace the beginning of each segment to the end of the previous one by using external displacement currents . The values used here are 0, 35 A, 80 A, 100 A, 150 A, and 170 A for the six cells, respectively. Evidently, 1.5 mA is common for all cells, as is the input current . PSpice simulation of the obtained staircase is shown in Fig. 7(b). Next, a four-segment function is synthesized by removing cells 5 and 6 from Fig. 7(a). The slopes of the four segments ( 200 A, 1 mA), were chosen to be ( 400 A, 1 mA), ( 800 A, 1 mA), and ( 650 A, 1 mA), respectively.
98
IEEE TRANSACTIONS ON EDUCATION, VOL. 47, NO. 1, FEBRUARY 2004
(a)
(b) Fig. 8.
PSpice simulations of four-segment, piecewise-linear functions: (a) with arbitrary slopes and (b) double-triangle characteristics.
To generate the characteristics shown in Fig. 8(a), the displacement currents were 0, 250 A, 500 A, and 700 A for cell 1 to cell 4, respectively. We might as well equate the positive and negative slopes to obtain the double-triangle characteristics shown in Fig. 8(b), used in many fuzzy-logic applications. Worth noting is that realizing such current input/output nonlinear functions using op amps, operational transconductance amplifiers (OTAs) , or similar devices is rather difficult and complicated. The best choice is to revert to basic transistor cells in this case; the contribution of the translinear principle is hence pronounced.
IV. CONCLUSION The findings of a single student assigned a research-based junior design project concerned with synthesizing current-mode piecewise-linear functions were presented. The student also was able to modify his cell in order to realize arbitrary power law ; . functions, obtaining the relation Some observations are as follows. • The prolonged extensive reading period at the beginning of a research-based project is vital. The duty of the supervisor is to make sure the student is not lost in details beyond his or her capabilities at this stage.
HALALU AND ELWAKIL: RESEARCH-ORIENTED JUNIOR/SENIOR DESIGN PROJECTS
• Smoothly introducing the student to the periodicals and scientific journals common in this area of research is important.
99
[12] M. T. Abuelma’atti and S. M. Abed, “A translinear circuit for piecewiselinear approximations of nonlinear functions,” Microelectron. J., vol. 29, pp. 441–444, 1998.
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Wael M. Halalu (S’03) was born in Abu Dhabi, United Arab Emirates. He received the B.Sc. degree in electrical engineering from the Department of Electrical and & Electronic Engineering at Sharjah University, United Arab Emirates, in 2003. He is currently working toward the M.Sc. degree. He is currently an Engineer with the Abu Dhabi Etisalat company.
Ahmed S. Elwakil (M’03) was born in Cairo, Egypt. He received the B.Sc. and M.Sc. degrees from the Department of Electronics and Communications at Cairo University, Cairo, Egypt, in 1995 and 1997, respectively, and the Ph.D. degree from the Department of Electrical and Electronic Engineering, the National University of Ireland, Dublin, in 2000. Since September 2000, he has been with the Department of Electrical and Electronic Engineering, Sharjah University, United Arab Emirates, as an Assistant Professor. He has also served as an Instructor for a number of courses on basic very large scale integrated (VLSI) design organized by the United Nations University (UNU) and the International Centre for Theoretical Physics (ICTP). His research interests primarily include the areas of analog circuit design, circuit theory, nonlinear dynamics, and chaos theory. He is author and coauthor of more than 60 publications in these areas. Dr. Elwakil is a Member of the IEEE Technical Committee on Nonlinear Circuits and has served as a Reviewer and Review Committee Member for many journals and international conferences. He has also served as an Associate Member of the ICTP, an Associate Member of the Centre for Chaos Control and Synchronization at the City University of Hong Kong, and a Member of the Institution of Electrical Engineers (IEE).
