Unified Predictive Transition Current Mode Control ... - Semantic Scholar
A Family of Predictive Digital-Controlled PFC under Boundary Current Mode Control Yen-Shin Lai, Senior Member, IEEE Chia-An Yeh, Student Member, IEEE Kung-Min Ho Center for Power Electronics Technology, National Taipei University of Technology Corresponding Author: Prof. Yen-Shin Lai, E-mail: [email protected] Abstract- One of the advantages of power factor corrector with boundary current mode control is the reduction of reversal recovery loss of diode. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading edge modulation, trailing edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high frequency A/D converter for current sampling is required for the proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is with 250 W power rating, 100 V/AC/50 Hz input and 385 V/DC output. Experimental results demonstrate the effectiveness of the proposed predictive digital-controlled PFC under boundary current mode control.
Ts [n]
The nth switching period
VAC (t ) Vin (t ) Vout (t ) I L (t ) L LN La Cin C S Vm [n]
Input voltage Rectified voltage Output voltage Inductor current Boost inductor Nominal inductance of boost inductor Actual inductance of boost inductor
I L,valley [n]
Input capacitor Output capacitor Power device Peak value of carrier for the nth switching period The nth sampled valley inductor current
I L, peak [n]
The nth sampled peak inductor current
I L, avg [n]
The nth sampled average inductor current
Vˆin
Peak value of input voltage
Vin [n] Vout [n]
The nth sampled input voltage The nth sampled output voltage
"Copyright (c) 2009 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected]."
Ts , La Theo [n]
The nth switching period, theoretical,
Toff , DSP, predicted [n]
L = La The nth off time predicted by DSP,
Ts , DSP, predicted [n]
L = LN The nth switching period predicted by
Current slope during turn-off period The nth off time, theoretical, L = La
I. INTRODUCTION Power factor correction technique has been widely used in AC to DC switching mode power conversion system. The PFC can reduce the harmonics of line current and improve power factor by unity power factor control to meet the requirement of international standards [1]. In order to achieve unity power factor and high efficiency, several topologies and control methods are analyzed [2]-[32]. The reduction of reversal recovery loss of diode is one of the most intensive research topics. One way is to use silicon carbide diode at the expense of more cost [3], [4]. Alternative approaches to the reduction of reversal recovery loss include the control of discontinuous current mode [5]-[8] and boundary current mode [9]-[16], [24]. The basic principle is to turn on the power device at zero current to achieve zero current switching (ZCS). ZCS can be achieved via discontinue current mode control. However, it is more suitable for low power application due to current stress and EMI issue. Boundary current mode control for PFC applications not only can reduce the reverse recovery loss of diode without using high cost silicon carbide diode but also improve the EMI issue. For conventional boundary current mode control realized using analog circuit as shown in Fig. 1, zero-current detection is required. Zero-crossing detection can be achieved using Hall sensor or coupled inductor [12]-[15]. For boundary current mode control method, the inductor current and duty are shown in Fig 2. As shown in Fig. 2, the power device is turned on as inductor current equal to zero and thereby reducing the reversal recovery loss of diode. The power device is turned on at the beginning of every switching period, retained during the on-time period which is controlled by voltage loop controller, and turned off-time is determined when the inductor current becomes zero. Analog-controlled PFC with boundary current mode control has been proposed in [9]-[17]. Digital control is with some advantages, including less discrete-component count, no aging issue for the compensator components, higher
NOMENCLATURE The nth on time The nth off time
Current slope during turn-on period
DSP, L = LN
Index Terms- Digital control, Boundary current mode control, Power factor correction
Ton [n] Toff [n]
m1 m2 Toff , La Theo [n]
1
flexibility and fast time-to-market. One of the feasible applications of DSP-based digital-controlled power converter is server power which requires high performance, e.g. higher efficiency under light load, and power management. Therefore, digital controlled power factor corrector has received more attention for research and industrial applications [24]-[32]. For digital-controlled implementation, the sampling frequency of A/D converter significantly affects the performance as illustrated in Fig. 3. In Fig. 3(A), the inductor current marked by dash line indicates the ideal case and solid line is the real inductor current controlled by digital approach with sampling delay. As shown in Fig. 3(A), the sampling frequency, Ts, of A/D converter is low, and thereby resulting in DCM operation of inductor current. Therefore, the current ripple will be significantly increased. Dramatic increase of sampling frequency of A/D converter is one of the potential solutions to cope with this issue as shown in Fig. 3(B). However, as shown in Fig. 3(B), there still exists an error between two approaches even though the sampling frequency, 1/Ts, is much higher than the switching frequency. The requirement of high sampling A/D converter contributes to the increase of cost. In [20], one-cycle controller with variable switching frequency control for three-phase interleaved PFC is reported. However, four timers are required for realization and the duty is updated every four switching periods which may result in discontinuous current conduction mode as shown in that paper. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading edge modulation, trailing edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high frequency A/D converter for current sampling is required for the proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation.
(A). Low sampling frequency
(B). High sampling frequency Fig. 3 Effect of sampling frequency of A/D converter on inductor current waveforms
II. DIGITAL PULSE-WIDTH METHODS For the development to follow, a brief introduction of digital pulse-width is given. Fig. 4 shows the sampling instants, modulating signals, sampled modulating signals, carrier and PWM waveforms for three DPWM methods. As shown in Fig. 4 (A) for digital trailing-edge modulation, carrier and sampled modulating signal are used to modulate the trailing edge of PWM waveform. PWM is turned on at the beginning of every switching period and kept high level until carrier is greater than the sampled modulating signal. Since the sampled modulated signal is modulated D[n]·Ts after it is sampled, the trailing-edge modulation contributes time delay D[n]·Ts, which is noted e sDnT in small-signal model. Fig. 4 (B) shows the leading-edge modulation of DPWM. The carrier decreases from its maximum value to minimum within a switching period. DPWM pulse is turned off at the beginning of a switching period and kept low level until sampled modulating signal is greater than the carrier. Therefore, the leading-edge of PWM pulses is modulated. Since the modulated signal is modulated with (1-D[n])·Ts delay, the leading-edge modulation contributes time delay (1-D[n])·Ts, which is noted e s1 DnT in small-signal model. Fig. 4 (C) shows the triangular modulation (also called symmetric-on-time modulation) of DPWM. The carrier decreases from its maximum value to zero and then increased to its maximum value again within a switching period. DPWM pulse is turned on when the sampled signal is greater than carrier and turned off when carrier is greater than the sampled modulating signal. Therefore, both leading-edge and trailing-edge of PWM pulses are modulated. Since the modulating signal sampled at the beginning of the switching period is modulated after (1-D[n])/2·Ts and (1+D[n])/2·Ts later, the triangular modulation contributes to time delay (1-D[n])/2·Ts and (1+D[n])/2·Ts which are expressed by s
s
Fig.1 Conventional boundary current mode controlled PFC converter
Fig. 2 Typical inductor current and duty waveforms
2
1 s1 D / 2Ts e e s1 D / 2Ts 2
Table 1 Modulation delay of DPWM and allowed calculation time for software-based compensator, Tcm
in small-signal model.
Table 1 shows modulation delay caused by DPWM and the allowed calculation time for software-based compensator calculation, Tcm=DTs. For example, the calculation time of software-based compensator with trailing-edge modulation DPWM should be less than Tcm=DTs. Otherwise the output duty will be extended as compared to its command and thereby resulting in duty error.
Modulation Method
Modulation delay
Tcm
Trailing-edge
e sDTs
D Ts
Leading-edge
e s 1 D Ts
1 D Ts
Triangle
1 s e 2
1 D Ts 2
e
s
1 D Ts 2
1 D Ts
2
II. PROPOSED FAMILY OF DIGITAL-CONTROLLED BOUNDARY CURRENT MODE CONTROL TECHNIQUE Fig. 5 shows the proposed family of digital-controlled boundary current mode PFC boost converter system. As shown in Fig. 5, the voltage error between the reference and its feedback value gives the on-time command via PI controller. The switching period is predicted as summarized in Table 2 for three DPWM methods and the duty cycle can be determined according to predicted switching period and on-time command. Based upon Table 2, Fig. 6 shows the predicted switching period of PFC with boundary current mode control under steady state condition. As shown in Table 3 and Fig. 6, the switching period, Ts, consists of two parts. One is contributed by the sensed current and the other one is produced by voltage control loop. The later will be affected by the low order harmonics of input voltage which results in more harmonics distortion in the converter output. The only exception is for the case of leading edge modulation which is with Ton only without containing the input voltage term for the voltage control loop term of Ts as shown in Table 3 and Fig. 6.
(A). Trailing edge modulation
(B). Leading edge modulation
Fig. 5 Proposed family of digital-controlled BCM PFC boost converter Table 2 Predictive switching period for boundary current mode control
Predictive switching period, Ts Trailing-edge
Ts [n 1]
[1
Modulation Leading-edge Modulation Triangular (C) Triangular modulation Fig. 4 Digital pulse-width modulation methods
Modulation 3
L I L ,valley [n] Vout [n] Vin [n]
Ts [n 1]
Vin [n] ]Ton [n] Vout [n] Vin [n]
L I L, peak [n] Ton [n] Vout [n] Vin [n]
Ts [n 1]
L I L ,avg [n] Vout [n] Vin [n] [1
Vin [n] ]Ton [n] 2(Vout [n] Vin [n])
The (n)th off-time can be obtained by (2) as: Toff [n]
m 1 I L,vally [n] 1 Ton [n] m2 m2
(3)
Since the switching frequency for PFC control is greater than the line frequency, the following conditions can be assumed: Ts [n 1] Ts [n]
(4)
By (3) and (2), the (n+1)th off-time is the same as that of the (n)th off-time shown in (5). Toff [n 1] Toff [n] (A) . Trailing edge modulation
(5)
According to (5) the (n+1)th off-time can be derived as: Toff [n 1]
m 1 I L,valley [n] 1 Ton [n] m2 m2
(6)
The (n+1)th switching period can be determined by: Ts [n 1]
m 1 I L,valley [n] (1 1 )Ton [n] m2 m2
(7)
In PFC boost converter, the current slopes in (n)th cycle are: m1
Vˆin sin t Vin [n] L L
(8)
m2
Vout Vˆin sin t Vout [n] Vin [n] L L
(9)
(B). Leading edge modulation
Where Vˆin peak value of input voltage Vin [n] n th sampled input voltage Vout [n] n th sampled output voltage L input inductor By (7)-(9), the switching period for boundary current mode control is given by: (C). Triangular modulation Fig. 6 Predicted switching period of PFC with boundary current mode control, Vin=100 Vac, Vout=385 Vdc
Ts [n 1]
As shown in (10), the next switching period to achieve boundary current mode control is determined by input voltage (Vin), output voltage (Vout), input inductor (L) and valley inductor current (IL,valley).
The switching period of digital-controlled PFC with boundary current mode control using three DPWM methods is derived as follows. A. Trailing-edge modulation Fig. 7 shows the relationship among sampled valley current ( IL,valley[n] ), sampling instant and PWM waveforms with trailing-edge modulation. As shown in Fig. 7, an error between the reference (dash line) and inductor current (solid line) under transient condition can be removed by controlling the switching period properly. Under steady state, the (n+1) th on-time command is the same as that of its previous one as shown by: Ton [n 1] Ton [n]
B. Leading-edge modulation Fig. 8 shows the relationship among sampled peak current ( IL,peak[n] ), sampling instant and PWM waveforms with leading-edge modulation. To achieve zero current switching, the following equation can be derived from Fig. 8 by sampling peak inductor current. I L, peak [n] m2Toff [n] 0
(11)
By (8)-(9) and (11), the switching period for boundary current mode control is given by:
(1)
Since the switching frequency for PFC control is greater than the line frequency, the following conditions can be assumed: Ts [n 1] Ts [n]
Vin [n] L I L,valley [n] (1 ) Ton [n] (10) Vout [n] Vin [n] Vout [n] Vin [n]
Ts [n 1]
(2)
4
L I L, peak [n] Ton [n] Vout [n] Vin [n]
(12)
Fig. 7 Sampled current ( IL,valley[n] ) and sampling instant, boundary current mode control, trailing-edge modulation
Fig. 9 Sampled current (IL,avg[n] ) and sampling instant, boundary current mode, triangular modulation
III. PARAMETER VARIATION Parameter variation and its effect on stability analysis have been presented [36]-[41] for DC/DC converters. Slope prediction technique is proposed to solve these issues for DC/DC converters as shown in [36]-[39]. As shown in previous research results, the input voltage is regarded as constant during several consecutive sampled periods since the switching frequency for PFC control is greater than the line frequency. Moreover, as the output voltage of converter is well-regulated, the parameter variation issue for the presented technique is dominated by inductance of boost inductor. Fig. 10 shows the effect of inductance variation. As shown in Fig. 10 (A) for the ideal case, La =LN , boundary current mode can be achieved. In contrast, as shown in Fig. 10 (B) for La < LN , the predicted turn-off time, Toff , DSP -predicted [n] , and switching period, Ts , DSP -predicted [n] , as calculated using (10), (12) and (14) based upon the nominal inductance, LN, will be greater than its theoretical counter parts based upon the real inductance, La. Therefore, discontinuous current conduction mode occurs. Similarly, for La >LN , continuous current conduction will happen as shown in Fig. 10 (C). These issues caused by inductance variation for the master PFC converter can be coped by on-line parameter tuning method as illustrated in [35] [37]. As shown in [35] [37], the method is simple and only one additional A/D sampling is required for parameter tuning.
Fig. 8 Sampled current ( IL,peak[n] ) and sampling instant, boundary current mode control, leading-edge modulation
C. Triangular modulation Fig. 9 shows the relationship among sampled average current ( IL,avg[n] ), sampling instant and PWM waveforms with triangular modulation. To achieve zero current switching, the following equation can be derived from Fig. 9 by sampling average inductor current. I L,avg [n] m1
Ton [n] m2Toff [n] 0 2
(13)
By (8)-(9) and (13), the switching period for boundary current mode control is given by:
Ts [n 1]
Vin [n] L I L,avg [n] [1 ]Ton [n] Vout [n] Vin [n] 2(Vout [n] Vin [n]) (14)
(A). La = LN
5
Dividing (20) by I L [n] yields
I L [n 2] I L [n 1] m2 (Toff toff [n 1]) m1Ton (21) I L [n] I L [n] I L [n] Subtracting (18) into (21) gives
I L [n 2] I L [n 1] m2 toff [n 1] I L [n] I L [n] I L [n]
(22)
Substituting (19) and (16) into (22) gets
I L [n 2] 11 0 I L [n]
(B). La < LN.
(23)
Equation (23) shows that the variation of sampled current will be converged to zero in the (n+2)th switching period. In the (n+3)th switching period, the inductor current operates in DCM and the variation of inductor current is zero during toff [n 2] . Therefore, the variation of sampled current can be obtained as:
I L [n 3] I L [n 2] m2Toff m1Ton
(24)
Subtracting (18) into (24) gives
I L [n 3] I L [n 2] 0
The relationship between I L [n 3] and I L [n] can be derived by (25) as
(C). La > LN.
I L [n 3] I L [n 2] 0 I L [n] I L [n]
Fig. 10 Effects of inductance variation
IV. STABILITY ANALYSIS Fig. 11 shows the inductor current waveform with disturbance. As shown in Fig. 11, the variation of sampled current for the (n+1)th can be obtained as:
I L [n 1] I L [n] m2Toff m1Ton
(25)
(26)
Therefore, for the proposed control method, the variation of sampled current caused by disturbance will be converged to zero after two switching cycles with trailing-edge modulation, leading-edge modulation and triangular modulation.
(15)
According to (4), the variation of turn-off time for the (n+1)th witching period, toff [n 1] can be derived as follows.
toff [n 1]
I L [n] m2
(16)
Dividing (15) by I L [n] gives
I L [n 1] I L [n] m2Toff m1Ton I L [n] I L [n] I L [n]
(17) Fig. 11 Inductor current waveform with/without disturbance
V. EXPERIMENTAL SYSTEM AND RESULTS The specifications of the digital-controlled AC/DC converter are shown in Table 3. The input voltage is 100 V AC and the output voltage is 385 V DC. The switching frequency varies from 25 kHz to 100 kHz and the output power is 250W. The input inductance is 410μH and the output capacitance is 330μF. Fig. 12 shows the block diagram of the experimental system. As shown in Fig. 12, a digital signal processor TI DSP TMS320F28335 is used as the digital controller to realize the boundary current mode PFC control in software, witch has built-in digital PWM, A/D converters, and 32-bit float-point computational.
Under steady state, the inductor current is given by
m1Ton m2Toff
(18)
Subtracting (17) into (16) yields
I L [n 1] 1 I L [n]
(19)
Similarly, the variation of turn-off time for the (n+2)th witching period, toff [n 2] can be obtained as follows.
I L [n 2] I L [n 1] m2 (Toff toff [n 1]) m1Ton
(20) 6
TABLE 3 Specifications of BCM PFC converter Input Voltage
100Vac/50Hz
Output Voltage
385Vdc
Output Power
250W
Switching Frequency
25kHz ~ 100kHz
Inductor value
410μH
Capacitor value
330μF
Control device
TMS320F28335
DSP_CLK
100 MHz
DPWM resolution
12 bits
ADC resolution
(3.3V/4095) 12 bits
(A) (B) Fig. 14 Experimental results, leading-edge modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
(A) (B) Fig. 15 Experimental results, triangular modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
Experimental results of dynamic response to step load changing from 70% to 100% of full load and vice versa are shown in Fig. 16 to Fig. 18. As shown in Fig. 16, the output voltage ripple (36.2 V) is less than 4.6% for trailing-edge modulation. Fig. 17 shows the output voltage ripple (40 V) is less than 5.19 % under leading-edge modulation and Fig. 18 shows the output voltage ripple (28 V) is less than 3.6 % under triangular modulation. Therefore, predictive boundary current mode control with triangular modulation has superior dynamic performance. The potential reason for this is triangular modulation results in the smallest modulation delay as shown in [33], [34]. Fig. 19 shows the measured results of efficiency, power factor and THD of input current. As shown in Fig. 19(A), the maximum efficiency is more than 96%. Fig. 19(B) shows the power factor which is higher than 0.98 for the predictive boundary current mode control with three modulation methods. Fig. 19 (C) shows the THD of input current for the proposed family of digital-controlled predictive PFC under BCM. As shown in Fig. 19 (C), the THD of input current for leading-edge modulation is superior to the others. This feature can be contributed by its switching period which has less low order components reflected by the input voltage as summarized in Table 2. In contrast, as summarized in Table 2, switching period for trailing edge modulation has the most significant low order components reflected by the input voltage which contributes to the deterioration of THD. Fig. 20 shows the comparison results of individual harmonics versus IEC 61000-3-2 Class D specifications [1]. As shown in Fig. 20, the harmonics for the proposed control method are lower than those required for Class D specifications under light-load and full-load conditions. These experimental results demonstrate the effectiveness of the proposed unified predictive boundary current mode control
Fig. 12 Experimental system
Fig. 13 to Fig. 15 show the experimental results under full load condition with trailing-edge modulation, leading-edge modulation and triangular modulation, respectively. As shown in Fig. 13, the inductor current is sampled at valley of current under trailing-edge modulation. The inductor current is operated in boundary current mode. Moreover, as shown in Fig. 13, the inductor current and input voltage are in phase demonstrating good power factor results. Similar results can be confirmed by the experimental results shown in Fig. 14 and Fig. 15 for the leading-edge modulation and triangular modulation, respectively.
(A) (B) Fig. 13 Experimental results, trailing-edge modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
7
digital-controlled power factor corrector.
(A) Efficiency
Fig. 16 Dynamic response, experimental results, trailing-edge modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(B)Power factor
Fig. 17 Dynamic response, experimental results, leading-edge modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(C) THD of input current Fig. 19 Experimental results
Fig. 18 Dynamic response, experimental results, triangular modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(A) Light-load = 75W
8
[1].
[2].
[3].
[4].
[5]. (B) Full-load = 250W Fig. 20 Experimental results
VI. CONCLUSION The contributions of this paper include: Proposal of a family of predictive control techniques for digital-controlled PFC to achieve BCM Analysis of parameter variation and stability of the proposed family of predictive control techniques Theoretical analysis and experimental comparisons of the family of predictive control techniques
[6].
The special features of the proposed predictive control technique includes not requiring zero crossing detection of current and no need of fast A/D converter. Theoretical analysis and experimental comparisons show that the THD of input current for predictive digital-controlled PFC with BCM based upon leading-edge modulation is superior to the others. This feature can be contributed by the switching period of the method which has less low order harmonic components reflected the input voltage. And the predictive digital-controlled PFC with BCM based upon triangular modulation provides the best dynamic response contributed by less delay of DPWM.
[9].
[7].
[8].
[10].
[11].
[12].
[13].
Appendix I Switching frequency vs. DC-link voltage level for trailing edge modulation [14].
Fig. A. 1 shows the relationship of switching frequency and DC-link voltage level. These curves are derived by the formula shown in Table 2 for the trailing edge modulation case. As shown in Fig. A. 1, when the dc-link voltage is lower, the boost ratio is reduced and TCM can be retained by reducing the switching frequency.
[15].
[16].
[17].
[18].
[19].
[20].
[21]. Fig. A.1 Switching frequency as DC voltage varies, trailing-edge modulation.
9
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M. M. Jovanovic´, and Y. Jang, “State-of-the-art, single-phase, active power-factor-correction techniques for high-power applications—an overview.” IEEE Trans. on Industrial Electronics, Vol. 52, No.3, pp.701 – 708, June, 2005. A. A. M. Bento and E. R. C. Silva, “Hybrid one-cycle controller for boost PFC rectifier,” IEEE Trans on Industry Applications, Vol. 45, No. 1, pp. 268-277, Jan., 2009. J. Zhihong and L. Hui, “DSP Control of interleaving critical PFC module for high power application,” IEEE IECON, pp. 712-716, Nov., 2008. S. Choudhury and J. P. Noon, ”A DSP based digitally controlled interleaved PFC converter,” IEEE APEC, Vol. 1, pp. 648-654, 2005. J. Chen, A. Prodi´c, R. Erickson, and D. Maksimovi´c, “Predictive digital current programmed control,” IEEE Trans. on Power Electronics, Vol. 18, No. 1, pp. 411-419, Jan., 2003. P. Athalye, D. Maksimovic and R. Erickson, “Variable-frequency predictive digital current mode control,” IEEE Power Electronics letters, Vol. 2, No. 4, pp. 113-116, Dec., 2004. F. Z. Chen and D. Maksimovic, “Digital control for improved efficiency and reduced harmonic distortion over wide load range in boost PFC rectifiers,” IEEE Trans. on Power Electronics, Vol.25, No. 10, pp. 2683-2692, 2010. L. Roggia, J. E. Baggio and J. R. Pinheiro, “Predictive current controller for a power factor correction boost converter operating in mixed conduction mode,” IET Power Electronics and Applications, pp.1-10, Sep., 2009. J. M. Wang, S. T. Wu, Y. F. Jiang and H. J. Chiu, “A dual-mode controller for the boost PFC converter,” IEEE Trans. on Industrial Electronics, Vol. 58, No. 1, pp.369-372, Jan., 2011. K. Y. Lee, H. Y. Hsu and Y. S. Lai, “Simple digital-controlled AC/DC converter with power factor correction for universal input applications,“ IEEE IECON, pp. 1749-1754, 2007. D. G. Lamar, A. Fernandez, M. Arias, M. Rodriguez, J. Sebastian and M. M. Hernando, “A unity power factor correction pre-regulator with fast dynamic response based on a low-cost microcontroller,” IEEE Trans. on Power Electronics, Vol. 23, No. 2, pp. 635-642, Mar., 2008. W. Qiu, G. Miller, and Z. Liang, “Dual-edge pulse width modulation scheme for fast transient response of multiple-phase voltage regulators,” in Proc. IEEE Power Electronics Specialists Conference, pp.1563-1569, 2007. D. M. Van de Sype, K. De Gusseme, A. P. Van den Bossche and J. A. Melkebeek, “Small-signal Laplace-domain analysis of uniformly-sampled pulse-width modulators,” in Proc. IEEE Power Electronics Specialists Conference, Vol. 6, pp.4292-4298, Jun., 2004. Y. T. Chang and Y. S. Lai, “Parameter tuning method for digital power converter with predictive current mode control,” IEEE Trans. on Power Electronics, Vol. 24, No. 12, pp. 2910-2919, Dec., 2009. Y. S. Lai and C. A. Yeh, “Predictive digital-controlled converter with peak current mode control and leading edge modulation,” IEEE Trans. on Industrial Electronics, Vol. 56, No.6, pp.1854-1863, June, 2009. Y. T. Chang and Y. S. Lai, “On-line parameter tuning technique for predictive current mode control operating in boundary conduction mode,” IEEE Trans. on Industrial Electronics, Vol. 56, No. 8, pp. 3214-3221, Aug., 2009. S. Chattopadhyay and S. Das, “A digital current-mode control technique for DC-DC converters,” IEEE Trans. on Power Electronics, Vol. 21, No. 6, pp.1718-1726, Nov., 2006. J. W. Kimball, J. T. Mossoba and P. T. Krein, “A stabilizing, high-performance controller for input series-output parallel converters,” IEEE Trans. on Power Electronics, Vol. 23, No. 3, pp.1416-1427, May, 2008. J. W. Kimball and P. T. Krein, “Singular perturbation theory for DC–DC converters and application to PFC converters,” IEEE Trans. on Power Electronics, Vol. 23, No. 6, pp.2970-2981, Nov., 2008. M. Ferdowsi, A. Emadi, M. Telefus and A. Shteynberg, “Suitability of pulse train control technique for BIFRED converter,” IEEE Trans. on Aerospace and Electronic Systems, Vol. 41, No. 1, pp.181-189, Jan., 2005.
10
Ts [n]
The nth switching period
VAC (t ) Vin (t ) Vout (t ) I L (t ) L LN La Cin C S Vm [n]
Input voltage Rectified voltage Output voltage Inductor current Boost inductor Nominal inductance of boost inductor Actual inductance of boost inductor
I L,valley [n]
Input capacitor Output capacitor Power device Peak value of carrier for the nth switching period The nth sampled valley inductor current
I L, peak [n]
The nth sampled peak inductor current
I L, avg [n]
The nth sampled average inductor current
Vˆin
Peak value of input voltage
Vin [n] Vout [n]
The nth sampled input voltage The nth sampled output voltage
"Copyright (c) 2009 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected]."
Ts , La Theo [n]
The nth switching period, theoretical,
Toff , DSP, predicted [n]
L = La The nth off time predicted by DSP,
Ts , DSP, predicted [n]
L = LN The nth switching period predicted by
Current slope during turn-off period The nth off time, theoretical, L = La
I. INTRODUCTION Power factor correction technique has been widely used in AC to DC switching mode power conversion system. The PFC can reduce the harmonics of line current and improve power factor by unity power factor control to meet the requirement of international standards [1]. In order to achieve unity power factor and high efficiency, several topologies and control methods are analyzed [2]-[32]. The reduction of reversal recovery loss of diode is one of the most intensive research topics. One way is to use silicon carbide diode at the expense of more cost [3], [4]. Alternative approaches to the reduction of reversal recovery loss include the control of discontinuous current mode [5]-[8] and boundary current mode [9]-[16], [24]. The basic principle is to turn on the power device at zero current to achieve zero current switching (ZCS). ZCS can be achieved via discontinue current mode control. However, it is more suitable for low power application due to current stress and EMI issue. Boundary current mode control for PFC applications not only can reduce the reverse recovery loss of diode without using high cost silicon carbide diode but also improve the EMI issue. For conventional boundary current mode control realized using analog circuit as shown in Fig. 1, zero-current detection is required. Zero-crossing detection can be achieved using Hall sensor or coupled inductor [12]-[15]. For boundary current mode control method, the inductor current and duty are shown in Fig 2. As shown in Fig. 2, the power device is turned on as inductor current equal to zero and thereby reducing the reversal recovery loss of diode. The power device is turned on at the beginning of every switching period, retained during the on-time period which is controlled by voltage loop controller, and turned off-time is determined when the inductor current becomes zero. Analog-controlled PFC with boundary current mode control has been proposed in [9]-[17]. Digital control is with some advantages, including less discrete-component count, no aging issue for the compensator components, higher
NOMENCLATURE The nth on time The nth off time
Current slope during turn-on period
DSP, L = LN
Index Terms- Digital control, Boundary current mode control, Power factor correction
Ton [n] Toff [n]
m1 m2 Toff , La Theo [n]
1
flexibility and fast time-to-market. One of the feasible applications of DSP-based digital-controlled power converter is server power which requires high performance, e.g. higher efficiency under light load, and power management. Therefore, digital controlled power factor corrector has received more attention for research and industrial applications [24]-[32]. For digital-controlled implementation, the sampling frequency of A/D converter significantly affects the performance as illustrated in Fig. 3. In Fig. 3(A), the inductor current marked by dash line indicates the ideal case and solid line is the real inductor current controlled by digital approach with sampling delay. As shown in Fig. 3(A), the sampling frequency, Ts, of A/D converter is low, and thereby resulting in DCM operation of inductor current. Therefore, the current ripple will be significantly increased. Dramatic increase of sampling frequency of A/D converter is one of the potential solutions to cope with this issue as shown in Fig. 3(B). However, as shown in Fig. 3(B), there still exists an error between two approaches even though the sampling frequency, 1/Ts, is much higher than the switching frequency. The requirement of high sampling A/D converter contributes to the increase of cost. In [20], one-cycle controller with variable switching frequency control for three-phase interleaved PFC is reported. However, four timers are required for realization and the duty is updated every four switching periods which may result in discontinuous current conduction mode as shown in that paper. This paper proposes a family of predictive methods adapted to digital pulse-width modulations for digital-controlled PFC operated under boundary current mode. The DPWM methods include leading edge modulation, trailing edge modulation and triangular modulation. For the proposed control method, the switching period retaining zero current switching is predicted and the turn-on period is determined by the voltage controller. Therefore, neither zero-current detection nor high frequency A/D converter for current sampling is required for the proposed control method. Experimental results derived from a DSP-based controller are presented for confirmation.
(A). Low sampling frequency
(B). High sampling frequency Fig. 3 Effect of sampling frequency of A/D converter on inductor current waveforms
II. DIGITAL PULSE-WIDTH METHODS For the development to follow, a brief introduction of digital pulse-width is given. Fig. 4 shows the sampling instants, modulating signals, sampled modulating signals, carrier and PWM waveforms for three DPWM methods. As shown in Fig. 4 (A) for digital trailing-edge modulation, carrier and sampled modulating signal are used to modulate the trailing edge of PWM waveform. PWM is turned on at the beginning of every switching period and kept high level until carrier is greater than the sampled modulating signal. Since the sampled modulated signal is modulated D[n]·Ts after it is sampled, the trailing-edge modulation contributes time delay D[n]·Ts, which is noted e sDnT in small-signal model. Fig. 4 (B) shows the leading-edge modulation of DPWM. The carrier decreases from its maximum value to minimum within a switching period. DPWM pulse is turned off at the beginning of a switching period and kept low level until sampled modulating signal is greater than the carrier. Therefore, the leading-edge of PWM pulses is modulated. Since the modulated signal is modulated with (1-D[n])·Ts delay, the leading-edge modulation contributes time delay (1-D[n])·Ts, which is noted e s1 DnT in small-signal model. Fig. 4 (C) shows the triangular modulation (also called symmetric-on-time modulation) of DPWM. The carrier decreases from its maximum value to zero and then increased to its maximum value again within a switching period. DPWM pulse is turned on when the sampled signal is greater than carrier and turned off when carrier is greater than the sampled modulating signal. Therefore, both leading-edge and trailing-edge of PWM pulses are modulated. Since the modulating signal sampled at the beginning of the switching period is modulated after (1-D[n])/2·Ts and (1+D[n])/2·Ts later, the triangular modulation contributes to time delay (1-D[n])/2·Ts and (1+D[n])/2·Ts which are expressed by s
s
Fig.1 Conventional boundary current mode controlled PFC converter
Fig. 2 Typical inductor current and duty waveforms
2
1 s1 D / 2Ts e e s1 D / 2Ts 2
Table 1 Modulation delay of DPWM and allowed calculation time for software-based compensator, Tcm
in small-signal model.
Table 1 shows modulation delay caused by DPWM and the allowed calculation time for software-based compensator calculation, Tcm=DTs. For example, the calculation time of software-based compensator with trailing-edge modulation DPWM should be less than Tcm=DTs. Otherwise the output duty will be extended as compared to its command and thereby resulting in duty error.
Modulation Method
Modulation delay
Tcm
Trailing-edge
e sDTs
D Ts
Leading-edge
e s 1 D Ts
1 D Ts
Triangle
1 s e 2
1 D Ts 2
e
s
1 D Ts 2
1 D Ts
2
II. PROPOSED FAMILY OF DIGITAL-CONTROLLED BOUNDARY CURRENT MODE CONTROL TECHNIQUE Fig. 5 shows the proposed family of digital-controlled boundary current mode PFC boost converter system. As shown in Fig. 5, the voltage error between the reference and its feedback value gives the on-time command via PI controller. The switching period is predicted as summarized in Table 2 for three DPWM methods and the duty cycle can be determined according to predicted switching period and on-time command. Based upon Table 2, Fig. 6 shows the predicted switching period of PFC with boundary current mode control under steady state condition. As shown in Table 3 and Fig. 6, the switching period, Ts, consists of two parts. One is contributed by the sensed current and the other one is produced by voltage control loop. The later will be affected by the low order harmonics of input voltage which results in more harmonics distortion in the converter output. The only exception is for the case of leading edge modulation which is with Ton only without containing the input voltage term for the voltage control loop term of Ts as shown in Table 3 and Fig. 6.
(A). Trailing edge modulation
(B). Leading edge modulation
Fig. 5 Proposed family of digital-controlled BCM PFC boost converter Table 2 Predictive switching period for boundary current mode control
Predictive switching period, Ts Trailing-edge
Ts [n 1]
[1
Modulation Leading-edge Modulation Triangular (C) Triangular modulation Fig. 4 Digital pulse-width modulation methods
Modulation 3
L I L ,valley [n] Vout [n] Vin [n]
Ts [n 1]
Vin [n] ]Ton [n] Vout [n] Vin [n]
L I L, peak [n] Ton [n] Vout [n] Vin [n]
Ts [n 1]
L I L ,avg [n] Vout [n] Vin [n] [1
Vin [n] ]Ton [n] 2(Vout [n] Vin [n])
The (n)th off-time can be obtained by (2) as: Toff [n]
m 1 I L,vally [n] 1 Ton [n] m2 m2
(3)
Since the switching frequency for PFC control is greater than the line frequency, the following conditions can be assumed: Ts [n 1] Ts [n]
(4)
By (3) and (2), the (n+1)th off-time is the same as that of the (n)th off-time shown in (5). Toff [n 1] Toff [n] (A) . Trailing edge modulation
(5)
According to (5) the (n+1)th off-time can be derived as: Toff [n 1]
m 1 I L,valley [n] 1 Ton [n] m2 m2
(6)
The (n+1)th switching period can be determined by: Ts [n 1]
m 1 I L,valley [n] (1 1 )Ton [n] m2 m2
(7)
In PFC boost converter, the current slopes in (n)th cycle are: m1
Vˆin sin t Vin [n] L L
(8)
m2
Vout Vˆin sin t Vout [n] Vin [n] L L
(9)
(B). Leading edge modulation
Where Vˆin peak value of input voltage Vin [n] n th sampled input voltage Vout [n] n th sampled output voltage L input inductor By (7)-(9), the switching period for boundary current mode control is given by: (C). Triangular modulation Fig. 6 Predicted switching period of PFC with boundary current mode control, Vin=100 Vac, Vout=385 Vdc
Ts [n 1]
As shown in (10), the next switching period to achieve boundary current mode control is determined by input voltage (Vin), output voltage (Vout), input inductor (L) and valley inductor current (IL,valley).
The switching period of digital-controlled PFC with boundary current mode control using three DPWM methods is derived as follows. A. Trailing-edge modulation Fig. 7 shows the relationship among sampled valley current ( IL,valley[n] ), sampling instant and PWM waveforms with trailing-edge modulation. As shown in Fig. 7, an error between the reference (dash line) and inductor current (solid line) under transient condition can be removed by controlling the switching period properly. Under steady state, the (n+1) th on-time command is the same as that of its previous one as shown by: Ton [n 1] Ton [n]
B. Leading-edge modulation Fig. 8 shows the relationship among sampled peak current ( IL,peak[n] ), sampling instant and PWM waveforms with leading-edge modulation. To achieve zero current switching, the following equation can be derived from Fig. 8 by sampling peak inductor current. I L, peak [n] m2Toff [n] 0
(11)
By (8)-(9) and (11), the switching period for boundary current mode control is given by:
(1)
Since the switching frequency for PFC control is greater than the line frequency, the following conditions can be assumed: Ts [n 1] Ts [n]
Vin [n] L I L,valley [n] (1 ) Ton [n] (10) Vout [n] Vin [n] Vout [n] Vin [n]
Ts [n 1]
(2)
4
L I L, peak [n] Ton [n] Vout [n] Vin [n]
(12)
Fig. 7 Sampled current ( IL,valley[n] ) and sampling instant, boundary current mode control, trailing-edge modulation
Fig. 9 Sampled current (IL,avg[n] ) and sampling instant, boundary current mode, triangular modulation
III. PARAMETER VARIATION Parameter variation and its effect on stability analysis have been presented [36]-[41] for DC/DC converters. Slope prediction technique is proposed to solve these issues for DC/DC converters as shown in [36]-[39]. As shown in previous research results, the input voltage is regarded as constant during several consecutive sampled periods since the switching frequency for PFC control is greater than the line frequency. Moreover, as the output voltage of converter is well-regulated, the parameter variation issue for the presented technique is dominated by inductance of boost inductor. Fig. 10 shows the effect of inductance variation. As shown in Fig. 10 (A) for the ideal case, La =LN , boundary current mode can be achieved. In contrast, as shown in Fig. 10 (B) for La < LN , the predicted turn-off time, Toff , DSP -predicted [n] , and switching period, Ts , DSP -predicted [n] , as calculated using (10), (12) and (14) based upon the nominal inductance, LN, will be greater than its theoretical counter parts based upon the real inductance, La. Therefore, discontinuous current conduction mode occurs. Similarly, for La >LN , continuous current conduction will happen as shown in Fig. 10 (C). These issues caused by inductance variation for the master PFC converter can be coped by on-line parameter tuning method as illustrated in [35] [37]. As shown in [35] [37], the method is simple and only one additional A/D sampling is required for parameter tuning.
Fig. 8 Sampled current ( IL,peak[n] ) and sampling instant, boundary current mode control, leading-edge modulation
C. Triangular modulation Fig. 9 shows the relationship among sampled average current ( IL,avg[n] ), sampling instant and PWM waveforms with triangular modulation. To achieve zero current switching, the following equation can be derived from Fig. 9 by sampling average inductor current. I L,avg [n] m1
Ton [n] m2Toff [n] 0 2
(13)
By (8)-(9) and (13), the switching period for boundary current mode control is given by:
Ts [n 1]
Vin [n] L I L,avg [n] [1 ]Ton [n] Vout [n] Vin [n] 2(Vout [n] Vin [n]) (14)
(A). La = LN
5
Dividing (20) by I L [n] yields
I L [n 2] I L [n 1] m2 (Toff toff [n 1]) m1Ton (21) I L [n] I L [n] I L [n] Subtracting (18) into (21) gives
I L [n 2] I L [n 1] m2 toff [n 1] I L [n] I L [n] I L [n]
(22)
Substituting (19) and (16) into (22) gets
I L [n 2] 11 0 I L [n]
(B). La < LN.
(23)
Equation (23) shows that the variation of sampled current will be converged to zero in the (n+2)th switching period. In the (n+3)th switching period, the inductor current operates in DCM and the variation of inductor current is zero during toff [n 2] . Therefore, the variation of sampled current can be obtained as:
I L [n 3] I L [n 2] m2Toff m1Ton
(24)
Subtracting (18) into (24) gives
I L [n 3] I L [n 2] 0
The relationship between I L [n 3] and I L [n] can be derived by (25) as
(C). La > LN.
I L [n 3] I L [n 2] 0 I L [n] I L [n]
Fig. 10 Effects of inductance variation
IV. STABILITY ANALYSIS Fig. 11 shows the inductor current waveform with disturbance. As shown in Fig. 11, the variation of sampled current for the (n+1)th can be obtained as:
I L [n 1] I L [n] m2Toff m1Ton
(25)
(26)
Therefore, for the proposed control method, the variation of sampled current caused by disturbance will be converged to zero after two switching cycles with trailing-edge modulation, leading-edge modulation and triangular modulation.
(15)
According to (4), the variation of turn-off time for the (n+1)th witching period, toff [n 1] can be derived as follows.
toff [n 1]
I L [n] m2
(16)
Dividing (15) by I L [n] gives
I L [n 1] I L [n] m2Toff m1Ton I L [n] I L [n] I L [n]
(17) Fig. 11 Inductor current waveform with/without disturbance
V. EXPERIMENTAL SYSTEM AND RESULTS The specifications of the digital-controlled AC/DC converter are shown in Table 3. The input voltage is 100 V AC and the output voltage is 385 V DC. The switching frequency varies from 25 kHz to 100 kHz and the output power is 250W. The input inductance is 410μH and the output capacitance is 330μF. Fig. 12 shows the block diagram of the experimental system. As shown in Fig. 12, a digital signal processor TI DSP TMS320F28335 is used as the digital controller to realize the boundary current mode PFC control in software, witch has built-in digital PWM, A/D converters, and 32-bit float-point computational.
Under steady state, the inductor current is given by
m1Ton m2Toff
(18)
Subtracting (17) into (16) yields
I L [n 1] 1 I L [n]
(19)
Similarly, the variation of turn-off time for the (n+2)th witching period, toff [n 2] can be obtained as follows.
I L [n 2] I L [n 1] m2 (Toff toff [n 1]) m1Ton
(20) 6
TABLE 3 Specifications of BCM PFC converter Input Voltage
100Vac/50Hz
Output Voltage
385Vdc
Output Power
250W
Switching Frequency
25kHz ~ 100kHz
Inductor value
410μH
Capacitor value
330μF
Control device
TMS320F28335
DSP_CLK
100 MHz
DPWM resolution
12 bits
ADC resolution
(3.3V/4095) 12 bits
(A) (B) Fig. 14 Experimental results, leading-edge modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
(A) (B) Fig. 15 Experimental results, triangular modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
Experimental results of dynamic response to step load changing from 70% to 100% of full load and vice versa are shown in Fig. 16 to Fig. 18. As shown in Fig. 16, the output voltage ripple (36.2 V) is less than 4.6% for trailing-edge modulation. Fig. 17 shows the output voltage ripple (40 V) is less than 5.19 % under leading-edge modulation and Fig. 18 shows the output voltage ripple (28 V) is less than 3.6 % under triangular modulation. Therefore, predictive boundary current mode control with triangular modulation has superior dynamic performance. The potential reason for this is triangular modulation results in the smallest modulation delay as shown in [33], [34]. Fig. 19 shows the measured results of efficiency, power factor and THD of input current. As shown in Fig. 19(A), the maximum efficiency is more than 96%. Fig. 19(B) shows the power factor which is higher than 0.98 for the predictive boundary current mode control with three modulation methods. Fig. 19 (C) shows the THD of input current for the proposed family of digital-controlled predictive PFC under BCM. As shown in Fig. 19 (C), the THD of input current for leading-edge modulation is superior to the others. This feature can be contributed by its switching period which has less low order components reflected by the input voltage as summarized in Table 2. In contrast, as summarized in Table 2, switching period for trailing edge modulation has the most significant low order components reflected by the input voltage which contributes to the deterioration of THD. Fig. 20 shows the comparison results of individual harmonics versus IEC 61000-3-2 Class D specifications [1]. As shown in Fig. 20, the harmonics for the proposed control method are lower than those required for Class D specifications under light-load and full-load conditions. These experimental results demonstrate the effectiveness of the proposed unified predictive boundary current mode control
Fig. 12 Experimental system
Fig. 13 to Fig. 15 show the experimental results under full load condition with trailing-edge modulation, leading-edge modulation and triangular modulation, respectively. As shown in Fig. 13, the inductor current is sampled at valley of current under trailing-edge modulation. The inductor current is operated in boundary current mode. Moreover, as shown in Fig. 13, the inductor current and input voltage are in phase demonstrating good power factor results. Similar results can be confirmed by the experimental results shown in Fig. 14 and Fig. 15 for the leading-edge modulation and triangular modulation, respectively.
(A) (B) Fig. 13 Experimental results, trailing-edge modulation, Ch1: Inductor current, Ch2: Input voltage, Ch3: Output voltage, Ch4: Sampling and controller calculation time under full-load condition
7
digital-controlled power factor corrector.
(A) Efficiency
Fig. 16 Dynamic response, experimental results, trailing-edge modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(B)Power factor
Fig. 17 Dynamic response, experimental results, leading-edge modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(C) THD of input current Fig. 19 Experimental results
Fig. 18 Dynamic response, experimental results, triangular modulation, Ch1: Input current, Ch2: Output voltage, Ch3: Input voltage
(A) Light-load = 75W
8
[1].
[2].
[3].
[4].
[5]. (B) Full-load = 250W Fig. 20 Experimental results
VI. CONCLUSION The contributions of this paper include: Proposal of a family of predictive control techniques for digital-controlled PFC to achieve BCM Analysis of parameter variation and stability of the proposed family of predictive control techniques Theoretical analysis and experimental comparisons of the family of predictive control techniques
[6].
The special features of the proposed predictive control technique includes not requiring zero crossing detection of current and no need of fast A/D converter. Theoretical analysis and experimental comparisons show that the THD of input current for predictive digital-controlled PFC with BCM based upon leading-edge modulation is superior to the others. This feature can be contributed by the switching period of the method which has less low order harmonic components reflected the input voltage. And the predictive digital-controlled PFC with BCM based upon triangular modulation provides the best dynamic response contributed by less delay of DPWM.
[9].
[7].
[8].
[10].
[11].
[12].
[13].
Appendix I Switching frequency vs. DC-link voltage level for trailing edge modulation [14].
Fig. A. 1 shows the relationship of switching frequency and DC-link voltage level. These curves are derived by the formula shown in Table 2 for the trailing edge modulation case. As shown in Fig. A. 1, when the dc-link voltage is lower, the boost ratio is reduced and TCM can be retained by reducing the switching frequency.
[15].
[16].
[17].
[18].
[19].
[20].
[21]. Fig. A.1 Switching frequency as DC voltage varies, trailing-edge modulation.
9
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