A 1.5 V 2.4 GHZ CMOS MIXER WITH HIGH LINEARITY
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, December 6-9, 2004
A 1.5 V 2.4 GHZ CMOS MIXER WITH HIGH LINEARITY Hung-Che Wei, Ro-Min Weng, Chih-Lung Hsiao and Kun-Yi Lin Dept. of Electrical Engineering, National Dong Hwa University 1, Sec. 2, Da Hsueh Rd., Shou-Feng, Hualien, Taiwan, Republic of China Fax:+886-3-8634060 E-mail:[email protected] ABSTRACT
Off-chip channel select filter Antenna
An RF mixer with high linearity for 2.4 GHz ISM band applications is presented. The mixer is composed of a modified Class-AB transconductor stage and a common mode feedback (CMFB) circuitry. With this topology the following simulation results are achieved: input 1-dB compression point (P-1dB) –8.98 dBm, input third-order intercept point (IIP3) 5.46 dBm, power conversion gain 3.3 dB, and single side-band noise figure 14.87 dB. The mixer implemented by tsmc 0.18 µm CMOS process consumes 3.73 mA of current from a 1.5 V power supply. 1. INTRODUCTION Demands for the wireless service and capacity increase as well in recent years. For this reason, 2.4 GHz is the frequency band attracted more and more researchers. This frequency band is also called ISM band that is free to be used in the Industrial, Scientific and Medical applications. Up to now, there have been many protocols proposed for different purposes at the ISM band, such as Bluetooth and IEEE 802.11b standards. Bluetooth[1, 2] is the one that improves the wireless local area network (WLAN) realizing more conveniently. The specification was developed by the Bluetooth Special Interest Group (SIG) which composed of several international companies famous in the communication sphere. One typical receiver architecture applied in the bluetooth system [3] is shown in Fig. 1. Although many Bluetooth integrated circuits (ICs) have been accomplished, they were usually realized by various processes. In the radio frequency (RF) circuit design, Bipolar and GaAs are usually the main consideration to realize circuit integration due to their better performance in the RF applications. Nevertheless, these processes lead to the growth of the cost and the complexity. For many digital blocks in the communication ICs were realized by CMOS process, an idea was proposed making all blocks to be implemented in a single chip, whether analog or digital ones. The chip realized entirely in CMOS process can make the cost and the complexity scale down efficiently. Thus to accomplish RF circuits by entire CMOS technology is much attracted.
0-7803-8660-4/04/$20.00 ©2004 IEEE
Mixer
Amplifier
Demod
LNA
Oscillator
Fig. 1. Bluetooth high IF receiver architecture.
In an RF transceiver, the mixer is an important component which provides the frequency translation from RF to the intermediate frequency (IF) called “down-convert”, or from IF to RF called “up-convert”. Owing to the phenomenon of frequency translation, a mixer suffers many nonlinear interference that may decline the desired signal. There are several RF parameters of a mixer, such as input third-order intercept point (IIP3), conversion gain, input 1-dB compression point (P-1dB), noise figure, port return loss and port-to-port isolation. Among these parameters, IIP3 and P-1dB determine the linearity of a mixer. IIP3 exhibits the effects of intermodulation terms in the nonlinear circuit. P-1dB represents the ceiling of the input power. Among these two parameters, IIP3 is the dominating factor in the definition of the spurious-free dynamic range (SFDR) [4] expressed below: 2 × (IIP 3 − F ) − SN Rmin , (1) 3 where F is the noise factor, SN Rmin is the minimum signal-to-noise ratio value. SFDR determines the ability of the maximum power which a receiver can obtain. In the front-end architecture, the cascade components influence overall linearity. The overall IIP3 performance in the front-end is calculated by SF DR =
IIP 3total = [
1 A21 A2 A2 + + 1 2 + · · · ]−1 . (2) IIP 31 IIP 32 IIP 33
The IIP3 magnitude of the n-th stage is given by IIP3n, and the n-th loaded voltage gain represented by An. It
289
Vdd
M17
M15
M18
M16 R1
R2
IF+ M19
M20
M11 M12
LO+
Vref
IF-
M13 M14 LO-
Iref io+
M21
Vbias
VH
i o-
M5
VG
M10
LO+
M6
M7
M8
C1
C2
RF+
RF-
M9
M1
M2
M3
M4
Fig. 2. Proposed mixer with the modified Class-AB transcoductor.
induce small current signals with the opposite phase. one of the merits is to realize matching network easily in the opposition to the common-source transconductors. The modified Class-AB high-linearity transconductor provides less linearity degration than the generally differential pair ones. Let the aspects of M1–M8 to be the same values, relationships of the drain currents in the transistors M1–M8 are represented below:
shows the linearity of a front-end is dominated by the ones located following the first stage of the front-end [5]. The more IIP3n increases, the more IIP3total can be improved. In the front-end system design, the mixer plays an important role of improving the overall system linearity, especially for WLAN applications. 2. DESIGN METHODOLOGY OF MIXERS Lots of methods have been proposed to improve the linearity of the mixer due to the nonlinear phenomenon of the transconductor stage. Using source degeneration connected to the sources of the transconductor stage in a Gilbert cell mixer is commonly published [6, 7]. Tradeoffs between the conversion gain and the linearity are considered by designers while using the method described previously. Another way to enhance the linearity of a mixer, is based on CMOS gm Cell composed of the tanh fuctions [8, 9]. As charge-injection method employs current injecting into the drain of the transistors in the transconductor stage, it increases the current in the transconductor stage and is proportional to the value of IIP3 and the conversion gain [10, 11]. But the improvement in the aspect of IIP3 is not much. Hence, A method to improve the linearity is to use a modified Class-AB high-linearity transconductor[12]. The proposed high-linearity mixer with a modified ClassAB transconductor stage and a CMFB circuitry is depicted in Fig. 2. Input differential signal νRF injects into the drain of M2 and M4 and induces output currents via current mirrors M1–M2 and M3–M4. While biased at the saturation region, M1 and M4 convert the input RF voltage signal into small output current signal. M1 and M3 induce small current signals with the same phase, and M2 and M4
iD2 iD3
= iD5 = iD6 , = iD7 = iD8 .
(3) (4)
So the differential output current signal can be expressed as io
= io + − i o −
= (iD1 + iD8 ) − (iD4 + iD5 ) p = 4 kn · Iref · νRF
= 2gm · νRF , (5) r Iref |νRF | ≤ 2 , (6) kn where 1 Wn kn = µn Cox ( ), 2 Ln p gm = 2kn · Iref . √ The transconductor provides 2 times the input signal range of a differential pair by verifying Eqn.6, and the twice gm value of Class-AB transconductor stage by Eqn. 5. Experiment results of the architecture has showed excellent capability in Total Harmonic Distortion (THD) suppressing, and it is obviously that it has more linear region of the input signal. This transconductor can be
290
20
25
Conversion gain IIP3
15
0 −10
5
0
−5
−10
−20 −30 −40 −50
−15
−60
−20
−70
−25
−20
−15
LO power (dBm)
−10
−5
IF
Ideal
10
−25 −30
P (Simulated)
10
Output power (dBm)
Conversion gain (dB) and IIP3 (dBm)
20
−80 −50
0
Fig. 3. The simulation results of conversion gain and IIP3 versus LO power.
3. SIMULATION RESULTS The proposed mixer operates at RF frequency of 2.4 GHz, LO frequency of 2.3 GHz and IF frequency of 100 MHz, respectively. The simulation of the mixer is based on tsmc 0.18 µm Mixed Signal CMOS RF models. The active current of mixer is about 3.73 mA from a 1.5 V supply voltage. While sweeping the LO power, Figure 3 shows that the relationship between IIP3 and the conver-
10
0
−10
Input RF power (dBm)
Fig. 4. P-1dB of the proposed mixer.
20 0 −20
Output power (dBm)
used in the application of a mixer due to the wider input range and the better harmonic suppression. There are trade-offs between IIP3, conversion gain and noise figure in the design considerations of a mixer. While the gain of a front-end receiver can be compensated with other building blocks such as low noise amplifier, automatic gain control amplifiers,· · · etc., specification of a mixer can be optimized the performance of the linearity with the moderate conversion gain. C1 and C2 are applied to be the DC-blocking capacitors. M5–M8 provide the promotion of the isolation in the mixer. M11–M14 are the commutating stages act as the switches ideally which biased by the bias tee architecture in the impedance matching network. To make M11–M14 as ideal switches, the transistors are biased in the saturation region that is close to the triode region. Then the IF current signal is down-converted by the commutating stage and the RF signal injected from the source of M11– M14. It is translated into the voltage signal by the load stage consisted of M15, M16, R1 and R2. The load stage can provide output impedance via the resistive load of R1 and R2, and appropriate voltage swing headroom by the transistors M15 and M16. The CMFB circuit composed by M17–M21 are connected to the load stage. It performs a stable dc level to the gates of M15 and M16 and improves the conversion gain of the proposed mixer. For testing and matching purposes, the source followers are used as the output buffers that not illustrated in Fig. 2.
−20
−30
−40
P (Simulated) IF P IM3 (Simulated) Ideal
−40 −60 −80 −100 −120
IIP3= 5.46 dBm
−140 −160 −60
−50
−40
−30
−20
−10
Input RF power (dBm)
0
10
20
Fig. 5. IIP3 of the proposed mixer.
sion gain. We can choose an appropriate LO power to achieve desired IIP3 and the conversion gain. The simulation results of input 1-dB compression point (P-1dB) is shown in Fig. 4, which achieves –8.98 dBm alongside the various RF input power while applying –7 dBm LO power. By using two-tone testing, two tones are located at 2.405 GHz and 2.395 GHz, respectively. Figure 5 illustrates IIP3 measured to be 5.46 dBm. The simulation results of other mixers are compared by the same design consideration in optimizing the linearity. With the sweeping of the RF frequency, we can get the results of the variable IF frequency versus the conversion gain in Fig. 6. The proposed mixer holds at least 2.5 dB of the conversion gain in the IF range of 20 MHz to 200 MHz. Table 1 summarizes the simulation results of the proposed mixer. The proposed mixer represents excellent properties of the conversion gain and the linearity.
291
Feb. 2000.
5 4.5
[2] J.C. Haartsen and S. Mattisson, “Bluetooth-a new low-power radio interface providing short-range connectivity,” Proceedings of the IEEE, vol. 88, no. 10, pp. 1651–1661, Oct. 2000.
Conversion Gain (dB)
4 3.5 3
[3] J.P.K. Gilb, “Bluetooth radio architectures,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 3–6, June 2000.
2.5 2 1.5
[4] B. Razavi, RF Microelectronics, New Jersey: Prentice-Hall, 1998.
1 0.5 0 20
40
60
80
100
120
IF frequency (MHz)
140
180
160
[5] W.H. Hayward, Introduction to Radio Frequency Design, Englewood Cliffs, New Jersey: PrenticeHall, 1982.
200
Fig. 6. IF frequency to conversion gain
[6] C.H. Feng, F. Jonsson, M. Ismail and H. Olsson, “Analysis of nonlinearities in RF CMOS amplifiers,” The 6th IEEE International Conference on Electronics, Circuits and Systems, vol. 1, pp. 137–140, 1999.
4. CONCLUSION The transconductor stage is an important factor limiting the linearity of a mixer. A CMFB mixer with the modified Class-AB transconductor stage that improves the performances of IIP3 and the conversion gain is presented. The proposed mixer operates at 2.4 GHz and is suitable for radio frequency applications. It converts to the IF frequency of 100 MHz by mixing with the LO frequency of 2.3 GHz. Due to the linear effects of the following stages in the front-end receiver, we hope that highly linear performance of the mixer can improve the linearity of the overall front-end system. The simulation results show that this mixer achieves IIP3 of 5.46 dBm, P-1dB of –8.98 dBm and the conversion gain of 1-dB in the power consumption of 5.6 mW. For the behaviors of the mixer exhibit relatively high linearity and high conversion gain, the proposed mixer can be fit for WLAN applications. Table 1. Performance summary of mixers. Ref. Process (um) Supply Voltage (V) fRF (GHz) fLO (GHz) Power consumption (mW) LO Power (dBm) IIP3 (dBm) P-1dB (dBm) Conversion Gain (dB) SSB Noise Figure (dB)
[13] 0.35 3 1.9 0.9 24 0 –3 –8 7.5 10
[14] 0.35 2 0.9 0.8 7.2 –7 –3.3 –15.4 1.1 N.A.
This work 0.18 1.5 2.4 2.3 5.6 –7 5.46 –8.98 3.3 14.87
5. REFERENCES [1] J.C. Haartsen, “The Bluetooth radio system,” IEEE Personal Communications, vol. 7, no. 1, pp. 28–36,
[7] Q. Li, J. Zhang, W. Li and J.S. Yuan, “CMOS RF mixer no-linearity design,” Proc. 44th IEEE Midwest Symposium on Circuits and Systems, vol. 2, pp. 808– 811, Aug. 2001. [8] B. Gilbert, “The multi-tanh principle: a tutorial overview,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 2–17, Jan. 1998. [9] C.C. Chang, R.M. Weng, J.C. Huang, K. Hsu and K.Y. Lin, “A 1.5 V high gain CMOS mixer for 2.4GHz applications,” IEEE International Symposium on Circuits and Systems, vol. 2, pp. 782–785, May 2001. [10] L.A. NacEachern and T. Manku, “A charge-injection method for Gilbert cell biasing,” IEEE Canadian Conference on Electrical and Computer Engineering, vol. 1, pp. 365–368, May 1998. [11] S.G. Lee and J.K. Choi, “Current-reuse bleeding mixer,” IEE Electronics Letters, vol. 36, no. 8, pp. 696–697, April 2000. [12] G. Giustolisi, G. Palmisano and S. Pennisi, “Highlinear class AB transconductor for high-frequency applications,” IEEE International Symposium on Circuits and Systems, vol. 5, pp. 169–172, May 2000. [13] K. Nimmagadda and G.M. Rebeiz, “A 1.9 GHz double-balanced subharmonic mixer for direct conversion receivers,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 253–256, May 2001. [14] C.F. Au-Yeung and K.K. M. Cheng, “CMOS mixer linearization by the low-frequency signal injection method,” IEEE MTT-S International Microwave Symposium Digest, vol. 1, pp. 95–98, June 2003.
292
A 1.5 V 2.4 GHZ CMOS MIXER WITH HIGH LINEARITY Hung-Che Wei, Ro-Min Weng, Chih-Lung Hsiao and Kun-Yi Lin Dept. of Electrical Engineering, National Dong Hwa University 1, Sec. 2, Da Hsueh Rd., Shou-Feng, Hualien, Taiwan, Republic of China Fax:+886-3-8634060 E-mail:[email protected] ABSTRACT
Off-chip channel select filter Antenna
An RF mixer with high linearity for 2.4 GHz ISM band applications is presented. The mixer is composed of a modified Class-AB transconductor stage and a common mode feedback (CMFB) circuitry. With this topology the following simulation results are achieved: input 1-dB compression point (P-1dB) –8.98 dBm, input third-order intercept point (IIP3) 5.46 dBm, power conversion gain 3.3 dB, and single side-band noise figure 14.87 dB. The mixer implemented by tsmc 0.18 µm CMOS process consumes 3.73 mA of current from a 1.5 V power supply. 1. INTRODUCTION Demands for the wireless service and capacity increase as well in recent years. For this reason, 2.4 GHz is the frequency band attracted more and more researchers. This frequency band is also called ISM band that is free to be used in the Industrial, Scientific and Medical applications. Up to now, there have been many protocols proposed for different purposes at the ISM band, such as Bluetooth and IEEE 802.11b standards. Bluetooth[1, 2] is the one that improves the wireless local area network (WLAN) realizing more conveniently. The specification was developed by the Bluetooth Special Interest Group (SIG) which composed of several international companies famous in the communication sphere. One typical receiver architecture applied in the bluetooth system [3] is shown in Fig. 1. Although many Bluetooth integrated circuits (ICs) have been accomplished, they were usually realized by various processes. In the radio frequency (RF) circuit design, Bipolar and GaAs are usually the main consideration to realize circuit integration due to their better performance in the RF applications. Nevertheless, these processes lead to the growth of the cost and the complexity. For many digital blocks in the communication ICs were realized by CMOS process, an idea was proposed making all blocks to be implemented in a single chip, whether analog or digital ones. The chip realized entirely in CMOS process can make the cost and the complexity scale down efficiently. Thus to accomplish RF circuits by entire CMOS technology is much attracted.
0-7803-8660-4/04/$20.00 ©2004 IEEE
Mixer
Amplifier
Demod
LNA
Oscillator
Fig. 1. Bluetooth high IF receiver architecture.
In an RF transceiver, the mixer is an important component which provides the frequency translation from RF to the intermediate frequency (IF) called “down-convert”, or from IF to RF called “up-convert”. Owing to the phenomenon of frequency translation, a mixer suffers many nonlinear interference that may decline the desired signal. There are several RF parameters of a mixer, such as input third-order intercept point (IIP3), conversion gain, input 1-dB compression point (P-1dB), noise figure, port return loss and port-to-port isolation. Among these parameters, IIP3 and P-1dB determine the linearity of a mixer. IIP3 exhibits the effects of intermodulation terms in the nonlinear circuit. P-1dB represents the ceiling of the input power. Among these two parameters, IIP3 is the dominating factor in the definition of the spurious-free dynamic range (SFDR) [4] expressed below: 2 × (IIP 3 − F ) − SN Rmin , (1) 3 where F is the noise factor, SN Rmin is the minimum signal-to-noise ratio value. SFDR determines the ability of the maximum power which a receiver can obtain. In the front-end architecture, the cascade components influence overall linearity. The overall IIP3 performance in the front-end is calculated by SF DR =
IIP 3total = [
1 A21 A2 A2 + + 1 2 + · · · ]−1 . (2) IIP 31 IIP 32 IIP 33
The IIP3 magnitude of the n-th stage is given by IIP3n, and the n-th loaded voltage gain represented by An. It
289
Vdd
M17
M15
M18
M16 R1
R2
IF+ M19
M20
M11 M12
LO+
Vref
IF-
M13 M14 LO-
Iref io+
M21
Vbias
VH
i o-
M5
VG
M10
LO+
M6
M7
M8
C1
C2
RF+
RF-
M9
M1
M2
M3
M4
Fig. 2. Proposed mixer with the modified Class-AB transcoductor.
induce small current signals with the opposite phase. one of the merits is to realize matching network easily in the opposition to the common-source transconductors. The modified Class-AB high-linearity transconductor provides less linearity degration than the generally differential pair ones. Let the aspects of M1–M8 to be the same values, relationships of the drain currents in the transistors M1–M8 are represented below:
shows the linearity of a front-end is dominated by the ones located following the first stage of the front-end [5]. The more IIP3n increases, the more IIP3total can be improved. In the front-end system design, the mixer plays an important role of improving the overall system linearity, especially for WLAN applications. 2. DESIGN METHODOLOGY OF MIXERS Lots of methods have been proposed to improve the linearity of the mixer due to the nonlinear phenomenon of the transconductor stage. Using source degeneration connected to the sources of the transconductor stage in a Gilbert cell mixer is commonly published [6, 7]. Tradeoffs between the conversion gain and the linearity are considered by designers while using the method described previously. Another way to enhance the linearity of a mixer, is based on CMOS gm Cell composed of the tanh fuctions [8, 9]. As charge-injection method employs current injecting into the drain of the transistors in the transconductor stage, it increases the current in the transconductor stage and is proportional to the value of IIP3 and the conversion gain [10, 11]. But the improvement in the aspect of IIP3 is not much. Hence, A method to improve the linearity is to use a modified Class-AB high-linearity transconductor[12]. The proposed high-linearity mixer with a modified ClassAB transconductor stage and a CMFB circuitry is depicted in Fig. 2. Input differential signal νRF injects into the drain of M2 and M4 and induces output currents via current mirrors M1–M2 and M3–M4. While biased at the saturation region, M1 and M4 convert the input RF voltage signal into small output current signal. M1 and M3 induce small current signals with the same phase, and M2 and M4
iD2 iD3
= iD5 = iD6 , = iD7 = iD8 .
(3) (4)
So the differential output current signal can be expressed as io
= io + − i o −
= (iD1 + iD8 ) − (iD4 + iD5 ) p = 4 kn · Iref · νRF
= 2gm · νRF , (5) r Iref |νRF | ≤ 2 , (6) kn where 1 Wn kn = µn Cox ( ), 2 Ln p gm = 2kn · Iref . √ The transconductor provides 2 times the input signal range of a differential pair by verifying Eqn.6, and the twice gm value of Class-AB transconductor stage by Eqn. 5. Experiment results of the architecture has showed excellent capability in Total Harmonic Distortion (THD) suppressing, and it is obviously that it has more linear region of the input signal. This transconductor can be
290
20
25
Conversion gain IIP3
15
0 −10
5
0
−5
−10
−20 −30 −40 −50
−15
−60
−20
−70
−25
−20
−15
LO power (dBm)
−10
−5
IF
Ideal
10
−25 −30
P (Simulated)
10
Output power (dBm)
Conversion gain (dB) and IIP3 (dBm)
20
−80 −50
0
Fig. 3. The simulation results of conversion gain and IIP3 versus LO power.
3. SIMULATION RESULTS The proposed mixer operates at RF frequency of 2.4 GHz, LO frequency of 2.3 GHz and IF frequency of 100 MHz, respectively. The simulation of the mixer is based on tsmc 0.18 µm Mixed Signal CMOS RF models. The active current of mixer is about 3.73 mA from a 1.5 V supply voltage. While sweeping the LO power, Figure 3 shows that the relationship between IIP3 and the conver-
10
0
−10
Input RF power (dBm)
Fig. 4. P-1dB of the proposed mixer.
20 0 −20
Output power (dBm)
used in the application of a mixer due to the wider input range and the better harmonic suppression. There are trade-offs between IIP3, conversion gain and noise figure in the design considerations of a mixer. While the gain of a front-end receiver can be compensated with other building blocks such as low noise amplifier, automatic gain control amplifiers,· · · etc., specification of a mixer can be optimized the performance of the linearity with the moderate conversion gain. C1 and C2 are applied to be the DC-blocking capacitors. M5–M8 provide the promotion of the isolation in the mixer. M11–M14 are the commutating stages act as the switches ideally which biased by the bias tee architecture in the impedance matching network. To make M11–M14 as ideal switches, the transistors are biased in the saturation region that is close to the triode region. Then the IF current signal is down-converted by the commutating stage and the RF signal injected from the source of M11– M14. It is translated into the voltage signal by the load stage consisted of M15, M16, R1 and R2. The load stage can provide output impedance via the resistive load of R1 and R2, and appropriate voltage swing headroom by the transistors M15 and M16. The CMFB circuit composed by M17–M21 are connected to the load stage. It performs a stable dc level to the gates of M15 and M16 and improves the conversion gain of the proposed mixer. For testing and matching purposes, the source followers are used as the output buffers that not illustrated in Fig. 2.
−20
−30
−40
P (Simulated) IF P IM3 (Simulated) Ideal
−40 −60 −80 −100 −120
IIP3= 5.46 dBm
−140 −160 −60
−50
−40
−30
−20
−10
Input RF power (dBm)
0
10
20
Fig. 5. IIP3 of the proposed mixer.
sion gain. We can choose an appropriate LO power to achieve desired IIP3 and the conversion gain. The simulation results of input 1-dB compression point (P-1dB) is shown in Fig. 4, which achieves –8.98 dBm alongside the various RF input power while applying –7 dBm LO power. By using two-tone testing, two tones are located at 2.405 GHz and 2.395 GHz, respectively. Figure 5 illustrates IIP3 measured to be 5.46 dBm. The simulation results of other mixers are compared by the same design consideration in optimizing the linearity. With the sweeping of the RF frequency, we can get the results of the variable IF frequency versus the conversion gain in Fig. 6. The proposed mixer holds at least 2.5 dB of the conversion gain in the IF range of 20 MHz to 200 MHz. Table 1 summarizes the simulation results of the proposed mixer. The proposed mixer represents excellent properties of the conversion gain and the linearity.
291
Feb. 2000.
5 4.5
[2] J.C. Haartsen and S. Mattisson, “Bluetooth-a new low-power radio interface providing short-range connectivity,” Proceedings of the IEEE, vol. 88, no. 10, pp. 1651–1661, Oct. 2000.
Conversion Gain (dB)
4 3.5 3
[3] J.P.K. Gilb, “Bluetooth radio architectures,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 3–6, June 2000.
2.5 2 1.5
[4] B. Razavi, RF Microelectronics, New Jersey: Prentice-Hall, 1998.
1 0.5 0 20
40
60
80
100
120
IF frequency (MHz)
140
180
160
[5] W.H. Hayward, Introduction to Radio Frequency Design, Englewood Cliffs, New Jersey: PrenticeHall, 1982.
200
Fig. 6. IF frequency to conversion gain
[6] C.H. Feng, F. Jonsson, M. Ismail and H. Olsson, “Analysis of nonlinearities in RF CMOS amplifiers,” The 6th IEEE International Conference on Electronics, Circuits and Systems, vol. 1, pp. 137–140, 1999.
4. CONCLUSION The transconductor stage is an important factor limiting the linearity of a mixer. A CMFB mixer with the modified Class-AB transconductor stage that improves the performances of IIP3 and the conversion gain is presented. The proposed mixer operates at 2.4 GHz and is suitable for radio frequency applications. It converts to the IF frequency of 100 MHz by mixing with the LO frequency of 2.3 GHz. Due to the linear effects of the following stages in the front-end receiver, we hope that highly linear performance of the mixer can improve the linearity of the overall front-end system. The simulation results show that this mixer achieves IIP3 of 5.46 dBm, P-1dB of –8.98 dBm and the conversion gain of 1-dB in the power consumption of 5.6 mW. For the behaviors of the mixer exhibit relatively high linearity and high conversion gain, the proposed mixer can be fit for WLAN applications. Table 1. Performance summary of mixers. Ref. Process (um) Supply Voltage (V) fRF (GHz) fLO (GHz) Power consumption (mW) LO Power (dBm) IIP3 (dBm) P-1dB (dBm) Conversion Gain (dB) SSB Noise Figure (dB)
[13] 0.35 3 1.9 0.9 24 0 –3 –8 7.5 10
[14] 0.35 2 0.9 0.8 7.2 –7 –3.3 –15.4 1.1 N.A.
This work 0.18 1.5 2.4 2.3 5.6 –7 5.46 –8.98 3.3 14.87
5. REFERENCES [1] J.C. Haartsen, “The Bluetooth radio system,” IEEE Personal Communications, vol. 7, no. 1, pp. 28–36,
[7] Q. Li, J. Zhang, W. Li and J.S. Yuan, “CMOS RF mixer no-linearity design,” Proc. 44th IEEE Midwest Symposium on Circuits and Systems, vol. 2, pp. 808– 811, Aug. 2001. [8] B. Gilbert, “The multi-tanh principle: a tutorial overview,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 2–17, Jan. 1998. [9] C.C. Chang, R.M. Weng, J.C. Huang, K. Hsu and K.Y. Lin, “A 1.5 V high gain CMOS mixer for 2.4GHz applications,” IEEE International Symposium on Circuits and Systems, vol. 2, pp. 782–785, May 2001. [10] L.A. NacEachern and T. Manku, “A charge-injection method for Gilbert cell biasing,” IEEE Canadian Conference on Electrical and Computer Engineering, vol. 1, pp. 365–368, May 1998. [11] S.G. Lee and J.K. Choi, “Current-reuse bleeding mixer,” IEE Electronics Letters, vol. 36, no. 8, pp. 696–697, April 2000. [12] G. Giustolisi, G. Palmisano and S. Pennisi, “Highlinear class AB transconductor for high-frequency applications,” IEEE International Symposium on Circuits and Systems, vol. 5, pp. 169–172, May 2000. [13] K. Nimmagadda and G.M. Rebeiz, “A 1.9 GHz double-balanced subharmonic mixer for direct conversion receivers,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 253–256, May 2001. [14] C.F. Au-Yeung and K.K. M. Cheng, “CMOS mixer linearization by the low-frequency signal injection method,” IEEE MTT-S International Microwave Symposium Digest, vol. 1, pp. 95–98, June 2003.
292
