AlGaN-GaN Single- and Double-Channel HEMTs - HKUST EE ...

TITLE PAGE

AlGaN-GaN Single- and Double-Channel High Electron Mobility Transistors

by Rongming CHU

A Thesis Submitted to The Hong Kong University of Science and Technology in Partial Fulfillment of the Requirements for the Degree of Master of Philosophy in Electrical and Electronic Engineering

August 2004, Hong Kong

AUTHORIZATION

I hereby declare that I am the sole author of the thesis. I authorize the Hong Kong University of Science and Technology to lend this thesis to other institutions or individuals for the purpose of scholarly research. I further authorize the Hong Kong University of Science and Technology to reproduce the thesis by photocopying or by other means, in total or in part, at the request of other institutions or individuals for the purpose of scholarly research.

________________________ Rongming CHU

ii

AlGaN-GaN Single- and Double-Channel High Electron Mobility Transistors

by Rongming CHU

This is to certify that I have examined above MPhil thesis and have found that it is complete and satisfactory in all aspects, and that any and all revisions required by the thesis examination committee have been made.

_________________________________________ Prof. Kevin J. CHEN Thesis Examination Committee Member (Thesis Supervisor)

_________________________________________ Prof. Kei May LAU Thesis Examination Committee Member (Chairman)

_________________________________________ Prof. Mansun J. CHAN Thesis Examination Committee Member

_________________________________________ Prof. Ross D. MURCH Acting Head of the Department of Electrical and Electronic Engineering SIGNATURE PAGE Department of Electrical and Electronic Engineering The Hong Kong University of Science and Technology August 2004 iii

ACKNOWLEDGEMENTS

I must acknowledge first, my supervisor Prof. Kevin J. Chen, for his encouragement, guidance and support throughout my study at HKUST. My work on GaN transistors is also under the lead of Prof. Kei May Lau. I am grateful to her for providing me discussion, suggestion and support. I appreciate Prof. Mansun Chan for serving in my thesis examination committee and providing valuable insight into my work. I am indebted to my friend and long-term work partner, Dr. Yugang Zhou, who has been standing with me and sharing with me his knowledge all the time since I entered into the field of GaN research. Dr. Zhou spent countless hours growing GaN samples for HEMT fabrication and none of this research would have been possible without his expertise in material growth. Many thanks go to Mr. Kwok Wai Chan and Mr. Kenneth Kin Pin Tsui, who shared with me their hands-on experience on microwave measurement. As an important part of my research work, the device fabrication was finished in the microelectronic fabrication facility (MFF) at HKUST. A number of wonderful people have made the experience in MFF enjoyable and rewarding. I want to express my gratitude to Dr. Zhengdong Lu and Mr. Hu Liang, who helped me to get familiar with basic micro-fabrication techniques at the beginning of my fabrication work. Mr. Wai Hung Ho is gratefully acknowledged for his enthusiastic help and valuable advice on device processing, especially on photolithography. It has been a pleasant time to work with Mr. Jie Liu, Mr. Shuo Jia and Dr. Yong Cai during GaN transistor fabrication and characterization, and to share with them my knowledge and experience on GaN transistors.

iv

Magneto-transport measurement of AlGaN/GaN samples was conducted in Prof. Jiannong Wang’s laboratory at physics department. I sincerely acknowledge Dr. Wang and her group for their help and support during the measurement. I also want to acknowledge Dr. Deliang Wang for his help in taking transmission electron microscope (TEM) observation for our double-channel transistor sample. The TEM observation results have been very critical in confirming the sample structure and clarifying the confusion we had made. My appreciation also extends to Prof. Youdou Zheng, who took me on as my research advisor during my undergraduate time in Nanjing University. He brought me into the fantastic world of semiconductor electronics, and has been always inspiring me to strive for the highest level of professionalism. From Prof. Zheng, I learned that a qualified researcher should keep open mind and pay persistent effort. Without Prof. Zheng’s guidance and help, any success in my research career will never be possible. Lastly but not least, I want to thank my parents for their love, their endless support, and all the sacrifices they have made over the years to provide me with the opportunities to pursue my interest.

v

TABLE OF CONTENTS

Title Page ...................................................................................................................... i Authorization ............................................................................................................... ii Signature Page.............................................................................................................iii Acknowledgements ..................................................................................................... iv Table of Contents ........................................................................................................ vi List of Figures ...........................................................................................................viii List of Tables ............................................................................................................. xii Abstract ........................................................................................................................ 1 Chapter 1 Introduction ................................................................................................. 3 1.1

Principle of HEMTs ..................................................................................... 3

1.2

Development of AlGaN-GaN HEMTs....................................................... 10

1.3

Objective of Synopsis of This Thesis ........................................................ 14

Chapter 2 AlGaN-GaN Single-Channel HEMTs....................................................... 16 2.1

Electronic Properties of AlGaN/GaN Heterostructures ............................. 16

2.2

Device Processing Technologies ............................................................... 21

2.3

DC IV Characteristics ................................................................................ 25

2.4

RF Small-Signal Measurement and Analysis ............................................ 27

2.5

RF Large-Signal Power Measurement ....................................................... 30

Chapter 3 Trap States and Current Collapse in AlGaN/GaN HEMTs....................... 32 3.1

Overview of Trap States in AlGaN/GaN Heterostructures........................ 33

3.2

Characterization of Trap States in AlGaN/GaN Heterostructure............... 35

3.3

Analysis of Current Collapse in AlGaN/GaN HEMTs .............................. 41

Chapter 4 AlGaN-GaN Double-Channel HEMTs ..................................................... 48

vi

4.1

Motivation and Epilayer Design ................................................................ 48

4.2

DC IV Characteristics ................................................................................ 52

4.3

RF Small-Signal Measurement and Analysis ............................................ 54

4.3.1

AC Transconductance and Gate-to-Source Capacitance ................... 56

4.3.2

Output Impedance .............................................................................. 57

4.3.3

Current and Power Gain..................................................................... 58

4.4

Dynamic IV Characterization .................................................................... 62

4.5

RF Large-Signal Power and Linearity Measurement................................. 66

4.5.1

Single-Tone Power Performance ....................................................... 66

4.5.2

Two-Tone Intermodulation Distortion Profile ................................... 69

Chapter 5 Conclusion................................................................................................. 72 5.1

Summary .................................................................................................... 72

5.2

Suggestion of Future Work ........................................................................ 73

Bibliography and References ..................................................................................... 74 Appendix A: Process Flow for The Fabrication of GaN HEMTs.............................. 83 Appendix B: List of Publications during The Study in Master of Philosophy Program .................................................................................................................................... 88

vii

LIST OF FIGURES

Fig. 1.1.1

Schematic of an AlGaAs/GaAs HEMT and the corresponding conduction band diagram. Location of the 2DEG is shown.

3

Fig. 1.1.2

Conduction band diagrams and 2DEG ppopulations of an AlGaAs/GaAs HEMT under different gate biases.

4

Fig. 1.1.3

Typical DC IV output (left side) and transfer (right side) characteristics of an AlGaAs/GaAs HEMT.

5

Fig. 1.1.4

Equivalent circuit model of the HEMT. Physical origin of each equivalent circuit element is shown.

5

Fig. 1.1.5

Schematic representation of a HEMT operating in Class A.

8

Fig. 1.2.1

Crystal structure of wurtzite GaN with Ga- and N-face polarity.

11

Fig. 1.2.2

12 Schematic representation of band profiles of AlGaN/GaN heterostructures with varing AlGaN thickness, which demonstrates how surface states participate in the screening of polarization field and contribute to the 2DEG formation.

Fig. 2.1.1

Transverse resistance of the AlGaN/GaN sample as a function of magnetic field measured at 1.4 K. The step-like plateaus are due to quantum Hall effect.

17

Fig. 2.1.2

Longitude resistance of the AlGaN/GaN sample as a function of magnetic field measured at 1.4 K. Oscillations in the resistance are due to SdH effect.

18

Fig. 2.1.3

Fast Fourier transformation of Rxx-1/B function. 2DEG densities are derived from the X-axis value of the peak position.

19

Fig. 2.2.1

Layout of a 2×50µm×1µm HEMT.

21

Fig. 2.2.2

Photograph showing the top view of a fabricated HEMT.

21

Fig. 2.2.3

Cross-sectional schematic of an AlGaN-GaN single-channel HEMT.

22

Fig. 2.2.4

TLM measurement results of an AlGaN-GaN single-channel HEMT sample after device processing. Contact resistance and sheet resistivity are derived.

22

Fig. 2.2.5

DC IV characteristics of a Schottky diode fabricated on the baseline AlGaN-GaN single-channel HEMT epilayer.

23

viii

Fig. 2.2.6

CV characteristics of an AlGaN/GaN Schottky diode measured at 3 MHz.

23

Fig. 2.2.7

Electron distribution profile extracted from the CV characteristics.

24

Fig. 2.3.1

DC IV output characteristics of an AlGaN-GaN single-channel HEMT.

25

Fig. 2.3.2

DC IV transfer characteristics of an AlGaN-GaN single-channel HEMT.

25

Fig. 2.3.3

DC IV transfer characteristics of an AlGaN-GaN single-channel HEMT in semilog scale.

26

Fig. 2.4.1

Schematic of the measurement setup for RF small-signal characterization.

27

Fig. 2.4.2

S-parameters of an AlGaN-GaN single-channel HEMT before (open circiles) and after (solid lines) performing open pad deembedding.

28

Fig. 2.4.3

Frequency dependence of the current gain (|h21|2) and unilateral power gain (U). A comparison was made between results before and after de-embedding.

29

Fig. 2.4.4

fT and fmax of an AlGaN-GaN single–channel HEMT at different gate bias.

29

Fig. 2.5.1

Schematic of the measurement setup for RF large-signal characterization.

30

Fig. 2.5.2

Output power, power gain, and power added efficiency as a function of input power.

31

Fig. 3.1.1

Cross-sectional schematic of an AlGaN-GaN single-channel HEMT showing possible locations of trap states.

33

Fig. 3.2.1

(a) Capacitance and (b) conductance as a function of DC bias at different measurment frequencies for an AlGaN/GaN heterostructure sample with a 37 nm thick Al0.24Ga0.76N layer.

36

Fig. 3.2.2

Equivalent circuit model of an AlGaN/GaN Schottky diode, (a) without considering any trap states, (b) considering the AlGaN/GaN interface states, (c) considering both the interface and the surface trap states.

37

Fig. 3.2.3

Energy band diagrams of an AlGaN/GaN heterostructure in electron accumulation and depletion mode.

ix

38

Fig. 3.2.4

Extraction of interface trap state density (Dit) and time constant (τ) by fitting the normalized conductance (Git/2πf) vs. angular frequency (2πf) dependence at different gate biases.

40

Fig. 3.2.5

Interface state density as a function of the corresponding time constant for AlGaN/GaN samples with different AlGaN barrier thickness and Al content.

40

Fig. 3.3.1

Dynamic IV characteristics of an AlGaN-GaN single-channel HEMT at different quiescent bias points in comparison with DC output IV characteristics.

42 & 43

Fig. 3.3.2

Schematic drawing showing the occurrence of current collapse during the process of an off-to-on transient. Frequency response is delayed by trap states in the gate-to-drain spacing region.

44

Fig. 3.3.3

Schematic showing the post ICP treatment of the AlGaN/GaN HEMT.

45

Fig. 3.3.4

DC IV characteristics of a HEMT before and after ICP treatment.

46

Fig. 3.3.5

Dynamic IV characteristics of a HEMT before and after ICP treatment.

47

Fig. 4.1.1

Simulated conduction band diagrams (a), electron distribution profiles (b), and CV characteristics (c) of two hypothetical AlGaN/GaN/AlGaN/GaN multilayer structures. One is with polarization effect and without doping (solid lines); the other one is modulation n-doped but without polarization effect (dashed lines).

49

Fig. 4.1.2

Cross sectional structure of an AlGaN-GaN double-channel sample.

50

Fig. 4.1.3

Cross-sectional TEM image of a MOCVD grown AlGaN-GaN double-channel HEMT epilayer.

50

Fig. 4.1.4

Electron distribution profile of the double-channel HEMT extracted from measured CV characteristics.

51

Fig. 4.2.1

DC IV output characteristics of a double-channel HEMT.

52

Fig. 4.2.2

DC IV transfer characteristics of a double-channel HEMT.

53

Fig. 4.3.1

Current gain and unilateral power gain of a double-channel HEMT as a function of measurement frequency.

54

Fig. 4.3.2

Equivalent circuit model for parameter extraction of the AlGaNGaN double-channel HEMT.

55

x

Fig. 4.3.3

Gate bias-dependent gate-to-source capacitance and transconductance of a double-channel HEMT.

56

Fig. 4.3.4

Gate bias-dependent output capacitance and conductance of a double-channel HEMT.

57

Fig. 4.3.5

Gate bias-dependence fT and fmax of a double-channel HEMT.

59

Fig. 4.3.6

Drain bias-dependence fT and fmax of a double-channel HEMT.

60

Fig. 4.3.7

Extraction of effective channel transit delay of the double-channel HEMT.

61

Fig. 4.4.1

Dynamic IV characteristics (circles) of an AlGaN-GaN doublechannel HEMT in comparison with DC IV characteristics (black lines). VGS: -8 ~ 1 V.

62 & 63

Fig. 4.4.2

Pulsed transfer characteristics of a double-channel HEMT. The pulse width is 1 ms, and the pulse separation is 100 ms.

65

Fig. 4.5.1

POUT, GT, and PAE of a double-channel HEMT measured at 2 GHz. The quiescent bias point is at 15 V VDS and varied VGS. Impedance matching is optimized for maximum POUT.

67

Fig. 4.5.2

Pout, Gt, and PAE of a double-channel HEMT measured at 2 GHz. The quiescent bias point is at -6 V Vgs and varied Vds. Impedance matching is optimized for maximum Pout.

68

Fig. 4.5.3

IM3 of a double-channel HEMT as the function of output power back-off at 20 V VDS and varied VGS. Impedance matching is optimized for maximum POUT.

69

Fig. 4.5.4

Schematic showing the input and output signal waveforms of the double channel HEMT in small- and large-signal operation. The quiescent VGS is at -4 V.

70

xi

LIST OF TABLES

Table I.

Material Properties of GaN in Comparison with Other Semiconductors

Table II.

Historical development of GaN HEMTs.

xii

9 13

AlGaN-GaN Single- and Double-Channel High Electron Mobility Transistors

by Rongming CHU

Department of Electrical and Electronic Engineering The Hong Kong University of Science and Technology

ABSTRACT

Microwave power transistors made of conventional semiconductors have already approached their performance limit. In order to meet the future needs of wireless communication systems, research efforts are being putting on wide bandgap semiconductors such as SiC and GaN. With combined merits of high power and high speed, high electron mobility transistors (HEMTs) made of AlGaN-GaN materials are the subject of this thesis. Electronic properties of AlGaN/GaN epilayers were characterized to assess the suitability for HEMT fabrication. Device processing technologies of the baseline AlGaN-GaN single-channel HEMTs were established in HKUST. HEMTs fabricated with those epilayers and processing technologies were subjected to extensive testing, showing satisfactory DC and RF performance. Though the AlGaN/GaN HEMTs possess superior performance in many aspects, those devices are usually plagued with current collapse and instability problem, which greatly limits the power performance. Possible reason leading to current collapse is the large amount of defect-related trap states in the currently imperfect AlGaN/GaN materials. Trap states in baseline AlGaN-GaN single-channel HEMTs

were characterized and analyzed. Correlation was found between the surface trap states and the current collapse behaviors. A novel AlGaN-GaN double-channel HEMT design was developed to enhance the device performance and to study the operation mechanism of GaN-based HEMTs. Benefiting from the polarization effect of nitride semiconductors, double-channel HEMTs with optimized structure design exhibit favorable device performance. It was found that the double-channel HEMTs have alleviated current collapse problem, and additional degrees of freedom for linearity engineering.

2

CHAPTER 1 INTRODUCTION

1.1

Principle of HEMTs

The high electron mobility transistor (HEMT) is also called heterostructure field-effect transistor (HFET), or modulation doped field-effect transistor (MODFET). Development of HEMTs started in 1980 [1], immediately after the successful experiments on modulation doped AlGaAs/GaAs heterostructures [2], which revealed the formation of a two-dimensional electron gas (2DEG) with enhanced

electron

mobility.

The

physics

of

2DEGs

in

semiconductor

heterostructures has been covered in the author’s bachelor thesis [3] and references therein.

Fig. 1.1.1 Schematic of an AlGaAs/GaAs HEMT and the corresponding conduction band diagram. Location of the 2DEG is shown. (After Heuken et al., Ref. 4) Earlier HEMTs utilized the AlGaAs/GaAs system, which was the most widely studied and the best understood heterojunction system at that time (see Ref. 5 and 3

references therein). The heart of a HEMT is the heterojunction between the channel layer with lower energy conduction band and the barrier layer with higher energy conduction band. At the interface between the channel and the barrier layers, a 2DEG is created by modulation doping the barrier layer. The structure schematic and the band diagram of an AlGaAs/GaAs HEMT are shown in Fig. 1.1.1. The most important feature is that the 2DEG is separated from the ionized donors in the barrier layer. High density and high mobility 2DEGs make HEMTs promising for high frequency high power applications.

Fig. 1.1.2 Conduction band diagrams and 2DEG populations of an AlGaAs/GaAs HEMT under different gate biases. (After Heuken et al., Ref. 4) In a typical HEMT, the drain current is controlled by gate modulation of 2DEG density. With the gate bias at zero, there is 2DEG accumulated at the heterointerface, and the channel is open. Drain current can be increased by applying a positive gate voltage, which increases the 2DEG density and current density in the channel. However, when the gate voltage is lower than the threshold (or pinch-off) voltage, 4

2DEG in the channel is depleted, and the drain current approaches zero regardless of the drain bias. Fig.1.1.2 shows the mechanism of current control under gate bias. DC IV characteristics of the HEMT are depicted in Fig. 1.1.3.

Fig. 1.1.3 Typical DC IV output (left side) and transfer (right side) characteristics of an AlGaAs/GaAs HEMT. (After Heuken et al., Ref. 4)

Fig. 1.1.4 Equivalent circuit model of the HEMT. Physical origin of each equivalent circuit element is shown. (After Heuken et al., Ref. 4) Operation of the HEMT can be described by a small-signal equivalent circuit model. Fig. 1.1.4 shows the HEMT equivalent circuit and the corresponding physical 5

origin of each circuit element. The gate-to-source capacitance, the transconductance, the gate-to-drain capacitance, and the output resistance are intrinsic elements; while the source resistance, drain resistance, and gate resistance are parasitic elements. These elements predict AC operation behaviors of the HEMT, and can be extracted from small-signal S-parameter measurements. The device model can be used in conjunction with the characterization and parameter extraction techniques to define performance characteristics of a HEMT. Making preliminary judgments, however, about the ultimate performance potential of devices or about which devices should be chosen for a particular application is often desirable. The first-order calculation of several performance figures of merit (FOMs) can be very useful for making preliminary judgments concerning active capabilities. The starting point for estimation of many FOMs is either microwave characterization data or determination of a complete equivalent circuit model for the device. FOMs of particular interest include cutoff frequency (fT), maximum frequency of oscillation (fmax), minimum noise figure (Fmin), output power density (Pout), power added efficiency (PAE) etc. These technical FOMs are only first-order indicators of ultimate performance limits. Data obtained in this fashion, however, can be used as a basis of coarse comparisons of active devices. The cutoff frequency of a HEMT is the frequency at which the short-circuit current gain ( h21 ) of the device falls to unity. In the first order approximation, the equivalent circuit in Fig. 1.1.4 gives the definition of fT: fT =

gm 2πC gs

The FOM fT does not represent the limiting frequency of microwave operation. This FOM can, however, be used to compare the approximate operation speed limits of

6

different devices. In general, the device with a high fT value will function usefully at higher frequency than a device with a much lower fT value. Considering the physical mechanism of HEMT operation, fT can also be represented by the channel electron drift velocity through the following equation. fT =

v sat 2πLg

It is apparent that higher electron velocity and smaller gate length result in higher cutoff frequency. The maximum frequency of oscillation fmax is the highest frequency at which power gain can be obtained from a device. This FOM, like fT, may be used as an indicator of the ultimate frequency limits of a device. As with the fT value, a high value of fmax is desirable if high frequency operation is of interest. For most microwave applications, the frequency fmax appears to be a more useful FOM than the frequency fT because microwave designers are typically concerned with power gain into conjugately matched conditions. The maximum frequency of oscillation is defined formally as the frequency at which the unilateral power gain (U) of a device reaches unity. U can be written in terms of device y-parameters: U=

y 21 − y12

2

4[Re( y11 ) * Re( y 22 ) + Re( y12 ) * Re( y 21 )]

fmax can be predicted from the device equivalent circuit. A first-order expression that is often used to determine the fmax of device can be written as: f max =

f T rds 1 / 2 ( ) 2 R gt

where rds is the device output resistance, Rgt is the sum of the gate resistance and channel charging resistance, and fT is the cutoff frequency. Although neither fT nor fmax is an ideal measure of the ultimate frequency capabilities of a device, when both 7

figures are considered in comparison, some insight is gained into the high frequency performance of devices relative to one another.

Fig. 1.1.5 Schematic representation of a HEMT operating in Class A. (After Nguyen et al., Ref. 5) The HEMT, with its high current density and operation frequency, is an ideal candidate for microwave power amplifiers. While fT and fmax are small-signal FOMs, large-signal FOMs, such as Pout and PAE, are needed to evaluate microwave power performance of the device. For class A operation, which is the most important class at microwave frequencies, the theoretical maximum output power of a HEMT is given by:

1 Pout . max = ( I max − I min )( BVds − Vk ) 8 where Imax is the maximum channel current, Imin is the minimum drain current due to gate-drain and/or source-drain leakage, BVds is the off-sate breakdown voltage, and Vk is the knee voltage. This simple approximation is graphically presented in Fig.

8

1.1.5, in which the HEMT is assumed to operate along its ideal load line, with an adequate large-signal gain. In addition to the Pout, PAE is also an important parameter, which is related to the device power gain for a class A power amplifier as follows: PAE =

Pout − Pin Pout 1 1 1 ) = (1 − ) = (1 − Pdc PDC Ga Ga 2

Thus in the lower frequency limit, in which 1/Ga approaches 0, the PAE approaches 1/2 under class A operation ( π / 4 under class B operation).

Table I. Material Properties of GaN in Comparison with Other Semiconductors. Material

Thermal Conductivity

Breakdown

(W/˚K-cm)

Field (V/cm)

Bandgap (eV)

Mobility (cm2/V-s)

Si

1.1

1.5

3×105

1300

GaAs

1.4

0.54

4×105

5000

SiC

2.9

4

3.8×106

260

GaN

3.4

1.3

2×106

1500

9

1.2

Development of AlGaN-GaN HEMTs

Nitride semiconductors such as AlN, GaN, InN and their alloys are promising materials for their potential application in electronic and optoelectronic devices [6]. These materials cover an energy band gap range of 0.8 eV to 6.2 eV, suitable for light emission with colors ranging from red to ultraviolet. Furthermore, GaN’s large bandgap, large field strength, high thermal conductivity, and good electron transport properties (as listed in Table I) make GaN based electronic devices very promising in high voltage, high power, and high frequency applications. As reported earlier [7], one of the most unique properties of nitride semiconductors is the existence of strong polarization field within the crystal, which has profound impact on electronic properties of GaN-based heterostructures. The polarization electric field in nitrides is two fold: spontaneous polarization field and strain induced piezoelectric field. Being non-centro-symmetric, nitrides exhibit large macroscopic polarization effects along the hexagonal c-axis in the wurtzite lattice. The values of spontaneous polarization field in nitrides are quite large, and of the same order of magnitude as in ferroelectric crystals. In addition, nitrides lack inversion symmetry and exhibit piezoelectric effects when strained along c-axis, the piezoelectric coefficients being an order of magnitude larger than those in other traditional III-V semiconductors [8]. The direction of polarization field in nitrides depends on the polarity of the crystal, namely whether the cation sites or the anion sites of the crystal bi-layers are facing toward the sample surface [9]. In cation-face samples, the polarization field points away from the surface to the substrate. (Fig. 1.2.1) While in anion-face samples, the direction of polarization field is inverted (Fig. 1.2.1). Almost all MOCVD grown nitrides are of cation-face. Nitride

10

alloys prepared by MBE are usually anion-face samples, yet one can invert the polarity by depositing a thin AlN buffer layer prior to the growth of GaN. With a strained Al0.3Ga0.7N layer coherently grown on a relaxed GaN substrate, polarization charges with the density of in the order of 1013 electrons/cm2 can be generated at the AlGaN/GaN heterointerface [10].

Fig. 1.2.1 Crystal structure of wurtzite GaN with Ga- and N-face polarity. (After Ambacher et al. Ref. 10) In an AlGaN/GaN heterostructure, the formation of 2DEG at the heterointerface is quite different from that in the AlGaAs/GaAs system. Due to the presence of a strong polarization field across the AlGaN/GaN heterojunction, a 2DEG with the density up to 1013 cm-2 can be achieved in the AlGaN/GaN heterostructure without any doping [11]. There are several possible sources of electrons contributing to 2DEG accumulation at the AlGaN/GaN heterointerface: the GaN buffer layer, the AlGaN barrier layer, and the AlGaN surface states. Charges in the GaN buffer layer should be negative so that a potential well can be formed in the GaN side and the 2DEG can be confined. The transfer of electrons from the GaN buffer layer to the 11

AlGaN/GaN interface leaves behind positive charges and consequently potential barriers, so by any means electrons in the 2DEG cannot come from the GaN buffer layer. Similar to AlGaAs/GaAs, modulation doping in AlGaN barrier layer positively contributes to the formation of 2DEG. However, in case the AlGaN barrier layer is undoped, a 2DEG density of 1012 ~ 1013 cm-2 can still be achieved [11]. How comes the 2DEG density so high without any doping? Ibbetson et al. theoretically and experimentally studied the formation of 2DEGs in AlGaN/GaN heterostructures and found that surface states act as source of the electrons in 2DEG [12]. The built-in static electric field in the AlGaN layer induced by spontaneous and piezoelectric polarization greatly alters the band diagram and the electron distribution of the AlGaN/GaN heterostructure. Thus considerable amount of electrons transfer from the surface states to the AlGaN/GaN heterointerface, leading to a 2DEG with the density up to 1013 cm-2, as sketched in Fig. 1.2.2. Koley et al. detailed investigated the surface potential of AlGaN/GaN heterostructures by using scanning Kelvin probe, and confirmed the contribution of surface states to 2DEG formation [14].

Fig. 1.2.2 Schematic representation of band profiles of AlGaN/GaN heterostructures with varying AlGaN thicknesses, which demonstrates how surface states participate in the screening of polarization field and contribute to the 2DEG formation. (After Morkoç et al., Ref. 13)

12

Making use of the high-density high-mobility AlGaN/GaN 2DEG, AlGaN/GaN HEMTs can be fabricated. Since the first demonstration of an AlGaN/GaN HEMT by Khan et al. in 1993 [15], tremendous progress has been made in the development of AlGaN/GaN HEMTs for microwave power amplifier applications. Several groups demonstrated power operation of AlGaN/GaN HEMTs at microwave frequencies, including the record-breaking result of 30 W/mm at 8 GHz by Wu et al [16]. In Table 1.2.1, a historical view on the development of GaN HEMTs was shown. Further development of GaN HEMTs relies on the improvement of material quality and the optimization of device structure.

Table II. Historical development of GaN HEMTs. Year

Even

Authors

Ref.

1969

GaN by hydride vapor phase epitaxy

Maruska and Tietjen

17

1971

GaN by MOCVD

Manasevit et al.

18

1992

AlGaN/GaN two-dimensional electron gas

Khan et al.

19

1993

AlGaN/GaN HEMT

Khan et al.

15

1994

Microwave AlGaN/GaN HFET

Khan et al.

20

1996

Microwave power AlGaN/GaN MODFET

Wu et al.

21

1998

Reveal current compression in GaN MODFETs

Kohn et al.

22

1999

6.9 W/mm @ 10 GHz GaN HEMT on SiC

Sheppard et al.

23

2000

Surface passivated AlGaN/GaN HEMTs

Green et al.

24

2004

30 W/mm @ 8 GHz GaN HEMT with field plate

Wu et al.

16

13

1.3

Objective of Synopsis of This Thesis

The principal objective of this thesis is to establish a viable technology for the fabrication of AlGaN-GaN HEMTs, to understand the operation mechanism of AlGaN-GaN HEMTs with a focus on main issues limiting device performance, and to develop novel HEMT structures with better performance and/or more functions. The organization of this thesis is as the follows. Chapter 2 gives an overall description on the development of baseline AlGaNGaN single-channel HEMTs. The AlGaN/GaN 2DEG was characterized by studying low-temperature magneto-transport properties. Layout design and device processing technologies for HEMT fabrication are described. DC IV, RF small-signal, and RF large-signal measurement methods and results are presented. Chapter 3 focuses on the analysis of trap states in AlGaN/GaN HEMTs. Trap states were characterized by measuring frequency- and bias-dependent admittance of an AlGaN/GaN Schottky diode. Interface state density and the corresponding time constant were extracted. Dynamic IV characterization was carried out for HEMTs subjected to different surface treatments. Correlation was found between surface trap states and current collapse, which is the bottleneck limiting large-signal performance of AlGaN-GaN HEMTs. Mechanism and consequence of the current collapse are discussed. Chapter 4 contains the major portion of the thesis author’s original research contribution during the study in master program. This chapter introduces the AlGaNGaN double-channel HEMT, which exhibit enhanced performance compared with the baseline AlGaN-GaN single-channel HEMT. Structure design and device characterizations including DC IV, RF small-signal and large-signal measurements

14

are treated in details. Unique features resulting from the novel double-channel design are emphasized. Finally, this thesis is summarized in chapter 5. Suggestions on future work are provided.

15

CHAPTER 2 ALGAN-GAN SINGLE-CHANNEL HEMTS

2.1

Electronic Properties of AlGaN/GaN Heterostructures

Operation of the AlGaN/GaN HEMT relies on the two-dimensional electron gas (2DEG) in the AlGaN/GaN interface. Assessment on the electronic properties of 2DEGs is crucial for evaluating the suitability of AlGaN/GaN epilayers toward HEMT fabrications. Among the 2DEG properties, electron density and mobility are two most important concerns. AlGaN/GaN heterostructure epilayers for material characterization and device fabrication were grown by MOCVD method in HKUST. The epilayers are grown on sapphire substrates, typically consisting of a 2.5-µm-thick GaN buffer layer and a selectively doped Al0.3Ga0.7N layer with the thickness in the range of 20~30 nm. Van der Pauw Hall measurement is the conventional method to determine the carrier density and mobility of a given sample [25]. An AlGaN-GaN single-channel HEMT epilayer with the AlGaN thickness of 30 nm and the doping level of 5×1018 cm-3 (denoted as sample A) has a Hall density of 2×1013 cm-2 and a Hall mobility of 853 cm2/V-s at room temperature. Another sample with similar structure but 24 nm thick AlGaN and 2×1018 cm-3 doping (denoted as sample B) has a Hall density of 1.5×1013 cm-2 and a Hall mobility of 980 cm2/V-s. We can see that thicker AlGaN and/or heavier doping result in larger carrier density but lower mobility. Van der Pauw Hall measurements are usually under single-carrier channel approximation. Accuracy will be affected when the sample has more than one carrier channel, e.g. an additional parallel conduction path. Another source of measurement

16

inaccuracy is that the results derived from Van der Pauw method somewhat depends on sample geometry and ohmic contact resistance. In order to obtain more accurate information about the 2DEG properties, magneto-transport studies were carried out under very low temperature (1.4 K) and very high magnetic field (up to 12 Tesla).

700

(a)

Rxy (Ω)

600

500

400

7

8

9

10

11

12

11

12

B (Tesla)

700

(b)

Rxy (Ω)

600

500

400

7

8

9

10

B (Tesla)

Fig. 2.1.1 Transverse resistance of the AlGaN/GaN sample as a function of magnetic field measured at 1.4 K. The step-like plateaus are due to quantum Hall effect. At low temperature and high magnetic field, 2DEGs show Shubnikov-de Haas (SdH) oscillations in the longitude resistance and quantum Hall effect plateaus in the transverse resistance. Details about the 2DEG magneto-transport properties can be found in Ref. 26 and 27. 2DEG characteristics such as electron density and mobility 17

can be extracted from the dependence of longitude/transverse resistance on magnetic field. Background electrons generated by impurity doping are usually frozen at low temperature, thus the low-temperature magneto-transport measurement is a more direct characterization of the 2DEGs. 4100

(a)

4000

Rxx (Ω)

3900 3800 3700 3600 3500

0

2

4

6

8

10

12

B (Tesla)

5600

(b)

5500

Rxx (Ω)

5400 5300 5200 5100 5000

0

2

4

6

8

10

12

B (Tesla)

Fig. 2.1.2 Longitude resistance of the AlGaN/GaN sample as a function of magnetic field measured at 1.4 K. Oscillations in the resistance are due to SdH effect. Fig. 2.1.1 (a) and (b) shows magnetic field dependence of transverse resistance of the aforementioned two AlGaN/GaN samples. Both samples show quantum Hall effect plateaus, indicating quantum confinement of the 2DEGs. Magnetic field dependence of longitude resistance was shown in Fig. 2.1.2 (a) and (b). SdH oscillations appear for both samples. With increasing magnetic field, sample A 18

shows a trend of rising up in the longitude resistance, suggesting the existence of a parallel conduction in the heavily doped AlGaN layer [28]. As to sample B, the longitude resistance tends to drop down as the magnetic field increases. The parabolic-like decreasing trend of longitude resistance was related to electronelectron interaction of the high-density 2DEG [29]. From the Fourier transformation of Rxx-1/B function, 2DEG density can be calculated [30]. As shown in Fig. 2.1.3 (a) and (b), sample A and B have a 2DEG density of 1.1×1013 cm-2 and 1.2×1013 cm-2 respectively; only the ground quantum state was occupied.

FFT (a. u.)

(a) -2

Ns = 1.2E13 cm

0

200

400

600

800

1000

Frequency (1/B) (Tesla)

(b)

-2

FFT (a. u.)

Ns = 1.1E13 cm

0

200

400

600

Frequency (1/B) (Tesla)

800

1000

Fig. 2.1.3 Fast Fourier transformation of Rxx-1/B function. 2DEG densities are derived from the X-axis value of the peak position.

19

Without observing the trend of rising up in longitude resistance, Sample B has minimal parallel conduction in the AlGaN barrier layer. Discrepancies between electron densities obtained from Hall measurement and SdH measurement are attributed to background electrons in the GaN buffer layer. Assuming a uniform distribution of background electrons in the 2-µm-thick GaN buffer layer, a background electron concentration of 2×1016 cm-3 was derived. Origin of the unintentional n-doping could be nitrogen vacancies and/or oxygen impurities. Hall carrier density of sample A is 8×1012 cm-2 higher than that extracted from SdH measurement. After subtracting a background-related carrier density of 4×1012 cm-2, we can deduce that there is a parallel carrier channel with the density 4×1012 cm-2 of in the heavily doped AlGaN layer. From above measurement and calculation results, we can draw following conclusions. Background electron concentration of the GaN buffer is around 2×1016 cm-3. AlGaN/GaN epilayers grown in our group have a 2DEG density about 1×1013 cm-2. Thicker AlGaN and/or heavier doping slightly increase the 2DEG density, and introduce significant parallel conduction in the AlGaN barrier layer. In the remainder of this chapter, all results are derived from HEMTs with epilayer structure the same as that of sample B.

20

2.2

Device Processing Technologies

A basic HEMT process flow includes mesa isolation, source/drain metallization, gate metallization, and an optional passivation step. Fig. 2.2.1 shows the layout of a typical HEMT with 1-µm-long and 2×50-µm-wide gate. The photograph of a HEMT after device processing is demonstrated in Fig. 2.2.2. Cross sectional schematic of the AlGaN-GaN single-channel HEMT is shown in Fig.2.2.3.

Fig. 2.2.1 Layout of a 2×50µm×1µm HEMT.

Fig. 2.2.2 Photograph showing the top view of a fabricated HEMT.

21

Gate

Sourc

Drain

AlGaN

GaN

Substrate (SiC, Sapphire)

Fig. 2.2.3 Cross-sectional schematic of an AlGaN-GaN single-channel HEMT. Chlorine gas-based Inductively-Coupled-Plasma (ICP) etching was used for mesa isolation. Etching was performed in a STS ICP system. With the RF power of 135 W, the Cl2 gas flow of 15 sccm, and the He gas flow of 10 sccm, 40 seconds etching results in an etched depth of 300 nm for a baseline AlGaN-GaN singlechannel HEMT sample. Note that the etching rate is not a linear function of time, and AlGaN layers with higher Al composition have slower etching rate. 150

Measurement Data Linear Fit

Resistance (Ω)

120 90 60

RC = ~ 1.1 Ω-mm ρS= 354 Ω/square

30 0

0

5

10

15

20

25

30

35

Spacing (µm)

Fig. 2.2.4 TLM measurement results of an AlGaN-GaN single-channel HEMT sample after device processing. Contact resistance and sheet resistivity are derived. For source/drain ohmic metallization, Ti/Al/Ni/Au (20nm/150nm/50nm/80nm) multilayer was deposited in an e-beam evaporation system and annealed at 850 ºC in 22

N2 ambient for 30 seconds. With this method, contact resistance of 1 Ω-mm can be achieved on a reproducible basis. Fig. 2.2.4 shows transfer-length-measurement (TLM) results of metal contacts on baseline AlGaN-GaN single-channel HEMT. A sheet resistivity of and a contact resistance of are derived. 3.0 2.5

2

I (A/mm )

2.0 1.5 1.0 0.5 0.0 -0.5 -12

-9

-6 -3 Bias (V)

0

3

Fig. 2.2.5 DC IV characteristics of a Schottky diode fabricated on the baseline AlGaN-GaN single-channel HEMT epilayer.

2

Capacitance (pf/cm )

1000

3 MHz 800 600 400 200 0 -10

-8

-6

-4

-2

0

Bias (V)

Fig. 2.2.6 CV characteristics of an AlGaN/GaN Schottky diode measured at 3 MHz.

23

Owing to the large work function and the good adhesion with semiconductor materials, e-beam evaporated Ni/Au (20 nm/300 nm) bi-layer was chosen as the Schottky metal. Fig. 2.2.5 shows DC IV characteristics of an AlGaN/GaN Schottky diode. Capacitance-voltage (CV) characteristics of the AlGaN/GaN Schottky diode can be measured, as shown in Fig. 2.2.6. And the carrier distribution profile can be extracted using the method described in Ref. 31, as shown in Fig. 2.2.7. Results are

-3

Electron Concentration (cm )

in good agreement with transport measurements described in Section 2.1.

20

10

19

10

18

10

17

10

16

10

0

50

100 150 Depth (nm)

200

250

Fig. 2.2.7 Electron distribution profile extracted from the CV characteristics.

24

2.3

DC IV Characteristics

1200

VG Start: 1 V, Step: -1 V

ID (mA/mm)

1000 800 600 400 200 0

0

2

4

6

8

10

12

14

VDS (V)

Fig. 2.3.1 DC IV output characteristics of an AlGaN-GaN single-channel HEMT.

1200

200

800

160

600

120

400

80

200

40

0 -9

-8

-7

-6

-5

-4

-3

-2

-1

0

1

Gm (mS/mm)

ID (mA/mm)

1000

240

VDS = 10 V

0

VGS (V)

Fig. 2.3.2 DC IV transfer characteristics of an AlGaN-GaN single-channel HEMT. DC characteristics of HEMTs with 10-µm-wide gate were measured by using an HP 4156 semiconductor parameter analyzer. Output and transfer IV characteristics are shown in Fig. 2.3.1 and Fig. 2.3.2 respectively. The maximum drain current is

25

930 mA/mm at +1 V gate bias. The peak transconductance is 185 mS/mm. And the pinch-off voltage is -4.5 V. The off-sate drain breakdown voltage is around 60 V. There is a notable hysteresis between the transfer curves obtained from upward and downward sweeping directions. The upward trace shows lower drain current as well as smaller transconductance. This behavior is attributed to trap-related delay, or namely the “current collapse”, of AlGaN/GaN HEMTs. A detailed discussion on the current collapse will appear in Chapter 3. Fig. 2.3.3 shows the drain current and the gate current as a function of gate bias in semilog scale. Both the drain leakage and

ID, IG (mA/mm)

the gate leakage are in the order of 0.1 mA/mm at VDS = 10 V

10

3

10

2

ID

10

1

IG

10

0

10

-1

10

-2

10

-3

10

-4

10

-5

VDS = 10 V

-8

-6

-4

-2

0

2

VGS (V)

Fig. 2.3.3 DC IV transfer characteristics of an AlGaN-GaN single-channel HEMT in semilog scale.

26

2.4

RF Small-Signal Measurement and Analysis

Small-signal characteristics of the HEMTs can be obtained by measuring Sparameters at different DC biases. Fig. 2.4.1 depicts the small-signal measurement setup. An Agilent 8277 vector network analyzer (VNA) was used for s-parameter measurement in 50 MHz ~ 40 GHz range. An Agilent 4142 source/monitor unit was used for DC biasing. RF probe station with co-planar microwave probes and co-axial cables were used to connect the device to the VNA.

Fig. 2.4.1 Schematic of the measurement setup for RF small-signal characterization. From the measured S-parameters, we can derive RF FOMs such as fT and fmax. As shown in Fig. 2.4.2, a baseline AlGaN-GaN single-channel HEMT with 1 µm gate length has a fT of 13 GHz and a fmax of 35 GHz. Nominally undoped GaN films grown by the present MOCVD techniques usually show slight n-type, with a background electron concentration in the order of 1016 cm-3, as discussed in section 2.1 of this chapter. Consequently, there are parasitic capacitance and conductance components between the contact pads and the non-insulating GaN buffer layer, 27

which contribute to RF measurement results and may mask some intrinsic electrical characteristics of the HEMTs. Open-pad de-embedding with the S-parameters of a dummy pad can effectively strip pad-related parasitics. The de-embedding process is performed in this way: (1) convert S-parameters of the HEMT (Smeas) into Yparameters (Ymeas); (2) convert S-parameters of the dummy pad (Spad) into Yparameters (Ypad); (3) subtract Ypad from Ymeas, yielding de-embedded Y-parameters (Y); (4) convert the de-embeded Y into S-parameters (S). A comparison between Sparameters before and after de-embedding is presented in Fig. 2.4.2. After deembedding, both the current gain (|h21|2) and the unilateral power gain (U) show better 20 dB per decade roll-off, as shown in Fig. 2.4.3. The de-embedded fT and fmax

meas_s[0,30,::] s

are slightly higher than the as measured results.

frequency (100000000.000 to 39100000000.000)

Fig. 2.4.2 S-parameters of an AlGaN-GaN single-channel HEMT before (open circiles) and after (solid lines) performing open pad de-embedding. 28

50

VGS=-3.5V, VDS=10V

Gain (dB)

40 30

2

|h21| U

after de-embedding

20 10

as measured

0 100M

1G 10G Frequency (Hz)

100G

Fig. 2.4.3 Frequency dependence of the current gain (|h21|2) and unilateral power gain (U). A comparison was made between results before and after de-embedding. Possibly due to the degradation of electron velocity induced by AlGaN/GaN interface scattering, the AlGaN-GaN single-channel HEMTs usually show reduction of fT and fmax at high current levels (Fig.2.4.4). The degradation of RF performance at high current level limits RF power performance of the HEMTs. This problem is to be solved to make the GaN HEMTs suitable for power application at high frequency.

Frequency (GHz)

40

fT fmax

VDS = 10 V

30

De-embedded 20

As Meausured

10 0 -5

-4

-3

-2

VGS (V)

-1

0

1

Fig. 2.4.4 fT and fmax of an AlGaN-GaN single–channel HEMT at different gate bias.

29

2.5

RF Large-Signal Power Measurement

SiN passivation can alleviate the current collapse problem and increase the breakdown voltage [24], though it is not always effective. RF power performance of SiN passivated AlGaN-GaN single-channel HEMTs was measured by using a Maury load-pull system. A signal generator gives the RF input signal. A DC source/monitor unit provides DC bias through the bias tee. The power meter in conjunction with the power sensor measures the RF output signal. Spectrum analyzer reads power levels at different frequency bands. Impedances at the input and the output side can be tuned to optimize the output power. Measurement is controlled by a computer. Fig. 2.5.1 depicts the setup of the load-pull system.

Fig. 2.5.1 Schematic of the measurement setup for RF large-signal characterization. At a frequency of 2 GHz, a maximum output power density of 1 W/mm and a peak PAE of 17% were achieved from an AlGaN-GaN single-channel HEMT with 1 µm gate length and 100 µm gate width. This power performance is far below the theoretical value expected from DC IV characteristics. Trap-related current collapse and power loss are possible reasons leading to the inferior large-signal performance. 30

Poor thermal conductivity of the sapphire substrate could result in inefficient heat dissipation and limit the power performance.

Pout (dBm), Gain (dB) PAE(%)

25 20 15

VGS= -3V, VDS = 25V Pout Gain PAE

10 5 0 -10

-5

0

5

Pin (dBm)

10

15

Fig. 2.5.2 Output power, power gain, and power added efficiency as a function of input power.

31

CHAPTER 3 TRAP STATES AND CURRENT COLLAPSE IN ALGAN/GAN HEMTS

Trap states are inevitable in GaN-based HEMTs. The trap states refer to deep level states in the forbidden gap, which may delay frequency response and induce power loss. Most performance degradation and device instability problems, such as the current collapse, are caused by trap states. In this chapter, an investigation is given on the trap states and the current collapse behaviors of AlGaN/GaN HEMTs. First, an overview on the location and origin of the trap states in AlGaN/GaN heterostructures is provided. After that, those trap states are studied by frequencyand bias-dependent admittance measurement and analysis. In the last section, we introduce the dynamic IV characterization, a method to evaluate current collapse behaviors of the AlGaN/GaN HEMTs. Mechanism and consequence of the current collapse were analyzed. By comparing dynamic IV characteristics of AlGaN/GaN HEMTs subjected to different surface treatments, correlation was found between current collapse and trap states on device surface.

32

3.1

Overview of Trap States in AlGaN/GaN Heterostructures

Development of AlGaN/GaN HEMT microwave power amplifiers are largely hindered by the limiting effect of the trap states in AlGaN/GaN heterostructures [32]. These traps may appear on the AlGaN surface, in the AlGaN barrier layer, at the AlGaN/GaN heterointerface, or in the GaN buffer layer, as the schematic shown in Fig. 3.1.1. Presence of trap states in AlGaN/GaN HEMTs can cause a voltage delay in device operation through trapping and de-trapping process, thereby degrading the power handling capability at high frequency.

Surface Traps

Interface Traps Source

Gate

Drain

AlGaN

GaN

Substrate (SiC or Sapphire) Buffer Traps Fig. 3.1.1 Cross-sectional schematic of an AlGaN-GaN single-channel HEMT showing possible locations of trap states. The surface of a crystal interrupts the perfect periodicity of the crystal lattice. The layer of atoms at the surface has un-terminated or “dangling” bonds. It is hence easy to imagine that at the surface of the crystal, the band structure can be modified, and there can now be states in the otherwise forbidden energy gap. These states are

33

localized and exist only at the crystal surface. There are two kinds of surface trap states: intrinsic surface states and defect related extrinsic surface states. The term “intrinsic” refers to the fact these states would exist in an ideally perfect surface. They correspond to solution of Schrödinger equation with energy levels within the forbidden gap. The extrinsic surface states are caused by defects or impurities at the surface, forming during crystal growth or in subsequent device fabrication processes. Similar to the case of surface states, interruption of the periodicity of the crystallattice at the heterointerface forms interface states. Interface states can also be induced by interface roughness and compositional non-uniformities. In lack of a suitable substrate, GaN and GaN-based alloys are usually grown on sapphire or SiC with large lattice mismatch. Consequently, AlGaN/GaN epilayers grown with presently available technology are imperfect crystals with dislocations, impurities, and defects in the material. These defects may cause the formation of deep level trap states within the GaN and AlGaN layer.

34

3.2

Characterization of Trap States in AlGaN/GaN Heterostructure

With its capacitance nature and the charging resistance associated with the capacitance, trap states usually cause a frequency dispersion of admittance. Bias- and frequency-dependent admittance measurements were carried out to characterize trap states in AlGaN/GaN heterostructures. An equivalent circuit model was deployed to analyze the location, distribution, and electronic properties of trap states. Modulation doped AlGaN/GaN heterostructure samples with different AlGaN thicknesses and Al compositions were grown by metal organic chemical vapor deposition (MOCVD). Based on high-resolution X-ray diffraction measurements, the AlGaN film thickness and Al composition of three samples in our study were determined to be 37 nm of Al0.24Ga0.76N, 37 nm of Al0.19Ga0.81N, and 29 nm of Al0.19Ga0.81N, respectively. Room-temperature Hall mobility and carrier density measured by the Van der Pauw technique are around 1400 cm2/V-s and 7×1012 cm-2, respectively. In order to facilitate the frequency- and bias-dependent admittance measurements, circular Schottky diodes were fabricated using Ti/Al/Pt/Au as Ohmic metal, and Pt/Au as Schottky metal, as depicted in the inset of Fig. 3.2.1. Capacitance and conductance of the AlGaN/GaN Schottky diodes were measured using an HP 4284 Precision LCR Meter. The amplitude of the AC signal was kept at 20 mV so that small signal conditions were maintained. The DC bias voltage was swept from -6.0 to +1.0 V and the measurement frequency was varied from 10 KHz to 1 MHz. High-frequency probes and cables were used to connect the Schottky diodes to the LCR meter, and calibration was done for each measurement frequency. As an example, the measured results of one AlGaN/GaN sample with a 37 nm Al0.24Ga0.76N layer are shown in Fig. 3.2.1.

35

Fig. 3.2.1 (a) Capacitance and (b) conductance as a function of DC bias at different measurment frequencies for an AlGaN/GaN heterostructure sample with a 37 nm thick Al0.24Ga0.76N layer. A modulation doped AlGaN/GaN heterostructure can be treated as a metalinsulator-semiconductor capacitor with the AlGaN layer acting like an insulator [33]. As shown in Fig. 3.2.2 (a), the gate-to-channel capacitance of an ideal AlGaN/GaN Schottky diode contains two components: the capacitance of the fully depleted AlGaN layer (CAlGaN) and the capacitance of the GaN depletion region (CGaN). As a result of lattice mismatch between AlGaN and GaN, and possibly compositional nonuniformity caused by alloy clustering, there could be considerable amount of trap states at the AlGaN/GaN interface. Adopting an analytical model of interface trap states in metal-oxide-silicon (MOS) system [34], the electrical behavior of the interface trap states can be modeled as a capacitive (Cit) and a conductive (Git) component in parallel connection with the GaN depletion region capacitor (CGaN). Taking into account the effect of interface trap states, the equivalent circuit of an AlGaN/GaN Schottky diode is modeled as shown in Fig. 3.2.2 (b). 36

Fig. 3.2.2 Equivalent circuit model of an AlGaN/GaN Schottky diode, (a) without considering any trap states, (b) considering the AlGaN/GaN interface states, (c) considering both the interface and the surface trap states. Similar to the interface trap states, surface states are present at any metalsemiconductor interface. For a typical Schottky diode fabricated in ambient conditions, there exists an insulating interfacial layer between the metal and semiconductor surface [35]. The insulating interfacial layer is only a few monolayers thick so that the metal can easily communicate electrons with the trap states at the semiconductor surface. This trapping and de-trapping process can be modeled as a serial combination of the surface-traps-related resistance (Rsurf) and capacitance (Csurf) in parallel connection with the interfacial layer capacitor (Ci). Considering both the interface and the surface trap states, the equivalent circuit representation of an AlGaN/GaN schottky diode is as shown in Fig. 3.2.2 (C). It should be noted that in addition to the interface and surface trap states, there might be traps within the bulk GaN and AlGaN related to crystal defects and imperfections. Nevertheless, since these traps states are usually deep below the conduction band edge and have time constants as large as milliseconds [36], their effects are negligible as we are

37

investigating the trap-induced device phenomena in the 10 KHz to 1MHz frequency range.

Fig. 3.2.3 Energy band diagrams of an AlGaN/GaN heterostructure in electron accumulation and depletion mode. As shown in Fig. 3.2.1, frequency dispersion of the admittance strongly depends on the external bias, and becomes significant in the vicinity of threshold voltage, indicating interface trap states are the dominant trapping mechanism in the 10 KHz ~ 1MHz frequency regime. The trapping/de-trapping of AlGaN/GaN interface states does not take place at zero or very small reverse bias, where the AlGaN/GaN heterojunction is in electron accumulation mode (Fig. 3.2.3, left side). As the reverse bias voltage increases, electrons in AlGaN/GaN interface are gradually depleted, the Fermi level at the interface sweeps downward into the GaN bandgap, and AlGaN/GaN interface trap states start to respond to external voltage signals (Fig. 3.2.3, right side). From Fig. 3.2.3, the relative position between the surface Fermi level and the energy levels of AlGaN surface states remains roughly constant at different biases. As a result, the response of the surface states to an external AC signal remains the same whether the 2DEG channel is under accumulation (zero or very small bias) or depletion (large reverse bias). From this point of view, the surface trap states related component can be eliminated and the effect of the interface 38

trap states can be extracted by comparing the admittance measured at electron accumulation and depletion. Based on the admittance measurement results, the following extraction was carried out: (1) convert the measured admittance data to impedance form. At any bias voltage, the combined impedance of the GaN depletion region and interface traps related component could be obtained by subtracting the total impedance with the impedance measured at zero bias (where CGaN, Cit and Git can be neglected, Fig. 3.2.2 (c)); (2) convert the combined impedance of GaN depletion region and interface traps related component back to admittance form; (3) considering a continuous interface trap state distribution, the trap state density (Dit) and the corresponding time constant (τ) can be extracted based on the frequency dependence of the parallel conductance (Git). The detailed extraction routine can be found in Ref [33] and [34]. The experimental and fitted conductance-frequency curves of sample A are shown in Fig. 3.2.4. The extracted Dit and τ are in the order of 1013 ~ 1014 cm-2eV-1 and 0.1~1 µs, respectively. With increase of the reverse bias and the GaN layer changing from accumulation to depletion, the Fermi level at the AlGaN/GaN heterointerface gets swept through the interface trap energy levels that are located within the GaN bandgap. Among the interface trap states, those with higher energy level exhibits shorter time constant for the trapping/de-trapping process. As a result, the time constant is a good indicator of the trap state energy level. In order to gain a qualitative understanding on the distribution of interface trap states within the GaN bandgap, we plotted the trap state density against the corresponding time constant, as illustrated in Fig. 3.2.5. Measurement of different samples indicates that an increase of AlGaN layer thickness and/or an increase of the Al content lead to higher interface

39

trap state density. This can be explained by greater dislocation density and interface roughness induced by lattice mismatch between AlGaN and GaN.

2.5

Git/2πf (nf)

2.0

Scattered dots: experimetal data Lines: fitted curves

1.5

1.0

V = -3.5 V

0.5

V = -0.5 V 0.0

0.1

1

2πf (MHz)

10

Fig. 3.2.4 Extraction of interface trap state density (Dit) and time constant (τ) by fitting the normalized conductance (Git/2πf) vs. angular frequency (2πf) dependence at different gate biases.

8

A 37nm Al0.24Ga0.76N B 37nm Al0.19Ga0.81N C 29nm Al0.19Ga0.81N

13

-2

-1

Dit (10 cm eV )

7 6 5 4 3 2 1

0.1

1

τ (µs)

10

Fig. 3.2.5 Interface state density as a function of the corresponding time constant for AlGaN/GaN samples with different AlGaN barrier thickness and Al content.

40

3.3

Analysis of Current Collapse in AlGaN/GaN HEMTs

HEMTs made of AlGaN/GaN heterostructures usually exhibit high drain current density at DC and excellent RF characteristics in small-signal condition. However, the AlGaN/GaN HEMTs are usually plagued with current collapse [37, 38], which is also referred to as current slump, current compression, current instability, or RF dispersion. Under high-frequency large-signal input drive, the output current swing gets compressed drastically, resulting in reduced output power density (Pout) and power added efficiency (PAE). Trapping/de-trapping of surface states in the gate-todrain region is likely responsible of the current collapse [39, 40]. There are also other alternative explanations such as trapping within the AlGaN layer [41], virtual back gate effect of the GaN buffer [42], gate bias-induced nonuniform strain in the AlGaN barrier layer [43], and source resistance modulation due to space-charge suppression of the electric field in the source-to-gate region [44]. Introduce of surface passivation layer such as Si3N4 sometimes alleviates the current collapse [24, 45]. However, the effect of Si3N4 passivation is very sensitive to Si3N4 film quality and device surface condition before Si3N4 deposition. Reproducibility of the Si3N4 passivation is low. One is motivated to gain better understanding on the mechanism of current collapse, and to find hints for reducing the current collapse on a reproducible basis. Dynamic IV measurement was adopted to characterize current collapse of the AlGaN/GaN HEMTs. The dynamic IV measurement was performed in this way: biasing the device to a quiescent point, drain current at each bias point of the IV plane are recorded immediately after pulsing the gate (VGS) and drain bias (VDS) synchronously from the quiescent point to the bias under testing. This method can simulate RF large-signal behaviors and provides a powerful tool for the analysis of

41

RF current collapse in AlGaN/GaN HEMTs. Dynamic IV characteristics of an unpassivated AlGaN-GaN single-channel HEMT were measured using Accent’s DIVA D225 system and shown in Fig. 3.3.1. The device under testing has a gate length of 1 µm and a gate width of 2×50 µm. The pulse width is 1 µs and the pulse separation is 1 ms. During the measurement, 6 different quiescent points were chosen. DC output IV characteristics of the same HEMT were given for comparison.

120

DC Quiescent Point VGS = 1 V, VDS = 0 V Quiescent Point VGS = 1 V, VDS = 10 V VGS: -5 ~ 1 V, in 1 V step

IDS (mA/mm)

100 80

(a)

60 40 20 0 0

120 IDS (mA/mm)

100 80

2

4 V 6 DS

8

DC Quiescent Point VGS = -2 V, VDS = 0 V Quiescent Point VGS = -2 V, VDS = 10 V VGS: -5 ~ 1 V, in 1 V step

10

(b)

60 40 20 0 0

2

4 V 6 DS

42

8

10

120

DC Quiescent Point VGS = -5 V, VDS = 0 V

IDS (mA/mm)

100 80

(c)

Quiescent Point VGS = -5 V, VDS = 10 V VGS: -5 ~ 1 V, in 1 V step

60 40 20 0 0

2

4 V 6 DS

8

10

Fig. 3.3.1 Dynamic IV characteristics of an AlGaN-GaN single-channel HEMT at different quiescent bias points in comparison with DC output IV characteristics. When the quiescent point is at VGS=1 V and VDS= 0 V, the pulsed drain current does not show any collapse and is higher than the DC current due to the alleviation of self-heating effect (Fig. 3.1.1 (a)). As the quiescent VGS goes to higher drain bias, e.g. 10 V, current collapse starts to occur (Fig. 3.1.1 (a)). Similar behaviors are observed when the VGS is at –2 V, which is the gate bias for class A operation (Fig. 3.1.1 (b)). We found that drain current pulsed from VGS = 1 V and VDS = 10 V is slightly smaller than that pulsed from VGS = -2 V and VDS = 10 V, which is possibly induced by more severe self-heating when biased at higher current level. However, as the VGS moves to the pinch-off voltage –5 V, current collapse becomes very severe (Fig. 3.1.1 (C)). In view of this trend, we conclude that current collapse tends to occur in the process of pulsing the drain-side edge of the gate from off-state (or depletion mode, usually at negative VGS or high VDS) to on-state (or accumulation mode). This observation is in agreement with the model that trapping/de-trapping in

43

the gate-to-drain spacing region induce current collapse, as sketched in Fig. 3.3.2.

Fig. 3.3.2 Schematic drawing showing the occurrence of current collapse during the process of an off-to-on transient. Frequency response is delayed by trap states in the gate-to-drain spacing region. Under negative gate bias and/or high drain bias, the drain side of the gate edge is depleted and highly resistive. When the working point moves to higher current level, the drain side of the gate edge will immediately get populated with electrons and become conductive in the ideal case. However, the electron population process is

44

delayed by trap states (e.g. surface states) in the gate-to-drain spacing region. As a result, the drain side of the gate edge remains highly resistive in the transient state and the RF current is largely compressed comparing with the DC current at steady state. It is noteworthy that when the device is biased at higher VDS, the pulsed drain current shows more collapse. This is due to the fact that there is an effective off-toon pulse between the gate and drain terminals when VDS is pulsed from a high voltage to smaller voltages. All of these results suggest that during large signal operation of AlGaN/GaN HEMTs, the drain current will collapse when the output AC signal is swinging from the quiescent bias point toward lower VDS and/or higher VGS, as the arrow pointing in Fig. 3.3.2. In another word, during large-signal operation of AlGaN/GaN HEMTs, upside waveform of the output signal more likely suffers from current collapse, while the downside waveform of the output signal remains un-collapsed.

ICP Damage

Source

Gate

Drain

AlGaN

GaN

Substrate (SiC, Sapphire)

Fig. 3.3.3 Schematic showing the post ICP treatment of the AlGaN/GaN HEMT. 45

In order to find out correlations between current collapse and surface trap states, one will be interested in making comparisons between an AlGaN/GaN HEMT with less surface states and another one with more surface states. With the present device technologies, it is hard to find a way to reduce the surface states of AlGaN/GaN HEMTs on a steady and controllable basis. We chose to intentionally increase the surface trap states of some HEMTs for comparison with those baseline HEMTs. It is well known that ICP treatment of the AlGaN/GaN samples causes harsh surface damage and induces additional surface trap states [46]. Current collapse behaviors of AlGaN/GaN HEMTs with and without ICP post-treatment were compared. After device fabrication, AlGaN/GaN HEMTs intended for surface damage were loaded into ICP chamber for plasma treatment. The plasma power is 60 W; the gas flow is 25 sccm He, and the chamber pressure is 5 mTorr. With gate and source/drain metals acting as etching masks, only the spacing region between gate and source/drain metal was subjected to ICP treatment, as the schematic shown in Fig. 3.3.3

100

ID (mA)

80

Before ICP After ICP

DC

60 40 20 0 0

2

4 6 VDS (V)

8

10

Fig. 3.3.4 DC IV characteristics of a HEMT before and after ICP treatment. 46

100 Before ICP After ICP

ID (mA)

80 60 40

Bias point: VDS=10V, VGS=-5V Pulse Width: 1 µs Pulse Seperation: 1 ms

20 0 0

2

4 6 VDS (V)

8

10

Fig. 3.3.5 Dynamic IV characteristics of a HEMT before and after ICP treatment. Fig. 3.3.4 shows DC IV characteristics of an AlGaN/GaN HEMT before and after He gas ICP treatment. We can see that after 15 seconds ICP treatment, DC characteristics of the device remain unchanged, indicating there is no etching of the AlGaN/GaN epilayer. However, it is obvious in Fig. 3.3.5 that dynamic IV characteristics were drastically changed by the ICP treatment. Device after the ICP treatment has more surface traps and shows more severe current collapse, indicating that surface traps in the gate-to-drain region are possibly the dominant trap states responsible for the current collapse.

47

CHAPTER 4 ALGAN-GAN DOUBLE-CHANNEL HEMTS

4.1

Motivation and Epilayer Design

Motivated by the enhancement of drain current density and the additional freedom of modulating gain linearity [47-49], there were research efforts in developing double- or multi-channel HEMTs with GaAs- [48] and InP-based materials [49]. Device epilayers made of these materials usually require intentional doping in the channel or the barrier layer to form carrier channels, leading to low electron mobility and large buffer leakage. Owing to the novel polarization effect of nitride semiconductors, high-density and high-mobility 2DEG can be achieved at the AlGaN/GaN interface without any intentional doping [11]. This unique feature enables the design of AlGaN-GaN double- or multi-channel HEMTs with excellent electron transport and hard pinch-off. By applying Poisson equation and Fermi-Dirac statistics, we calculated the band profile and the electron distribution of an AlGaN/GaN/AlGaN/GaN multilayer structure. Parameters used for calculation are the same as those listed in Ref. 51. For comparison, we also did calculation for a hypothetical AlGaN/GaN/AlGaN/GaN multilayer structure, where polarization effect is not present but the AlGaN barrier layers are modulation n-doped. As shown in Fig. 4.1.1 (a) and (b), polarizationinduced 2DEG channels are well confined at the AlGaN/GaN interfaces without forming parasitic conduction channel in the AlGaN barrier layers. When the polarization effect is in absence, n-type doping of the AlGaN layers not only leads to accumulation of 2DEG channels, but also results in parallel conduction paths within

48

the doped AlGaN layers. Capacitance-voltage (CV) characteristics of the two AlGaN/GaN/AlGaN/GaN multilayer structures were simulated and plotted in Fig. 4.1.1 (c), showing that polarization effect results in well-defined two electron channels with high electron densities (1.0×1013 cm-2 in the upper channel and 0.3×1013 cm-2 in the lower channel). AlGaN GaN AlGaN GaN with polarization with n-doping

0.5 0.0

(a)

-0.5

-3

Concentration (cm )

Energy (eV)

1.0

19

10

17

10

0

30

60 Depth (nm)

90

120

800

2

Capacitance (nf/cm )

(b)

15

10

600 400

with polarization -2 upper channel: Ns=1.0E13 cm -2 lower channel: Ns=0.3E13 cm with n-doping -2 upper channel: Ns=0.7E13 cm -2 Lower channel: Ns=0.2E13 cm

200 (c) 0 -10

-8

-6

-4 -2 Bias (V)

0

2

Fig.4.1.1 Simulated conduction band diagrams (a), electron distribution profiles (b), and CV characteristics (c) of two hypothetical AlGaN/GaN/AlGaN/GaN multilayer structures. One is with polarization effect and without doping (solid lines); the other one is modulation n-doped but without polarization effect (dashed lines).

49

3 nm undoped Al0.3Ga0.7N 18 nm Si-doped Al0.3Ga0.7N 3 nm undoped Al0.3Ga0.7N 14 nm undoped GaN 21 nm undoped AlxG1-xN (x graded from 3% to 6%) 2.5 µm GaN buffer Sapphire

Fig. 4.1.2 Cross sectional structure of an AlGaN-GaN double-channel sample.

Fig. 4.1.3 Cross-sectional TEM image of a MOCVD grown AlGaN-GaN doublechannel HEMT epilayer. Epilayers for the double-channel HEMT fabrication were grown in an Axitron 2000HT metal organic chemical vapor deposition (MOCVD) reactor on sapphire substrates. As depicted in Fig. 4.1.2, the layered structure consists of a 2.5-µm-thick undoped GaN buffer layer, a 21-nm-thick AlGaN bottom barrier layer with the Al composition graded from 3% at the lower interface to 6% at the upper interface, a 14-nm-thick GaN channel layer, and a 24-nm-thick Al0.3Ga0.7N top barrier layer. In

50

order to enhance the channel electron density and facilitate good ohmic contacts, the top AlGaN barrier layer was selectively doped with Si. Grading profile of Al composition of the lower AlGaN layer was designed to allow efficient access to the lower electron channel [51]. Cross-sectional structure of the MOCVD grown AlGaN/GaN/AlGaN/GaN multilayer was confirmed by a transmission electron

-3

Electron Concentration (cm )

microscope (TEM) image shown in Fig. 4.1.3.

20

10

19

10

18

10

17

10

16

10

15

10

0

50 100 150 200 250 300 Distance from The Surface (nm)

Fig. 4.1.4 Electron distribution profile of the double-channel HEMT extracted from measured CV characteristics. Under single carrier channel approximation, the measured Hall mobility and sheet electron density are 1050 cm2/V-s and 1.6×1013 cm-2 at room temperature, 4030 cm2/V-s and 1.5×1013 cm-2 at liquid nitrogen temperature. CV measurements were carried out to profile the carrier distribution, showing that there are two electron channels with a 35 nm peak-to-peak separation (Fig. 4.1.4). The two electron channels are located at the upper and lower AlGaN/GaN interfaces (i.e., 24 nm and 59 nm below sample surface) of the AlGaN/GaN/AlGaN/GaN multilayer structure respectively. These characterization results suggested successful implementation of a double-channel HEMT epilayer with good electron transport properties. 51

4.2

DC IV Characteristics

Double-channel HEMTs were fabricated using the AlGaN/GaN/AlGaN/GaN epilayer described above. Mesa isolation was formed by etching a depth of 300 nm with Cl2-based inductively coupled plasma (ICP). Source and drain ohmic contacts were made of Ti/Al/Ni/Au multilayer annealed at 850 oC for 30 seconds, yielding contact resistance typically around 1.0 Ω-mm. Finally, Ni/Au Schottky gate was defined by optical lithography with 1 µm gate length. Devices were not passivated prior to DC and RF small-signal testing.

1200 VGS start: 1 V step: -1 V

ID (mA/mm)

1000 800 600 400 200 0 0

3

6 9 VDS (V)

12

15

Fig. 4.2.1 DC IV output characteristics of a double-channel HEMT. 10-µm-wide devices typically show a maximum drain current density (ID) around 1100 mA/mm and a peak transconductance (GM) of 180 mS/mm. DC-IV output and transfer characteristics of a 100-wide device were measured with an HP 4142B DC source/monitor unit, as plotted in Fig. 4.2.1 and Fig. 4.2.2. Limited by the self-heating and the poor thermal conductivity of sapphire substrate, large gate width devices have a reduction of ID together with the appearance of negative differential 52

resistance in the saturation region of the output IV curves, as shown in Fig. 4.2.1. From Fig. 4.2.2, we can clearly see a double-hump feature in the GM versus gate bias (VGS) curve, which corresponds to the effective gate modulation of the upper and the lower 2DEG channel respectively. The double-channel HEMT shows hard pinch-off, with subthreshold ID in the order of 0.1 mA/mm at 10 V drain bias (VDS). It is noteworthy that the device shows small on-resistance without any kink in the linear region of the output IV curves, indicating favorable access to the lower carrier channel.

800

120

600

90

400

60

200 -12

VDS = 10 V -9

-6 -3 VGS (V)

0

30

GM (mS/mm)

150

ID (mA/mm)

1000

0 3

Fig. 4.2.2 DC IV transfer characteristics of a double-channel HEMT.

53

4.3

RF Small-Signal Measurement and Analysis

50

VGS=-6.5V, VDS=10V

40

2

|h21|

Gain (dB)

after de-embedding

U

30 20 10 0 100M

as measured 1G

10G

100G

Frequency (Hz) Fig. 4.3.1 Current gain and unilateral power gain of a double-channel HEMT as a function of measurement frequency. RF small-signal characterization was performed on wafer by measuring Sparameters at a variety of DC bias points. An Agilent 8722E network analyzer was used for S-parameter measurement in 50 MHz ~ 40 GHz frequency range; an HP 4142B DC source/monitor unit was used to set the DC bias; microwave probes and cables were used to connect the device-under-testing to measurement ports. At the optimum bias point, a current gain cutoff frequency (fT) of 12 GHz and a maximum oscillation frequency (fmax) of 30 GHz were derived, which are comparable to baseline AlGaN/GaN HEMTs fabricated in the same processing run. Nominally undoped GaN films grown with the present MOCVD techniques usually show slight n-type, with a background electron concentration in the order of 1016 cm-3. Consequently, there are parasitic capacitance and conductance components between 54

the contact pads and the non-insulating GaN buffer layer, which contribute to RF measurement results and may mask some intrinsic electrical characteristics of the HEMTs. Open-pad de-embedding with the S-parameters of a dummy pad can effectively strip pad-related parasitics. After de-embedding, both the current gain (|h21|2) and the unilateral power gain (U) show better 20 dB per decade roll-off, as shown in Fig. 4.3.1. The de-embedded fT and fmax are usually slightly higher than the measured results. Small-signal characteristics of the HEMT can be considered with an equivalent circuit model shown in Fig. 4.3.2. Employing Golio’s parameter extraction method [52], some equivalent circuit elements, such as the gate-to-source capacitance (CGS), the transconductance (GM), the drain-to-source capacitance (CDS), and the drain-tosource conductance (GDS), can be extracted from the measured S-parameters. In the remainder of this section, detailed discussions on small-signal characteristics of the AlGaN-GaN double-channel HEMT will be carried out. All of these results are deduced from S-parameters after de-embedding.

Fig. 4.3.2 Equivalent circuit model for parameter extraction of the AlGaN-GaN double-channel HEMT.

55

4.3.1 AC Transconductance and Gate-to-Source Capacitance

One of the most distinct features of the double-channel HEMT is the doublehump shape in the GM-VGS curve derived from DC-IV measurements. At RF, gate modulation of the two carrier channels can be examined by showing CGS and GM as a function of VGS. With the aforementioned equivalent circuit model, we performed parameter extraction at 10 V VDS and 2.1 GHz measurement frequency. The AC GM and CGS were extracted and plotted in Fig. 4.3.3. Similar to what observed in DC transfer characteristics, there appears a double-hump feature in the GM-VGS curve at 2.1 GHz frequency. In the CGS-VGS curve, there are two plateaus, corresponding to effective gate modulation of the upper and the lower carrier channel respectively. These results indicate the AlGaN-GaN double-channel HEMT manifests welldefined double-channel behaviors up to RF.

0.5 @ 2.1 GHz VDS = 10 V

120

0.3

90

0.2

60

0.1

30

0.0 -9

-6

VGS (V)

-3

0

GM (mS/mm)

CGS(pF)

0.4

150

0

Fig. 4.3.3 Gate bias-dependent gate-to-source capacitance and transconductance of a double-channel HEMT.

56

Located further away from the gate, the lower carrier channel has relatively low GM. Nevertheless, charging capacitance (CGS) of the lower channel is smaller than the upper channel. Since fT is roughly proportional to GM and inversely proportional CGS, the lower channel still gives a high fT in spite of the low GM.

4.3.2 Output Impedance

50

0.10 @ 2.1 GHz VDS = 10 V

40

0.06

30

0.04

20

0.02

10

0.00 -9

-6

-3 VGS (V)

0

GDS (mS/mm)

CDS (pF)

0.08

0

Fig. 4.3.4 Gate bias-dependent output capacitance and conductance of a doublechannel HEMT. In spite of the existence of a second carrier channel relatively far away from the gate, the double channel HEMT shows a hard pinch-off with the subthreshold drain current in the order of 0.1 mA/mm at 10 V VDS. It is of interest to see if the two carrier channels behave as well-controlled current sources at RF. Using Golio’s parameter extraction method, the output impedance was extracted at 10 V VDS and 2.1 GHz frequency in form of output capacitance (CDS) and output conductance (GDS), as shown in Fig. 4.3.4. At gate biases below -4 V where the lower carrier

57

channel is under effective gate modulation, output impedance of the double-channel HEMT are as large as those obtained from baseline AlGaN/GaN HEMTs fabricated in the same processing run, suggesting good microwave power performance. In the first order approximation, fmax is related to fT in the following equation [53]. f max 1 R DS = ( )1 / 2 fT 2 RG + RCH

fT is determined by the channel carrier velocity and the gate length; RG is the gate resistance; and RCH is the channel charging resistance. A larger value of output resistance RDS gives higher fmax. The extracted large output resistance of the doublechannel HEMT is consistent with the fact that the device has an fmax to fT ratio as high as 2.5 in the operation of the lower channel.

4.3.3 Current and Power Gain

Large-signal gain and linearity characteristics of transistors can be predicted by bias-dependent fT and fmax within the output IV plane. Fig. 4.3.5 shows de-embedded fT and fmax of the double-channel HEMT as a function of the VGS at 10 V VDS. Once again, double-channel behaviors can be observed. There are two major factors determining the fT value. One is the effective electron drift velocity through the channel; and the other is the channel charging delay associated with channel resistance. As VGS increases from pinch-off voltage, the number of mobile electrons increases, the channel resistance decreases, and the fT value increases. After reaching the peak fT at -6.5 V VGS, further increase of VGS results in more electrons close to the lower AlGaN/GaN interface, and make the electrons suffering more from interface scattering. Consequently, the overall electron drift velocity decreases, and the fT value drops down. When the VGS becomes larger than -4 V, electrons begin to 58

populate the upper channel, and the fT value rises again due to the increasing number of high-velocity electrons in the upper channel and the decrease of the associated channel charging resistance. Similar to what happened in the lower channel, further increase of VGS results in a reduction of overall electron drift velocity in the upper channel and degrades the fT value. To the first order approximation, GM can be expressed by CGS and fT as G M = 2πf T C GS . Since the fT-VGS curve has a doublehump shape (Fig. 4.3.5 (a)) and the CGS monotonically depends on VGS (Fig. 4.3.3), there has to be a double-hump structure in the GM-VGS curve, as shown in Fig. 4.2.2 and Fig. 4.3.3.

Frequency (GHz)

40 fT fmax

30

VDS = 10 V

20 10 0 -9

-6

VGS(V)

-3

0

Fig. 4.3.5 Gate bias-dependence fT and fmax of a double-channel HEMT. It is noteworthy that currently all of the AlGaN/GaN HEMTs exhibit gain compression (e.g. GM, fT, and fMAX reduction) at high current level. This problem hinders the AlGaN/GaN HEMTs for high power applications at high frequency. There are models attempting to explain the gain compression behavior, such as the hot phonon effect [54], and the nonlinear source resistance [55]. However, none of those models can explain the fT-VGS profile of our double-channel HEMTs. Electron 59

velocity degradation induced by interface scattering is likely a plausible explanation. Fixing VGS at -6.5 V, we also examined the dependence of fT and fmax on VDS. From Fig. 4.3.6, one can see that with the increase of VDS, fT and fmax saturate quickly and remain constant within the whole saturation region. The ability to maintain a high fT at high VDS indicates excellent high-field electron drift velocity and minimal extension of gate depletion region toward the drain side. The flat fT & fmax versus VDS curves mean more linear operation can be achieved at high voltage operations, where the load line covers a larger VDS range and the linearity is more VDS dependent [56].

Frequency (GHz)

40 30 20 10 0 0

fT

VGS = -6.5 V 2

4

6 8 VDS (V)

fmax 10

12

Fig. 4.3.6 Drain bias-dependence fT and fmax of a double-channel HEMT.

Electron transport properties of the lower channel can be evaluated through the bias dependent fT near pinch-off voltage. Following the method of Moll et al. [57], the channel transit time delay (or the effective electron drift velocity) of the lower channel can be extracted by plotting the total transistor delay (τ=1/2πfT) against the inverse of drain current (1/ID), as shown in Fig. 4.3.7. At low current level when only 60

the lower channel is turned on, the delay time τ decreases linearly as the 1/ID decreases. The linear decay term is the channel charging delay, which approaches zero at infinite ID. The extrapolated intersect at 1/ID =0 then corresponds to the channel transit time delay of the lower channel. From Fig. 4.3.7, the extrapolated channel transit time is 8.8 ps (equivalent to an effective electron drift velocity of 1.14×107 cm/s, which is comparable to the value of 1.2×107 cm/s reported by Akita et al. [58]), indicating excellent transport properties of the lower 2DEG. At higher current levels when both channels are turned on, the delay time once again decreases as a function of decreasing 1/ID. An extrapolation of this region will give the channel transit time delay of the upper channel, which reflects electron transport properties of the upper 2DEG. However, there are not enough data points available for accurate extrapolation.

40 35

τ (ps)

30 25 20

Feature related to upper channel

15 10 5 0 0

τ = 8.8 ps (lower channel)

50

100 150 -1 1/IDS(A )

200

250

Fig. 4.3.7 Extraction of effective channel transit delay of the double-channel HEMT.

61

Dynamic IV Characterization

1500

ID (mA/mm)

(a) 1200 Quiescent point: VDS=0V, VGS=0V 900 600 300 0 0

2

4 6 VDS (V)

8

10

1500

ID (mA/mm)

(b) 1200 Quiescent point: VDS=0V, VGS=-8V 900 600 300 0 0

2

4 6 VDS (V)

8

10

1500

(c) 1200 Quiescent point: VDS=10V, VGS=0V ID (mA/mm)

4.4

900 600 300 0 0

2

4 6 VDS (V)

62

8

10

1500

ID (mA/mm)

(d) 1200 Quiescent point: VDS=10V, VGS=-8V 900 600 300 0 0

2

4 6 VDS (V)

8

10

Fig. 4.4.1 Dynamic IV characteristics (circles) of an AlGaN-GaN double-channel HEMT in comparison with DC IV characteristics (black lines). VGS: -8 ~ 1 V. Using the measurement method described in Section 3.3, we conducted qualitative analysis of current collapse in the AlGaN-GaN double-channel HEMT. Dynamic IV characteristics of an unpassivated AlGaN-GaN double-channel HEMT were measured and shown in Fig. 4.4.1. The measured device has a gate length of 1 µm and a gate width of 2×50 µm. The pulse width is 1 µS and the pulse separation is 1 ms. 4 different quiescent bias points were chosen. Meanwhile, DC output IV characteristics of the same HEMT were given for comparison. Similar to what observed from the AlGaN-GaN single-channel HEMT, when the quiescent point is at VGS=0 V and VDS= 0 V, the pulsed drain current does not show any collapse and becomes higher than the DC current due to the alleviation of self-heating effect (Fig. 4.4.1 (a)). As the quiescent VGS moves to pinch-off voltage (Fig. 4.4.1 (b)), current collapse starts to occur. The current collapse becomes more severe when the quiescent VDS moves to higher voltage (Fig. 4.4.1 (d)). It is noteworthy that when pulsed from VDS=10 V and VGS= 0 V, the drain current shows considerable amount of collapse (Fig. 4.4.1 (c)). This is due to the fact that there is 63

an effective off-to-on pulse between the gate and drain terminals when VDS is pulsed from 10 V to smaller voltages. From Fig. 4.4.1., one can observe that unlike singlechannel HEMTs, the double-channel HEMT does not have any current collapse at low current levels (e.g. VGS 17 MΩ ACE 3 minutes, ultrasonic 1 minute. ISO 3 minutes, ultrasonic 1 minute. DI water spray rinse, 4 cycles. Blow dry with N2 gun. Dehydration bake, 120 oC, 10 minutes in oven.

1.2 Photoresist Application

1) 2) 3) 4) 5)

Cool down after dehydration, 5 minutes. Put wafer on spinner chuck with vacuum on, blow with N2. Coat AZ 703 photoresist. Spin at 4000 rpm for 30 seconds, ~1 µm thick. Soft bake, 90 oC, 1 minute, on hotplate.

1.3 Photoresist Exposure and Development

1) 2) 3) 4) 5)

Exposure for 3.8 seconds, Karl Suss MA6 Aligner, hard contact mode. Post-exposure bake, 110 oC, 1 minute, on hotplate. Develop in FHD-5 for 60 seconds. DI water spray rinse, 4 cycles. Check under microscopy.

1.4 Oxygen Plasma Descum of Photoresist (Optional)

1) Chamber pressure = 300 mT of O2. 2) Temperature: 70 oC. 3) Run for 0.7 minute. 1.5 ICP Mesa Etch

83

1) 2) 3) 4) 5) 2

Cl2 flow rate = 15.0 sccm He flow rate = 10.0 sccm Chamber pressure = 5.0 mTorr. Power = 135 W. 40 seconds etch, 300 nm.

Mesa Isolation

2.1 Solvent Cleaning

7) Check the resistivity of DI water. It should be > 17 MΩ 8) ACE 3 minutes, ultrasonic 1 minute. 9) ISO 3 minutes, ultrasonic 1 minute. 10) DI water spray rinse, 4 cycles. 11) Blow dry with N2 gun. 12) Dehydration bake, 120 oC, 10 minutes in oven. 2.2 Photoresist Application

6) Cool down after dehydration, 5 minutes. 7) Put wafer on spinner chuck with vacuum on, blow with N2. 8) Coat AZ 703 photoresist. 9) Spin at 4000 rpm for 30 seconds, ~1 µm thick. 10) Soft bake, 90 oC, 1 minute, on hotplate. 2.3 Photoresist Exposure and Development

6) Exposure for 3.8 seconds, Karl Suss MA6 Aligner, hard contact mode. 7) Post-exposure bake, 110 oC, 1 minute, on hotplate. 8) Develop in FHD-5 for 60 seconds. 9) DI water spray rinse, 4 cycles. 10) Check under microscopy. 2.4 Oxygen Plasma Descum of Photoresist (Optional)

4) Chamber pressure = 300 mT of O2. 5) Temperature: 70 oC. 6) Run for 0.7 minute. 2.5 Surface Preparation

84

1) 2) 3) 4)

Mix a dilute solution of HCl : H2O :: 1 : 10. Dip in dilute HCl for 15 seconds. DI water spray rinse, 4 cycles. Blow dry with N2 gun.

2.6 Evaporation

1) Mount wafer into e-beam chamber. 2) Pump down to below 1E-6 torr. 3) Deposit material: Material Thickness

Deposition rate

Ti

200 A

2.0 A/sec

Al

1500 A

3.0 A/Sec

Ni

500 A

2.0 A/Sec

Au

800 A

3.0 A/Sec

2.7 Liftoff

1) 2) 3) 4) 5)

Soak wafer in ACE untill metal becomes loose. Rinse with ISO. DI water spray rinse, 4 cycles. Blow dry with N2 gun. Check under microscopy, and then measure the metal thickness.

2.8 Annealing

1) Run the RTA 2~3 times with a dummy wafer to check the temperature stability. 2) Load wafer into the chamber slowly. 3) Wait several minutes before heating up, anneal at 850 oC for 30 seconds. 4) Unload wafer after RTA cools down. 5) Check Ohmic contacts with I-V measurement.

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3

Mesa Isolation

3.1 Solvent Cleaning

13) Check the resistivity of DI water. It should be > 17 MΩ 14) ACE 3 minutes, ultrasonic 1 minute. 15) ISO 3 minutes, ultrasonic 1 minute. 16) DI water spray rinse, 4 cycles. 17) Blow dry with N2 gun. 18) Dehydration bake, 120 oC, 10 minutes in oven. 3.2 Photoresist Application

11) Cool down after dehydration, 5 minutes. 12) Put wafer on spinner chuck with vacuum on, blow with N2. 13) Coat AZ 703 photoresist. 14) Spin at 4000 rpm for 30 seconds, ~1 µm thick. 15) Soft bake, 90 oC, 1 minute, on hotplate. 3.3 Photoresist Exposure and Development

11) Exposure for 3.8 seconds, Karl Suss MA6 Aligner, hard contact mode. 12) Post-exposure bake, 11 oC, 1 minute, on hotplate. 13) Develop in FHD-5 for 60 seconds. 14) DI water spray rinse, 4 cycles. 15) Check under microscopy. 3.4 Oxygen Plasma Descum of Photoresist (Optional)

7) Chamber pressure = 300 mT of O2. 8) Temperature: 70 oC. 9) Run for 0.7 minute. 3.5 Surface Preparation

5) 6) 7) 8)

Mix a dilute solution of HCl : H2O :: 1 : 10. Dip in dilute HCl for 15 seconds. DI water spray rinse, 4 cycles. Blow dry with N2 gun.

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3.6 Evaporation

4) Mount wafer into e-beam chamber. 5) Pump down to below 1E-6 torr. 6) Deposit material: Material Thickness

Deposition rate

Ni

200 A

2.0 A/Sec

Au

3000 A

3.0 A/Sec

3.7 Liftoff

6) Soak wafer in ACE until metal becomes loose. 7) Rinse with ISO. 8) DI water spray rinse, 4 cycles. 9) Blow dry with N2 gun. 10) Check under microscopy, and then measure the metal thickness.

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APPENDIX B: LIST OF PUBLICATIONS DURING THE STUDY IN MASTER OF PHILOSOPHY PROGRAM Referred Journal Papers

R. M. Chu, Y. G. Zhou, K. J. Chen, and K. M. Lau, "Admittance characterization and analysis of trap states in AlGaN/GaN heterostructures," Physica Status Solidi C, Vol. 7, pp. 2400, 2003. T. Suligoj, H. T. Liu, J. K. O. Sin, K. Tsui, R. M. Chu, K. J. Chen, P. Biljanovic, K. L. Wang, “A low-cost horizontal current bipolar transistor (HCBT) technology for the BiCMOS integration with FinFETs,” Accepted by Solid-State Electronics, 2004. Y. G. Zhou, D. Wang, R. M. Chu, C. W. Tang, Y. D. Qi, Z. D. Lu, K. J. Chen, K. M. Lau, "Correlation of in-situ reflectance spectra and resistivity of GaN/Al2O3 interfacial layer in metalorganic chemical vapor deposition," Accepted by Journal of Electronic Materials, 2004. R. M. Chu, Y. G. Zhou, J. Liu, K. J. Chen, and K. M. Lau, "AlGaN-GaN doublechannel HEMTs," Submitted to IEEE Transaction on Electron Devices, 2004. Conference Presentations (Abstract Only)

R. M. Chu, Y. G. Zhou, K. J. Chen, and K. M. Lau, "Admittance Characterization and analysis of trap states in AlGaN/GaN heterostructures," Poster Presentation, Digest of The 5th International Conference on Nitride Semiconductors, pp. 275, Nara, Japan, May 25-30, 2003 R. M. Chu, Y. G. Zhou, K. J. Chen, and K. M. Lau, "Trap states induced frequency dispersion of AlGaN/GaN heterostructure field-effect transistors," Oral presentation, Digest of The 45th Electronic Material Conference, pp. 85, Salt Lake City, USA, June 25-27, 2003 Y. G. Zhou, R. M. Chu, K. J. Chen, and K. M. Lau, "AlGaN/GaN/Graded-AlGaN double heterostructure HEMT," Oral Presentation, Digest of The 2003 International Conference on Solid State Devices and Materials, pp. 918, Tokyo, Japan, September 16-18, 2003 R. M. Chu, Y. G. Zhou, J. Liu, K. J. Chen, K. M. Lau, "Reduction of current collapse in an Un-passivated AlGaN-GaN double-channel HEMT," Oral presentation, To appear in Digest of The 46th Electronic Material Conference, Notre Dame, USA, June 23-25, 2004 Y. G. Zhou, R. M. Chu, J. Liu, K. J. Chen and K. M. Lau, "Gate leakage in AlGaN/GaN HEMTs and its suppression by optimization of MOCVD growth," To appear in Digest of The 2004 International Workshop on Nitride Semiconductors, Pittsburgh, USA, July 19-23, 2004

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