GaN HEMTs on ...
ARTICLE IN PRESS
Microelectronics Journal 40 (2009) 1161–1165 www.elsevier.com/locate/mejo
Deep levels and nonlinear characterization of AlGaN/GaN HEMTs on silicon carbide substrate M. Gassoumia,, J.M. Bluetb, C. Gaquie`rec, G. Guillotb, H. Maarefa a
Laboratoire de Physique des Semiconducteurs et des Composants Electroniques, Faculte´ des Sciences de Monastir, Avenue de l’environnement 5000 Monastir, Tunisie b Laboratoire de Physique de la Matie`re (UMR CNRS 5511), INSA de Lyon, Baˆt. Blaise Pascal, 7 Avenue Jean Capelle, 69621 Villeurbanne Cedex, France c Institut d’Electronique de Microe´lectronique et de Nanotechnologie IEMN (TIGER), De´partement hyperfre´quences et Semiconducteurs, Universite´ des Sciences et Technologies de Lille, Avenue Poincare´, 59652 Villeneuve d’Ascq Cedex, France Received 13 December 2006; accepted 19 February 2007 Available online 10 April 2007
Abstract Deep levels in AlGaN/GaN high electron mobility transistors (HEMTs) on SiC substrate are known to be responsible for trapping processes like: threshold voltage shift, leakage current, degradation current, kink effect and hysteresis effect. The related deep levels are directly characterized by conductance deep level transient spectroscopy (CDLTS) method. Hereby, we have detected five carrier traps with activation energy ranging from 0.84 to 0.07 eV. In this study, we have revealed the presence of two hole-like traps (HL1 and HL2) observed for the first time by CDLTS with activations energy of 0.40 and 0.84 eV. The localisation and the identification of these traps are presented. Finally, the correlation between the anomalies observed on output and defects is discussed. r 2007 Elsevier Ltd. All rights reserved. Keywords: AlGaN/GaN; Sic substrate; HEMT; CDLTS; Deep levels; 2DEG and hole-like
1. Introduction GaN based microwave power high electron mobility transistors (HEMTs) have defined the state-of-the art for output power density [1,2] and have the potential to replace GaAs-based transistors for a number of high-power applications. The GaN-based material system, consisting of GaN, AlN, InN and their alloys, has become the basis of advanced, microwave power device technology for a number of reasons. GaN has a breakdown field that is estimated to be 3 MV/cm [3], which is 10 times larger than that of GaAs, and a high peak electron velocity of 2.7 107 cm/s [4]. In addition, this material system is capable of supporting a heterostructure device technology with a high two-dimensional electron gas (2DEG) carrier density and mobility. As a result of these properties,
Corresponding author. Tel.: +216 73 500 274; fax: +216 73 500 278.
E-mail addresses: [email protected] (M. Gassoumi), [email protected] (H. Maaref). 0026-2692/$ - see front matter r 2007 Elsevier Ltd. All rights reserved. doi:10.1016/j.mejo.2007.02.005
excellent high-frequency, high-power performance has been achieved with AlGaN/GaN HEMTs. Although significant progress has been made in the past few years, additional developmental work is required for AlGaN/GaN HEMTs to become a viable technology [5]. But the trapping effects in AlGaN/GaN HEMTs currently present a major limitation on the power performance at high frequencies. Electrical charge trapped on the surface and/or in the bulk of heterostructure alters the density of 2DEG in the channel and limits the switching characteristics of the device. A number of research efforts have been directed toward identification and elimination of the trapping effects in AlGaN/GaN transistors. These studies have utilized several different characterization techniques, including photoionization spectroscopy [6]; drain leakagecurrent measurements [7], transient drain current measurements at different temperatures [8], current-mode deep level transient spectroscopy (DLTS) [9], and capacitancemode DLTS. In the present investigation, we have employed conductance deep level transient spectroscopy (CDLTS). The
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
2. Experimental The layer used in this study was grown by metal-organic chemical vapour deposition (MOCVD) on SiC substrate. The epitaxial layer structure contains an AlN. Intentionally undoped structures consisted of a 50 A˚ undoped AlGaN and a 1.0 mm undoped GaN cap grown on top of a GaN buffer. Doped structures consisted of a 200 A˚ undoped AlGaN spacer, a Si-doped AlGaN carrier supply layer, a 50 A˚ undoped AlGaN barrier layer and a 30 A˚ undoped GaN cap, grown on top of GaN buffer. The doping level was 5 1017 cm3. The Al mole fraction in all AlGaN layers was nominally 22%. The device processing consisted of mesa isolation using ECR-RIE followed by ohmic and Schottky metallisation. Ohmic contacts were prepared by evaporating Ti/Al/Ni/Au multilayer and rapid-thermal annealing at 850 1C in a N2 atmosphere for 30 s. The ohmic contact resistance of 0.2–0.4 O mm was measured on TLM patterns. The Schottky contacts consisted of a thick Ni layer covered by Au layer and patterned by e-beam lithography. The devices had a gate width of 100 100 mm. The CDLTS measurements have been performed both by applying a constant drain to source voltage and a voltage pulse on the gate, and a constant gate voltage with a pulse on the drain. The drain–source current transient was recorded using a numerical multimeter (HP 34401 A) and then, was treated numerically using the Lang method as in classical capacitance DLTS. The measurements were carried out between 77 and 600 K in a nitrogen cooled cryostat. 3. Results and discussion 3.1. Static measurements Drain–source current voltage (Ids–Vds–T) measurements as a function of gate voltage and temperature have been performed. Output characteristics registered at different temperatures show several parasitic effects. The gate negative voltage Vgs was increased in order to pinch-off the channel. Immediately after, the measurement is done again; we observed a large decrease of the drain current for the second measurements. An example of this degradation of drain current at 200 K is given in Fig. 1. At 200 K, for high negative gate voltage (Vgs) the drain Id current changes dramatically between the two consecutive measurements. We have reproduced the same measurements on the same sample for higher temperature (450 K). We observed that drain current degradation gets progressively reduced, and it has almost disappeared (Fig. 3).
1.0x10-2 8.0x10-3
Ids(A)
usual parameters (activation energy Ea and apparent capture cross section sn) were determined from an Arrhenius analysis of the CDLTS peak positions as a function of rate window (en). Finally, the relationships between the measured drain current transients, and the device surface and buffer layer properties are discussed.
6.0x10-3 4.0x10-3 2.0x10-3 0.0 0
2
4
6
8 10 Vds(V)
12
14
16
Fig. 1. Typical DC (Ids–Vds) characteristics at T ¼ 200 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
5.0x10-3 4.0x10-3
Ids(A)
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3.0x10-3 2.0x10-3 1.0x10-3 0.0 0
2
4
6
8 10 Vds(V)
12
14
16
Fig. 2. Typical DC (Ids–Vds) characteristics at T ¼ 450 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
This behavior confirms that we are in the case of a thermally activated effect. A possible explanation of this degradation in current is the presence of deep levels in the barrier layer under the gate metal, or deep levels in the interface and/or in the buffer layer, and surface states. In Fig. 2, the output characteristics obtained in the case of samples with SiC substrate are presented. As can be seen, whereas the output characteristics at 300 K are nearly ideal, at 450 K a spectacular variation of the output conductance, known as kink effect, is observed (see also Fig. 3). A significant kink effect occurred in a lower and a higher bias region, especially for the cryogenic temperatures. This gives us a hint that the kink effect is associated with the mechanism involving a time constant, which is mainly related to the dominated one between trap related process and impact ionization. This trapping and detrapping mechanism is also more significant at cryogenic temperatures [10].
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
1.2x10-2
3.0x10-3
1.0x10-2
2.5x10-3
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T=100K Vds=15V Vgs =0 to -6V
8.0x10-3 Ids(A)
Ids(A)
2.0x10-3 1.5x10-3
6.0x10-3 4.0x10-3
1.0x10-3
2.0x10-3
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VT=-3.39V
-6
0.0 0
2
4
6
8 10 Vds(V)
12
14
-5
-4
16
5.0x10-3
Fig. 3. Typical DC (Ids–Vds) characteristics at T ¼ 300 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
4.0x10-3
-3 Vgs(V)
-2
-1
0
-1
0
-1
0
T=300K Vds=15V Vgs=0 to -6V
3.2. Current transient spectroscopy measurements Undesirable phenomena such as threshold shift [14] are thought to be caused by deep levels associated with electrically active defects in the heterostructure. To characterize deep levels in HEMT AlGaN/GaN/SiC, CDLTS is used. CDLTS is more suitable for study of the HEMT GaN structure than capacitance DLTS when the gate area of such structures is too small for capacitance DLTS [15]. In addition, in CDLTS, the device can be reverse biased closer to the threshold voltage allowing investigation of deep levels in the buffer; this can be achieved by modifying the Fermi level position in the buffer region near the channel. In this type of structure this is not possible with capacitance DLTS, because the high series resistance near the threshold voltage induces a distortion of the capacitance measurement; a correction procedure is needed to obtain the correct signal related to the traps. Moreover, CDLTS under drain pulse allows
2.0x10-3 1.0x10-3 V T=-3.71V
0.0 -6
2.0x10-3 1.8x10-3
-5
-4
-3 Vgs(V)
-2
T=550k Vds=15V Vgs= 0 to -6V
1.6x10-3 1.4x10-3 Ids(A)
Like on AlGaAs/GaAs HEMT and in III–V FETs conductance dispersion is generally attributed to surface states [11,12] or to deep level [13]. As a conclusion on these first investigations, the drift on drain current characteristics presented above can be explained by the presence of deep defects near the channel for AlGaN/GaN HEMTs with SiC substrate. Another parasitic effect is the threshold voltage shift with temperature. As displayed in Fig. 4a–c, the threshold voltage (defined by a linear extrapolation of the drain current versus gate voltage to zero current) is 3.39 V at T ¼ 100 K, 3.71 V at T ¼ 300 K and 3.18 V at T ¼ 550 K. This shift is thought to be caused by deep levels associated with electrically active defects in the heterostructures. The origin of the different parasitic effects in output characteristic is investigated in the following using CDLTS.
Ids(A)
3.0x10-3
1.2x10-3 1.0x10-3 8.0x10-4 6.0x10-4 4.0x10-4 2.0x10
V T=-3.18V
-4
0.0 -6
-5
-4
-3 Vgs(V)
-2
Fig. 4. (a) Id–Vgs characteristics at T ¼ 100 K; (b) Id–Vgs characteristics at T ¼ 300 K and (c) Id–Vgs characteristics at T ¼ 550 K.
investigation in the buffer layer and near the 2DEG channel [16]. The CDLTS spectra (Fig. 5) under a gate pulse (Vgs switching from 0 to 2 V at Vds ¼ 4.5), reveal the presence of two positive peaks, corresponding to electron emission from different traps called D1 and D2 a two negative peak corresponding to hole-like traps called HL1 and HL2. The apparent activation energies and capture cross sections are deduced from the Arrhenius plot of ln(T2/en) versus 1000/T (Fig. 6).
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
1164 D2
D1
Signal CDLTS(u.a)
0.015
C2 Ea=0.049eV
0.035
Vds=4.5V Vgs= 0 to -2V tp=1000ms
0.030 Signal CDLTS (u.a)
0.020
0.010 0.005 HL1
0.000
Vgs=0V Vds=1V to 5V tp=1000ms C1 Ea=0.34eV
0.025 0.020 0.015 0.010 0.005
-0.005 HL2
0.000 100 150 200 250 300 350 400 450 500 550 Temperature (K)
-0.010 100
200
300 400 Temperature(K)
500 Fig. 7. A typical CDLTS spectrum showing the presence of two levels under a drain pulse.
Fig. 5. A typical CDLTS spectrum showing the presence of four levels under a gate pulse.
HL1,Ea=0.40eV 8.5
HL2, Ea=0.84eV
8.0
D1,
Ln(T2/en)
Ea=0.27eV
7.5
7.0
D2,Ea=0.07eV
6.5
6.0 3
4
5
6
7
8
1000/T(K-1) Fig. 6. Arrhenius plot for the deep levels observed in the AlGaN/GaN/ SiC HEMTs under gate pulse.
A comparison of the obtained activation energies with the ones reported in the literature allows us to relate undoubtedly the electron trap D1 to the so-called E2 center. The electron trap D1 with an activation energy of 0.27 eV and a cross section of 3.03 1017 cm2 can be attributed to the defect level with activation energy of 0.26 eV reported by Hacke et al. [17], 0.18 eV reported by Go¨tz et al. [18] and 0.20 eV reported by Gassoumi et al. [19]. The very close correspondence between the Arrhenius plots for these levels and the similar activation energies derived from these plots suggest that they correspond to the same defect level. Marso et al. [20] have also observed a defect with similar signature in AlGaN/GaN HEMTs and have shown that this trap is most probably located in the region below the 2DEG channel. The microscopic nature of defect D2 is not clearly elucidated. Nevertheless, a level
with close activation energy of 0.06 eV has been observed by Hall effect measurements and assigned to the N vacancy [21]. The hole-like trap signal HL2 appears around T ¼ 270 K. Polyakov et al. [22] have shown recently the existence of hole-like traps. They suggested that this centre is the deep acceptor responsible for the donor–acceptor pair and yellow luminescence band in GaN [23]. As to the origin of these hole traps, consider the following: several authors have reported the presence of a deep hole trap between 0.75 and 0.9 eV above the valence band [24]. The origin of this defect, however, is not as yet clear. Finally, the hole trap HL1 with activation energy 0.40 eV peaked at T ¼ 400 K, was observed, to the best of our knowledge, only in our CDLTS measurements. The exact origin of this deep level remains an open question. In Fig. 7, we report the CDLTS spectra of a AlGaN/ GaN/SiC HEMTs, under pulse drain. This spectrum shows the presence of two traps C1 and C2 with activation energies 0.34 and 0.04 eV. They are located in the 2DEG vicinity (AlGaN/GaN and AlGaN/ SiC interfaces). The presence of C2 improves this localisation in the canal/buffer layer or canal/substrate interface. The fact that the C1 level has not been observed reveals that it is located only in the strained SiC/AlN interface. 4. Conclusion In summary, we have investigated static measurements and defect analysis on AlGaN/GaN/SiC and grown by MOCVD. Current–voltage characteristics shows anomalies (degradation in drain current, kink effect, hysteresis effect, etc.) attributed to traps centers and deep levels. Traps analysis performed on these transistors by CDLTS prove the presence of deep levels. These centers are responsible for trapping/detrapping phenomena. Finally, a direct correlation between parasitic effects in the output characteristics and the presence of deep traps have been
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
evidenced for AlGaN/GaN HEMTs realized on SiC substrate grown by MOCVD. The analysis makes possible the detection and the location of traps in HEMTs.
References [1] Y.-F. Wu, et al., High Al-content AlGaN/GaN HEMT on SiC substrates with very-high power performance, IEDM Tech. Dig. (1999) 925–927. [2] S.T. Sheppard, et al., High-power microwave GaN/AlGaN HEMT’s on semi-insulating silicon carbide substrates, IEEE Electron Device Lett. 20 (1999) 161–163. [3] V.A. Dmitriev, et al., Electric breakdown in GaN p–n junctions, Appl. Phys. Lett. 68 (1996) 229–231. [4] B. Gelmont, K. Kim, M. Shur, Monte Carlo simulation of electron transport in gallium nitride, J. Appl. Phys. 74 (1993) 1818–1821. [5] J.C. Zolper, Progress toward ultra-wideband AlGaN/GaN MMICs, Solid-State Electron. 43 (1999) 1479–1482. [6] P.B. Klein, Photoionization spectroscopy in AlGaN/GaN high electron mobility transistors, J. Appl. Phys. 92 (2002) 5498. [7] S. Arulkumaran, T. Egawa, H. Ishikawa, T. Jimbo, Comparative study of drain-current collapse in AlGaN/GaN high-electronmobility transistors on sapphire and semi-insulating SiC, Appl. Phys. Lett. 81 (2002) 3073. [8] O. Mitrofanov, M. Manfra, N. Weimann, Impact of Si doping on radio frequency dispersion in unpassivated GaN/AlGaN/GaN highelectron-mobility transistors grown by plasma-assisted molecularbeam epitaxy, Appl. Phys. Lett. 82 (2002) 4361. [9] A.P. Zhang, L.B. Rowland, E.B. Kaminsky, V. Tilak, J.C. Grande, J. Teetsov, A. Vertiatchikh, L.F. Eastman, Correlation of device performance and defects in AlGaN/GaN high-electron mobility transistors, J. Electron. Mater. 32 (2003) 388. [10] C.-H. Lin, W.-K. Wang, P.-C. Lin, C.-K. Lin, Y.-J. Chang, Y.-J. Chan, Transient pulsed analysis on GaN HEMTs at cryogenic temperatures, IEEE Electron Device Lett. 26 (10) (2005) 710–712. [11] P.H. Ladbrooke, S.R. Blight, Low field, low frequency dispersion of transconductance in GaAs MESFET’s with implications for other rate-dependent anomalies, IEEE Trans. Electron Devices 35 (1988) 257–267.
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[12] K.J. Choi, J. Lee, Interpretation of transconductance dispersion in GaAs MESFET using deep level transient spectroscopy, IEEE Trans. Electron Devices 48 (2001) 190–195. [13] A. Paccagnella, C. Tedesco, C. Canali, A. Cetronio, C. Lanzieri, Frequency dispersion of transconductance: a tool to characterize III–V FETs, Electron. Lett. 28 (22) (1992) 2107–2109. [14] S. Mott, J.M. Dumas, P. Audren, A. Behadj, Characterization and analysis of the parasitic effects in MESFETs and HEMTs, in: sixth Conference on Semi-Insulating III–V Materials, Toronto, Canada, 1990, p. 395. [15] I.D. Hawkins, A.R. Peaker, Capacitance and conductance deep level transient spectroscopy in field-effect transistors, Appl. Phys. Lett. 48 (1986) 227. [16] N. Saysset, N. Labat, A. Touboul, V. Danto, J.M. Dumas, Comparison of conventional and pseudomorphic HEMTs performances by drain current transient spectroscopy and L.F. channel noise, Qual. Reliab. Eng. Int. 12 (1996) 309. [17] P. Hacke, H. Nakayama, T. Detechprohm, K. Hiramatus, N. Sawaki, Deep levels in the upper band-gap region of lightly Mg-doped GaN, Appl. Phys. Lett. 68 (1996) 1362. [18] W. Go¨tz, N.M. Johnson, H. Amano, I. Akasaki, Deep level defects in n-type GaN, Appl. Phys. Lett. 65 (1994) 463. [19] M. Gassoumi, J.M. Bluet, F. Chekir, I. Dermoul, H. Maaref, G. Guillot, A. Minko, V. Hoel, C. Gaquie`re, Investigation of traps in AlGaN/GaN HEMTs by current transient spectroscopy, Mater. Sci. Eng.: C 26 (2–3) (2006) 383–386. [20] M. Marso, M. Wolter, P. Javorka, P. Kordos, H. Lu¨th, Investigation of buffer traps in an AlGaN/GaN/Si high electron mobility transistor by backgating current deep level transient spectroscopy, Appl. Phys. Lett. 82n (2003) 633. [21] Z.-Q. Fang, D.C. Look, W. Kim, Z. Fan, A. Botchkarev, H. Morkoc, Deep centers in n-GaN grown by reactive molecular beam epitaxy, Appl. Phys. Lett. 72 (1998) 2277. [22] Polyakov, et al., Deep centers and their spatial distribution in undoped GaN films grown by organometallic vapor phase epitaxy, J. Appl. Phys. 84 (2) (1998) 870. [23] T. Ogino, M. Aoki, Mechanism of yellow luminescence in GaN, Jpn. J. Appl. Phys. 19 (1980) 2395. [24] F.D. Auret, W.E. Meyer, L. Wu, M. Hayes, M.J. Legodi, B. Beaumont, P. Gibart, Electrical characterisation of hole traps in n-type GaN, Phys. Status Solidi C: Conf. 1 (9) (2004) 2271–2276.
Microelectronics Journal 40 (2009) 1161–1165 www.elsevier.com/locate/mejo
Deep levels and nonlinear characterization of AlGaN/GaN HEMTs on silicon carbide substrate M. Gassoumia,, J.M. Bluetb, C. Gaquie`rec, G. Guillotb, H. Maarefa a
Laboratoire de Physique des Semiconducteurs et des Composants Electroniques, Faculte´ des Sciences de Monastir, Avenue de l’environnement 5000 Monastir, Tunisie b Laboratoire de Physique de la Matie`re (UMR CNRS 5511), INSA de Lyon, Baˆt. Blaise Pascal, 7 Avenue Jean Capelle, 69621 Villeurbanne Cedex, France c Institut d’Electronique de Microe´lectronique et de Nanotechnologie IEMN (TIGER), De´partement hyperfre´quences et Semiconducteurs, Universite´ des Sciences et Technologies de Lille, Avenue Poincare´, 59652 Villeneuve d’Ascq Cedex, France Received 13 December 2006; accepted 19 February 2007 Available online 10 April 2007
Abstract Deep levels in AlGaN/GaN high electron mobility transistors (HEMTs) on SiC substrate are known to be responsible for trapping processes like: threshold voltage shift, leakage current, degradation current, kink effect and hysteresis effect. The related deep levels are directly characterized by conductance deep level transient spectroscopy (CDLTS) method. Hereby, we have detected five carrier traps with activation energy ranging from 0.84 to 0.07 eV. In this study, we have revealed the presence of two hole-like traps (HL1 and HL2) observed for the first time by CDLTS with activations energy of 0.40 and 0.84 eV. The localisation and the identification of these traps are presented. Finally, the correlation between the anomalies observed on output and defects is discussed. r 2007 Elsevier Ltd. All rights reserved. Keywords: AlGaN/GaN; Sic substrate; HEMT; CDLTS; Deep levels; 2DEG and hole-like
1. Introduction GaN based microwave power high electron mobility transistors (HEMTs) have defined the state-of-the art for output power density [1,2] and have the potential to replace GaAs-based transistors for a number of high-power applications. The GaN-based material system, consisting of GaN, AlN, InN and their alloys, has become the basis of advanced, microwave power device technology for a number of reasons. GaN has a breakdown field that is estimated to be 3 MV/cm [3], which is 10 times larger than that of GaAs, and a high peak electron velocity of 2.7 107 cm/s [4]. In addition, this material system is capable of supporting a heterostructure device technology with a high two-dimensional electron gas (2DEG) carrier density and mobility. As a result of these properties,
Corresponding author. Tel.: +216 73 500 274; fax: +216 73 500 278.
E-mail addresses: [email protected] (M. Gassoumi), [email protected] (H. Maaref). 0026-2692/$ - see front matter r 2007 Elsevier Ltd. All rights reserved. doi:10.1016/j.mejo.2007.02.005
excellent high-frequency, high-power performance has been achieved with AlGaN/GaN HEMTs. Although significant progress has been made in the past few years, additional developmental work is required for AlGaN/GaN HEMTs to become a viable technology [5]. But the trapping effects in AlGaN/GaN HEMTs currently present a major limitation on the power performance at high frequencies. Electrical charge trapped on the surface and/or in the bulk of heterostructure alters the density of 2DEG in the channel and limits the switching characteristics of the device. A number of research efforts have been directed toward identification and elimination of the trapping effects in AlGaN/GaN transistors. These studies have utilized several different characterization techniques, including photoionization spectroscopy [6]; drain leakagecurrent measurements [7], transient drain current measurements at different temperatures [8], current-mode deep level transient spectroscopy (DLTS) [9], and capacitancemode DLTS. In the present investigation, we have employed conductance deep level transient spectroscopy (CDLTS). The
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
2. Experimental The layer used in this study was grown by metal-organic chemical vapour deposition (MOCVD) on SiC substrate. The epitaxial layer structure contains an AlN. Intentionally undoped structures consisted of a 50 A˚ undoped AlGaN and a 1.0 mm undoped GaN cap grown on top of a GaN buffer. Doped structures consisted of a 200 A˚ undoped AlGaN spacer, a Si-doped AlGaN carrier supply layer, a 50 A˚ undoped AlGaN barrier layer and a 30 A˚ undoped GaN cap, grown on top of GaN buffer. The doping level was 5 1017 cm3. The Al mole fraction in all AlGaN layers was nominally 22%. The device processing consisted of mesa isolation using ECR-RIE followed by ohmic and Schottky metallisation. Ohmic contacts were prepared by evaporating Ti/Al/Ni/Au multilayer and rapid-thermal annealing at 850 1C in a N2 atmosphere for 30 s. The ohmic contact resistance of 0.2–0.4 O mm was measured on TLM patterns. The Schottky contacts consisted of a thick Ni layer covered by Au layer and patterned by e-beam lithography. The devices had a gate width of 100 100 mm. The CDLTS measurements have been performed both by applying a constant drain to source voltage and a voltage pulse on the gate, and a constant gate voltage with a pulse on the drain. The drain–source current transient was recorded using a numerical multimeter (HP 34401 A) and then, was treated numerically using the Lang method as in classical capacitance DLTS. The measurements were carried out between 77 and 600 K in a nitrogen cooled cryostat. 3. Results and discussion 3.1. Static measurements Drain–source current voltage (Ids–Vds–T) measurements as a function of gate voltage and temperature have been performed. Output characteristics registered at different temperatures show several parasitic effects. The gate negative voltage Vgs was increased in order to pinch-off the channel. Immediately after, the measurement is done again; we observed a large decrease of the drain current for the second measurements. An example of this degradation of drain current at 200 K is given in Fig. 1. At 200 K, for high negative gate voltage (Vgs) the drain Id current changes dramatically between the two consecutive measurements. We have reproduced the same measurements on the same sample for higher temperature (450 K). We observed that drain current degradation gets progressively reduced, and it has almost disappeared (Fig. 3).
1.0x10-2 8.0x10-3
Ids(A)
usual parameters (activation energy Ea and apparent capture cross section sn) were determined from an Arrhenius analysis of the CDLTS peak positions as a function of rate window (en). Finally, the relationships between the measured drain current transients, and the device surface and buffer layer properties are discussed.
6.0x10-3 4.0x10-3 2.0x10-3 0.0 0
2
4
6
8 10 Vds(V)
12
14
16
Fig. 1. Typical DC (Ids–Vds) characteristics at T ¼ 200 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
5.0x10-3 4.0x10-3
Ids(A)
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3.0x10-3 2.0x10-3 1.0x10-3 0.0 0
2
4
6
8 10 Vds(V)
12
14
16
Fig. 2. Typical DC (Ids–Vds) characteristics at T ¼ 450 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
This behavior confirms that we are in the case of a thermally activated effect. A possible explanation of this degradation in current is the presence of deep levels in the barrier layer under the gate metal, or deep levels in the interface and/or in the buffer layer, and surface states. In Fig. 2, the output characteristics obtained in the case of samples with SiC substrate are presented. As can be seen, whereas the output characteristics at 300 K are nearly ideal, at 450 K a spectacular variation of the output conductance, known as kink effect, is observed (see also Fig. 3). A significant kink effect occurred in a lower and a higher bias region, especially for the cryogenic temperatures. This gives us a hint that the kink effect is associated with the mechanism involving a time constant, which is mainly related to the dominated one between trap related process and impact ionization. This trapping and detrapping mechanism is also more significant at cryogenic temperatures [10].
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
1.2x10-2
3.0x10-3
1.0x10-2
2.5x10-3
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8.0x10-3 Ids(A)
Ids(A)
2.0x10-3 1.5x10-3
6.0x10-3 4.0x10-3
1.0x10-3
2.0x10-3
5.0x10-4
0.0
VT=-3.39V
-6
0.0 0
2
4
6
8 10 Vds(V)
12
14
-5
-4
16
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Fig. 3. Typical DC (Ids–Vds) characteristics at T ¼ 300 K, the gate bias has been first increased from 0 to 5 V and then decreased from 5 to 0 V.
4.0x10-3
-3 Vgs(V)
-2
-1
0
-1
0
-1
0
T=300K Vds=15V Vgs=0 to -6V
3.2. Current transient spectroscopy measurements Undesirable phenomena such as threshold shift [14] are thought to be caused by deep levels associated with electrically active defects in the heterostructure. To characterize deep levels in HEMT AlGaN/GaN/SiC, CDLTS is used. CDLTS is more suitable for study of the HEMT GaN structure than capacitance DLTS when the gate area of such structures is too small for capacitance DLTS [15]. In addition, in CDLTS, the device can be reverse biased closer to the threshold voltage allowing investigation of deep levels in the buffer; this can be achieved by modifying the Fermi level position in the buffer region near the channel. In this type of structure this is not possible with capacitance DLTS, because the high series resistance near the threshold voltage induces a distortion of the capacitance measurement; a correction procedure is needed to obtain the correct signal related to the traps. Moreover, CDLTS under drain pulse allows
2.0x10-3 1.0x10-3 V T=-3.71V
0.0 -6
2.0x10-3 1.8x10-3
-5
-4
-3 Vgs(V)
-2
T=550k Vds=15V Vgs= 0 to -6V
1.6x10-3 1.4x10-3 Ids(A)
Like on AlGaAs/GaAs HEMT and in III–V FETs conductance dispersion is generally attributed to surface states [11,12] or to deep level [13]. As a conclusion on these first investigations, the drift on drain current characteristics presented above can be explained by the presence of deep defects near the channel for AlGaN/GaN HEMTs with SiC substrate. Another parasitic effect is the threshold voltage shift with temperature. As displayed in Fig. 4a–c, the threshold voltage (defined by a linear extrapolation of the drain current versus gate voltage to zero current) is 3.39 V at T ¼ 100 K, 3.71 V at T ¼ 300 K and 3.18 V at T ¼ 550 K. This shift is thought to be caused by deep levels associated with electrically active defects in the heterostructures. The origin of the different parasitic effects in output characteristic is investigated in the following using CDLTS.
Ids(A)
3.0x10-3
1.2x10-3 1.0x10-3 8.0x10-4 6.0x10-4 4.0x10-4 2.0x10
V T=-3.18V
-4
0.0 -6
-5
-4
-3 Vgs(V)
-2
Fig. 4. (a) Id–Vgs characteristics at T ¼ 100 K; (b) Id–Vgs characteristics at T ¼ 300 K and (c) Id–Vgs characteristics at T ¼ 550 K.
investigation in the buffer layer and near the 2DEG channel [16]. The CDLTS spectra (Fig. 5) under a gate pulse (Vgs switching from 0 to 2 V at Vds ¼ 4.5), reveal the presence of two positive peaks, corresponding to electron emission from different traps called D1 and D2 a two negative peak corresponding to hole-like traps called HL1 and HL2. The apparent activation energies and capture cross sections are deduced from the Arrhenius plot of ln(T2/en) versus 1000/T (Fig. 6).
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
1164 D2
D1
Signal CDLTS(u.a)
0.015
C2 Ea=0.049eV
0.035
Vds=4.5V Vgs= 0 to -2V tp=1000ms
0.030 Signal CDLTS (u.a)
0.020
0.010 0.005 HL1
0.000
Vgs=0V Vds=1V to 5V tp=1000ms C1 Ea=0.34eV
0.025 0.020 0.015 0.010 0.005
-0.005 HL2
0.000 100 150 200 250 300 350 400 450 500 550 Temperature (K)
-0.010 100
200
300 400 Temperature(K)
500 Fig. 7. A typical CDLTS spectrum showing the presence of two levels under a drain pulse.
Fig. 5. A typical CDLTS spectrum showing the presence of four levels under a gate pulse.
HL1,Ea=0.40eV 8.5
HL2, Ea=0.84eV
8.0
D1,
Ln(T2/en)
Ea=0.27eV
7.5
7.0
D2,Ea=0.07eV
6.5
6.0 3
4
5
6
7
8
1000/T(K-1) Fig. 6. Arrhenius plot for the deep levels observed in the AlGaN/GaN/ SiC HEMTs under gate pulse.
A comparison of the obtained activation energies with the ones reported in the literature allows us to relate undoubtedly the electron trap D1 to the so-called E2 center. The electron trap D1 with an activation energy of 0.27 eV and a cross section of 3.03 1017 cm2 can be attributed to the defect level with activation energy of 0.26 eV reported by Hacke et al. [17], 0.18 eV reported by Go¨tz et al. [18] and 0.20 eV reported by Gassoumi et al. [19]. The very close correspondence between the Arrhenius plots for these levels and the similar activation energies derived from these plots suggest that they correspond to the same defect level. Marso et al. [20] have also observed a defect with similar signature in AlGaN/GaN HEMTs and have shown that this trap is most probably located in the region below the 2DEG channel. The microscopic nature of defect D2 is not clearly elucidated. Nevertheless, a level
with close activation energy of 0.06 eV has been observed by Hall effect measurements and assigned to the N vacancy [21]. The hole-like trap signal HL2 appears around T ¼ 270 K. Polyakov et al. [22] have shown recently the existence of hole-like traps. They suggested that this centre is the deep acceptor responsible for the donor–acceptor pair and yellow luminescence band in GaN [23]. As to the origin of these hole traps, consider the following: several authors have reported the presence of a deep hole trap between 0.75 and 0.9 eV above the valence band [24]. The origin of this defect, however, is not as yet clear. Finally, the hole trap HL1 with activation energy 0.40 eV peaked at T ¼ 400 K, was observed, to the best of our knowledge, only in our CDLTS measurements. The exact origin of this deep level remains an open question. In Fig. 7, we report the CDLTS spectra of a AlGaN/ GaN/SiC HEMTs, under pulse drain. This spectrum shows the presence of two traps C1 and C2 with activation energies 0.34 and 0.04 eV. They are located in the 2DEG vicinity (AlGaN/GaN and AlGaN/ SiC interfaces). The presence of C2 improves this localisation in the canal/buffer layer or canal/substrate interface. The fact that the C1 level has not been observed reveals that it is located only in the strained SiC/AlN interface. 4. Conclusion In summary, we have investigated static measurements and defect analysis on AlGaN/GaN/SiC and grown by MOCVD. Current–voltage characteristics shows anomalies (degradation in drain current, kink effect, hysteresis effect, etc.) attributed to traps centers and deep levels. Traps analysis performed on these transistors by CDLTS prove the presence of deep levels. These centers are responsible for trapping/detrapping phenomena. Finally, a direct correlation between parasitic effects in the output characteristics and the presence of deep traps have been
ARTICLE IN PRESS M. Gassoumi et al. / Microelectronics Journal 40 (2009) 1161–1165
evidenced for AlGaN/GaN HEMTs realized on SiC substrate grown by MOCVD. The analysis makes possible the detection and the location of traps in HEMTs.
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