A Mutual Authentication Protocol Implemented for EPC Gen2v2 ...
A Mutual Authentication Protocol Implemented for EPC Gen2v2 Secure RFID Operation Nguyen Xuan Hieu, Dasom Park, and Jong-Wook Lee School of Electronics and Information, Kyung Hee University, [email protected] I. INTRODUCTION Nowadays, passive radio frequency identification (RFID) have been widely adopted in the world. With combination of internet-tag, and sensor or only sensor with tag problem issued is security. Due to the awareness of security problems on the previous EPC Gen2v1 standard, the new Gen2v2 standard features a number of backward compatible, optional and security features [1]. According to Gen2v2 standard, a tag may support one or more cryptographic suite, corresponding with key. In this design, we propose a mutual authentication method compatible with ISO/IEC 29167. The mutual authentication protocol bases on AES algorithm, which is a lightweight encryption function
the tag. In step (17), the tag feedbacks with new “handle” value because all authentications between reader and tag are completed. After authentication process successfully the tag state changes to “Authentication state”, this is most security state, all commands execute in this state should be encapsulated into two commands “AuthComm” and “SecureComm”. The “AuthComm” and “SecureComm” commands allow authenticated Reader to tag communications
II. DESCRIPTION The standard AES algorithm is a symmetric block cipher, based on arithmetic in a finite Galois Field GF(28), supporting variable text and key length of 128, 196, or 256 bits. In this paper we use data and key length of 128 bits. The AES architecture includes three main sections: FSM controller, key expansion and encryption is shown in Fig 1.
(a)
Fig.2. Sequence diagram of mutual authentication.
III. CHIP IMPLEMENTATION AND RESULTS The proposed design was modeled in verilog and synthesis by Astro. The verilog code had tested by using Quartus II software and DE2 package board including FPGA chip. The pattern generator is used for providing the Gen2 commands. The testing FPGA board was performed with clock frequency is 1.92 MHz.
(b)
Fig.1. (a) AES functional block diagram. (b) EPCGen2v2 baseband processor block diagram.
The proposed mutual authentication consists of the processes for tag’s authentication and reader’s authentication. Fig. 2 shows the diagram for the mutual authentication between the tag and reader. Steps (1)-(9) are similar to the command flow in the Gen2 standard and not shown. In step (12), the reader initiates mutual authentication process by sending “Challenge” command with CSI. In step (13), the tag replies to the reader with Rn64tag#1. Through step (12)–step (13), both of tag and reader have the same key result. In step (14), the reader sends Rn64Read#2 by sending the first “Authenticate” command with the same CSI value. In step (15), the tag replies to the reader with Rn64tag#2. In step (16), the tag requests the second authentication information that means the reader keep transmitting a 64-bit data [127:63] encrypted DataRead64 to
(a) (b) Fig 3. (a) Fabricted chip. (b) Measured response of the tag for a series of commands
Fig. 3(a) shows the fabricated chip. Fig. 3(b) shows the measured results of commands from Query to Req_RN command. Upon the tag receiving Query command, tag will backscatter with RN16 value. When tag receiving ACK command, in begins access memory by activated the MEM_READ signal to read the PC+EPC, compute CRC16 through PC+EPC and response the backscattering data REFERENCE [1]
Z. Liu, D. Liu, L. Li, H. Lim, and Z. Yong, “Implementation of a new RFID authentication protocol of EPC Gen2 standard,” IEEE Sens J., vol. 15, no. 2, pp. 1003-1011, Feb. 2015.
The chip fabrication and CAD tools were made available through the IC Design Education Center (IDEC), Korea.
ISOCC 2015 Chip Design Contest
the tag. In step (17), the tag feedbacks with new “handle” value because all authentications between reader and tag are completed. After authentication process successfully the tag state changes to “Authentication state”, this is most security state, all commands execute in this state should be encapsulated into two commands “AuthComm” and “SecureComm”. The “AuthComm” and “SecureComm” commands allow authenticated Reader to tag communications
II. DESCRIPTION The standard AES algorithm is a symmetric block cipher, based on arithmetic in a finite Galois Field GF(28), supporting variable text and key length of 128, 196, or 256 bits. In this paper we use data and key length of 128 bits. The AES architecture includes three main sections: FSM controller, key expansion and encryption is shown in Fig 1.
(a)
Fig.2. Sequence diagram of mutual authentication.
III. CHIP IMPLEMENTATION AND RESULTS The proposed design was modeled in verilog and synthesis by Astro. The verilog code had tested by using Quartus II software and DE2 package board including FPGA chip. The pattern generator is used for providing the Gen2 commands. The testing FPGA board was performed with clock frequency is 1.92 MHz.
(b)
Fig.1. (a) AES functional block diagram. (b) EPCGen2v2 baseband processor block diagram.
The proposed mutual authentication consists of the processes for tag’s authentication and reader’s authentication. Fig. 2 shows the diagram for the mutual authentication between the tag and reader. Steps (1)-(9) are similar to the command flow in the Gen2 standard and not shown. In step (12), the reader initiates mutual authentication process by sending “Challenge” command with CSI. In step (13), the tag replies to the reader with Rn64tag#1. Through step (12)–step (13), both of tag and reader have the same key result. In step (14), the reader sends Rn64Read#2 by sending the first “Authenticate” command with the same CSI value. In step (15), the tag replies to the reader with Rn64tag#2. In step (16), the tag requests the second authentication information that means the reader keep transmitting a 64-bit data [127:63] encrypted DataRead64 to
(a) (b) Fig 3. (a) Fabricted chip. (b) Measured response of the tag for a series of commands
Fig. 3(a) shows the fabricated chip. Fig. 3(b) shows the measured results of commands from Query to Req_RN command. Upon the tag receiving Query command, tag will backscatter with RN16 value. When tag receiving ACK command, in begins access memory by activated the MEM_READ signal to read the PC+EPC, compute CRC16 through PC+EPC and response the backscattering data REFERENCE [1]
Z. Liu, D. Liu, L. Li, H. Lim, and Z. Yong, “Implementation of a new RFID authentication protocol of EPC Gen2 standard,” IEEE Sens J., vol. 15, no. 2, pp. 1003-1011, Feb. 2015.
The chip fabrication and CAD tools were made available through the IC Design Education Center (IDEC), Korea.
ISOCC 2015 Chip Design Contest
