A new DDCC based memristor emulator circuit and its applications
Microelectronics Journal 45 (2014) 282–287
Contents lists available at ScienceDirect
Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo
A new DDCC based memristor emulator circuit and its applications Abdullah Yeşil, Yunus Babacan, Fırat Kaçar n Department of Electrical and Electronics Engineering, Istanbul University, Istanbul, Turkey
art ic l e i nf o
a b s t r a c t
Article history: Received 3 August 2013 Received in revised form 10 January 2014 Accepted 17 January 2014
Memristor is a new passive circuit element. The interaction of the memristor with other circuit elements is important for designers. In this paper, new memristor emulator circuit is designed using DDCC (differential difference current conveyor) based on CMOS. It is realized that the proposed emulator causes less complexity compared to other designed emulator circuits. Compatibility of memristor with CMOSs and its operation ability at high frequencies are very important for circuit design based on memristor. The emulator based on CMOS can manage to provide these two fundamental properties successfully. In order to test the proposed emulator, it is connected to memristor with both ways, serial and parallel, than MC circuit is analyzed and results are shown at the end of the paper. & 2014 Elsevier Ltd. All rights reserved.
Keywords: Memristor DDCC Analog Integrated Circuit CMOS
1. Introduction Prediction [1,2] and experimental realization of the memristor [3] increased interest in passive circuit element memristor. In 1971, Leon Chua noted mathematical relations between four fundamental circuit components i, v, q and ϕ as shown in Fig. 1. Resistance (R) is the rate of voltage with current (R ¼dv/di), capacitance (C) is the rate of charge with voltage (C ¼ dq/dv) and inductance (L) is the rate of change of magnetic flux with current (L ¼dϕ/di). From symmetry, Chua noticed the absent of the fourth fundamental element which for him should be, called memristor (M), relation between charge and magnetic flux, M ¼dϕ/dq. Memristor had been just a theory before Williams and coworkers fabricated memristor as a structure of Pt/TiO2/Pt [3] and they showed realistic mathematical definition/formula of a memristive device that can be used to compute and predict important electrical and dynamical properties of the device [4]. The memristor invented at HP Labs is made of titanium dioxide sandwiched between two platinum contacts as shown in Fig. 2. The structure has two regions with a high dopant concentration (low resistance¼RON) and a low dopant concentration (higher resistance¼ROFF). Doped and undoped regions provide conductive and insulator layer for device, respectively. The comprehensive study about switching mechanism of memristor is analyzed by Waser and Aono [5]. RON state is conductive state of memristor, for another state (ROFF) memristor behaves like an insulator. Current–Voltage equation of
n
Corresponding author. E-mail addresses: [email protected] (A. Yeşil), [email protected] (Y. Babacan), [email protected] (F. Kaçar). 0026-2692/$ - see front matter & 2014 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.mejo.2014.01.011
memristor can be seen below. Here, wðtÞ wðtÞ VðtÞ ¼ RON þ ROFF 1 iðtÞ D D
ð1Þ
I(t): Memristor Current, RON : ON state resistance of Memristor V(t): Memristor Voltage, ROFF : OFF state resistance of Memristor Designers expect wide application area for memristive systems such as; neuromorphic networks, nonvolatile memories, chaotic circuits, logic circuits and so on [6]. In addition automatic gain control circuit [7], programmable analog circuits [8], oscillators [9–10], basic arithmetic operators [11] are the applications which memristors have already been used in. Memristor has numerous advantages but it is not available easily. For this reason, a lot of memristor SPICE macro models [12–17] and emulators [18–27] are proposed. HP memristor model is one of the earliest models. Various physical memristors and models proposed these years [19] and many mathematical models are highly consistent with the corresponding physical memristors-characteristics of physical memristors show differences from material to material-, such as the threshold adaptive memristor model proposed in [20] and the compact memristor model proposed in [21]. Abdalla and Pickett suggested SPICE model of real TiO2 memristive device [22]. In addition a physics-based memristor model suggested Williams and co-workers [23]. Another emulator proposed by Kolka et al. [24] consists of Analog Digital Converter Block, Microcontroller Unit and Digital Analog Converter Block. This emulator is programmable and it can be used commercially but its structure is complex. Mutlu and Karakulak [25] suggested emulator based on Op-Amp, which can be used practically. However, this configuration has two OP-AMPS, seven resistors, single capacitor, single diode and a multiplier. In a study by
A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
Kim et al. [26] reported that the memristor emulator is employing five OP-AMPs, eight resistors, discrete ten transistors and an adder. Yener and Kuntman [27] proposed memristor emulator based on CMOS
283
consists of four blocks that are employed five Differential Difference Current Conveyors (DDCC), four resistors and single capacitor. In this paper we will present a very simple memristor emulator using DDCC based on CMOS. In proposed emulator we have a single DDCC, two resistors, one capacitor and one multiplier circuit. Compatibility of memristor with CMOS is very important feature and this emulator achieved successfully. Integrating VLSI designs, working different frequency modes and having a simple structure are one of the prior properties of this emulator. In order to test the proposed emulator, applications (single, serial, parallel and MC circuit) are shown at the end of the paper.
2. Properties of subcircuit
Fig. 1. Relations of basic circuit component [3].
Current mode structures have many advantages circuit design. For this reason, current conveyors as a current mode structure are finding significant place in the IC design. Current conveyors have more linearity, very simple circuit structure, higher bandwidth, larger dynamic range, lower power consumption, and less chip area [28–30]. The Differential Difference Current Conveyor (DDCC) is introduced by Chiu et al.[31]. Filters, oscillators and inductance simulators are important applications of DDCC [32–39]. The circuit symbol of the DDCC is shown in Fig. 3, which shows the two types of output terminals, the positive outputs represented by terminal ZP and the negative by terminal ZN. The terminal characteristic of the DDCC can be described by the following matrix equation; 0 1 0 1 10 I VX 0 1 1 1 0 0 X B C B C V Y1 C B I Y1 C B 0 0 0 0 0 0C CB B C B C CB B I Y2 C B B 0 0 0 0 0 0 CB V Y2 C B C B C B C ð2Þ B C¼ B C V Y3 C B I Y3 C B 0 0 0 0 0 0C CB B C B B C CB B I ZP C B C 0 0 0 0 A@ V ZP A @ A @ 1 0 I ZN V ZN 1 0 0 0 0 0
Fig. 2. Memristor structure.
Fig. 3. DDCC circuit symbol.
The internal structure of improved DDCC is given (in Fig. 4) by three stages, which are cross-coupled quad, trans-linear loop and regulate gate cascade, respectively. In the literature, the cross-coupled quad configuration proposed by [40], has superior linearity and input voltage range compared with conventional source-coupled differential pair. The trans-linear loop provides the necessary feedback action to make the voltage VX independent of the current drawn from the port-X. Also, a high performance output stage is proposed by [41] in the regulated–gate cascade (RGC) parts [42] of the output stage high output impedance is achieved by the negative active feedback loop.
Fig. 4. Internal structure of DDCC [39].
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A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
To verify the functionality of the improved DDCC, SPICE simulations have been carried out using TSMC 0.35 mm CMOS process model parameters and DC supply voltages equal to 71.5 V and bias voltage equals to VB ¼ 0.4 V. The aspect ratios of the transistors are given in Table 1 [39]. All MOS transistors are operated in saturation region and all of the bulks are connected to the sources. The main performances of the DDCC are summarized in Table 2.
3. Proposed emulator circuit Memristor emulator was designed by using DDCC active circuit component based on CMOS. As shown in Fig. 5, this decremental memristor circuit is employed single DDCC, two resistors, single capacitor and single multiplier. Capacitor voltage (VC) and resistor voltage (VR) are multiplied and after multiplication these value become Y1 terminal. RS initial resistance is connected to X terminal. Routine analysis of decremental memristor emulator shown Fig. 5 gives the following equation; V INPUT ¼ I INPUT RS þ V X
Table 1 Transistors aspect ratios for DDCC.
ð3Þ
Using characteristic equation of DDCC and VY2 ¼0,
Transistors
W(lm)
L(lm)
Transistors
W(lm)
L(lm)
M1–M4 M1A–M4A M6,M7 M5A, M5B M8 M9
4 10 32 7 20 1
4 1 2 1 1 1
M10, M11 M12, M13 MP1–MP7 MAP, MKP MBN,MCN,MBP,MCP MN1–MN7 MAN, MKN
10 30 30 3 2.5 10 1
1 1 1 1 1 1 1
V X ¼ V Y1 þ V Y3
ð4Þ
Vin Iin
60mV
8µA
40mV 4µA
Table 2 Performances of DDCC.
0µA
0mV
Current (Iin)
Voltage (Vin)
20mV
-20mV
Parameters Linearity VX/VY Linearity IZP/IX , IZN/IX VX/VY gain IZP/IX gain , IZN/IX gain VX/VY f-3dB IZP/IX f-3dB , IZN/IX f-3dB Output resistance RZP, RZN
Values –1.278 V/0.73 V –647 mA/488 mA, 500 mA/559 mA 0.99 0.99, 0.99 307 MHz 180.7 MHz, 178.2 MHz 445 GΩ, 432 GΩ
-4µA -40mV
-8µA
-60mV 0.7ms
0.8ms
0.9ms
1ms
Time
Fig. 7. Voltage–Time and Current–Time characteristics of decremental memristor.
Fig. 5. Decremental memristor emulator (a) schematic and (b) electrical symbol.
Fig. 6. Incremental memristor emulator (a) schematic and (b) electrical symbol.
A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
285
VY1 is obtained VR multiple by VC and VY3 ¼ Vsum V Y1 ¼ V R V C
ð5Þ
where VR and VC are defined by in Eq. (6) V R ¼ I INPUT RT ; and V C ¼
qC CT
Substituting Eqs. (4)–(6) into equation (3) gives q V INPUT ¼ I INPUT RS þ I INPUT RT C þ V SUM CT
ð6Þ
ð7Þ
Vsum equal to zero (0) while memristance equation of decremental memristor is calculated in Eq. (7). Therefore, memristance equation of the proposed decremental memristor is obtained as M¼
V INPUT q ¼ RS RT C I INPUT CT
ð8Þ
It is seen from Eq. (8) that there is only one condition to prevent negative memristance (M). The condition is given following equation: Fig. 8. Current–Voltage characteristics of memristor and connections.
Table 3 The values of RS, CT and RT for different frequency ranges. 1–10 Hz
100 Hz–1 kHz
10–100 kHz
100 kHz–1 MHz
RS ¼16 kΩ RT ¼6 kΩ CT ¼ 1 mF
RS ¼ 16 kΩ RT ¼ 6 kΩ CT ¼10 nF
RS ¼ 16 kΩ RT ¼ 6 kΩ CT ¼100 pF
RS ¼ 16 kΩ RT ¼6 kΩ CT ¼10 pF
RS 4RT
qC CT
ð9Þ
In order to prevent negative memristance, the condition should be satisfied given in Eq. (9) while passive components are selected. The sign of CqCT RT expression is negative (RS RT CqCT ) for decremental memristor and also this sign is positive (RS þ RT CqCT ) for incremental memristor in Eq. (8). Creating both decremental and incremental memristors are very easily for designed emulator. If output terminals have different
Fig. 9. Current–Voltage characteristics of memristor with different frequency ranges.
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polarity, emulator becomes decremental as shown in Fig. 5 or if these terminals have the same polarity than emulator behaves as an incremental memristor shown in Fig. 6. If a voltage is applied to serial connected memristors, these memristors share applied voltage like resistors according to voltage law. As a result, input voltage equal to the sum of each memristor voltage like ordinary resistors [26]. To sum each voltage of components must be transferred to next component. For this reason, new terminal (Vsum) is added to memristor to provide this summing operation. New terminal (Vsum) is important because voltage summation is more difficult than current summation for this reason extra circuit is required. But extra circuit is not used to provide summing operation in the proposed emulator unlike another emulator circuit [26].
5. Conclusion We designed new memristor emulator using DDCC based on CMOS. Compatibility of memristor with other semiconductor device (especially CMOS) is very important for VLSI. This is important for compact circuit design using memristor and other circuit elements. Proposed memristor emulator; (i) is very simple. (ii) works different frequency modes (This property provides to designers adaptive circuit design analyses and realization. (iii) does not need extra adder. Lack of the adder circuit for serial connections offers extra advantage compared to other emulators. The performance of the proposed memristor emulator circuit was tested with application examples of connected serial, parallel memristor and MC circuit. Spice simulation results were given to verify the theory. It was seen that the simulation results verified the theory.
4. Simulation results and application examples
Table 4 The values of M, C and R. M, R, C values RS ¼ 16 kΩ R¼ 16 kΩ 100 nF
Minitial (10-100 kHz) R C
50mV
40mV
Voltage (Vin)
In order to show memristor characteristics, values of passive elements, RS ¼16 kΩ, RT ¼6 kΩ and CT ¼100 pF, are chosen to work at 10 kHz. Firstly emulator was simulated to test the behavior via using SPICE program. Input voltage and input current characteristics of memristor emulator are given in Fig. 7. Single memristor, connected serial and parallel memristors as shown in Fig. 8 are simulated. Fundamental characteristics of memristor are obtained expectedly. Namely parallel memristor hysteresis loop is bigger than single memristor and serial connected memristor (opposite direction) behaves as a linear resistor. After using different connections, frequency response of memristor is tested for four different frequency regions and chosen passive elements values are given in Table 3. In Fig. 9, it can be seen that hysteresis loop converts to linear resistor from low to high frequency. As shown in Fig. 9, this emulator can work different frequency modes changing capacitor value. This property is very important for wide range frequency circuits. In order to show applications of memristor with other passive circuit elements, serial MC (decremental and incremental memristor) and serial RC connections are indicated in Fig. 10. If decremental memristor is used with capacitor (MC-decremental) discharge time must be lower, for incremental this must be higher than serial RC circuit. The values chosen for passive element is given in Table 4. Decay time depends on resistance variations (namely memristance) and if memristance becomes lower than initial memristance value of memristor (decremental) than time constant becomes lower. In case of usage of incremental memristor, memristance value is higher than initial memristance value and time constant will be higher as shown in Fig. 11 (time constant are RC, MC, C value fixed). As a result, it is seen that simulation results are very similar Joglekar's theoretical MC circuit [43].
RCinFig.10a MC(decremental)inFig.10b MC(incremental)inFig.10c
30mV
20mV
10mV
0mV 0ms
3ms
6ms
9ms
12ms
Time Fig. 11. Decharge curves of MC and RC.
Fig. 10. (a) RC, (b) MC (decremental) and (c) MC (incremental) circuit for application of memristor.
15ms
A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
References [1] L.O. Chua, Memristor—the missing circuit element, IEEE Trans. Circuit Theory 18 (1971) 507–519. [2] L.O. Chua, S.M. Kang, Memristive devices and systems, Proc. IEEE (1976) 209–223. [3] D.B. Strukov, G.S. Snider, D.R. Stewart, R.S. Williams, The missing memristor found, Nature (London) 453 (2008) 80–83. [4] M.D. Pickett, D.B. Strukov, J.L. Borghetti, J.J. Yang, G.S. Snider, D.R. Stewart, R.S. Williams, Switching dynamics in titanium dioxide memristive devices, J. Appl. Phys. 106 (2009) 106. [5] R. Waser, M. Aono, Nanoionics-based resistive switching memories, Nat. Mater. 6 (2007) 833–840. [6] P. Mazumder, S.M. Kang, R. Waser, Memristors: devices, models, and applications, Proc. IEEE 100 (6) (2012) 1911–1919. [7] T. Wey, W. Jemison, An automatic gain control circuit with TiO2 memristor variable gain amplifier, in: Proceedings of the 8th IEEE International NEWCAS Conference (NEWCAS) 2010, (2010), pp. 49–52. [8] Y.V. Pershin, M. Di Ventra, Practical approach to programmable analog circuits with memristors.”, Circuits Syst. I: Regul. Pap. IEEE Trans. 57 (8) (2010) 1857–1864. [9] A.T. Bahgat, K.N. Salama, Memristor-based mono-stable oscillator, Arxiv preprint, arXiv:1207.0847. [10] A. Talukdar, A. Radwan, K. Salama, A memristor-based third-order oscillator: beyond oscillation, Appl. Nanosci. (2011) 1–3. [11] F. Merrikh-Bayat, S. Shouraki, Memristor-based circuits for performing basic arithmetic operations, Proc. Comput. Sci. 3 (2011) 128–132. [12] Z. Biolek, D. Biolek, V. Biolkova, SPICE model of memristor with nonlinear dopant drift, Radioengineering 18 (2) (2009) 210–214. [13] S. Benderli, T.A. Wey, On SPICE macromodelling of TiO2 memristors, Electron. Lett. 45 (7) (2009) 377–378. [14] Y. Zhang, X. Zhang, J. Yu, Approximated SPICE model for memristor, in Proceedings of the International Conference on Communications, Circuits and Systems ICCCAS, 2009, pp. 928–931. [15] D. Biolek, Z. Biolek, V. Biolkova, SPICE Modeling of Memristive, Memcapacitative and Meminductive Systems, Eur. Conf. Circuit Theory Des. ECCTD (2009) 249–252. [16] A. Delgado, Input–output linearization of memristive systems, Nanotechnol. Mater. Dev. Conf. (2009) 154–157. [17] Y. Chen, X. Wang, Compact modeling and corner analysis of spintronic memristor, Int. Symp. Nanoscale Architect. (2009) 7–12. [18] S. Shin, L. Zheng, G. Weickhard, S. Cho, M. Kang, Compact circuit model and hardware emulation for floating memristor devices, IEEE Circuits Syst. Mag. 13 (2) (2013) 42–55. [19] J.J. Yang, D.B. Strukov, D.R. Stewart, Memristive devices for computing, Nat. Nanotechnol. 8 (1) (2012) 13–24. [20] S. Kvatinsky, E.G. Friedman, A.S. Kolodny, U.C. Weiser, TEAM: threshold adaptive memristor model, IEEE Trans. Circuits Syst.–I 60 (1) (2012) 211–221. [21] C. Yakopcic, S. Member, T.M. Taha, et al., A memristor device model, IEEE Electron Dev. Lett. (2011) 1436–1438. [22] H. Abdalla, M.D. Pickett, SPICE modeling of memristors, ISCAS (2011) 1832–1835.
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[23] R.S. Williams, M.D. Pickett, J.P. Strachan, Physics-based memristor models, ISCAS (2013) 217–220. [24] Z. Kolka, D. Biolek, V. Biolkova, Hybrid modelling and emulation of memsystems, Int. J. Numer. Model. Electron. Netw. Dev. Fields 25 (3) (2012) 216–225. [25] R. Mutlu, E. Karakulak, Simulator circuit of TiO2 memristor with linear dopant drift made using analog multiplier, Electrical, Electronics and Computer Engineering (ELECO) National Conference, 2010, 380–384. [26] H. Kim, M.P. Sah, C. Yang, S. Cho, L.O. Chua, Memristor emulator for memristor circuit applications, IEEE Trans. Circuits Syst.–I Regul. 59 (10) (2012) 2422–2431. [27] Ş.Yener, H. Kuntman, A new CMOS based memristor implementation, Applied Electronics 2012 International Conference, 30 (4) (2012), pp. 345–348. [28] C. Toumazou, A. Payne, D. Haigh, Analogue IC design: the Current Mode Approach, London, 1990. [29] G. Palumbo, S. Palmisano, S. Pennisi, CMOS Current Amplifiers, Kluwer Academic Publishers, Boston, 1999. [30] W.A. Serdijin, Low-Voltage Low-Power Analog Integrated Circuits, Kluwer Academic Publishers, Boston, 1995. [31] W. Chiu, S.I. Liu, H.W. Tsao, J.J. Chen, CMOS differential difference current conveyors and their applications, IEEE Proc. Circuit Dev. Syst. 143 (1996) 91–96. [32] M. Kumngern, F. Khateb, K. Dejhan, P. Phasukkit, S. Tungjitkusolmun, Voltagemode multifunction biquadratic filters using new ultra-low-power differential difference current conveyors, Radioengineering 22 (2) (2013) 448–457. [33] H.P. Chen, Versatile universal voltage-mode filter employing DDCCs, AEU—Int. J. Electron. Commun. 63 (1) (2009) 78–82. [34] B. Metin, K. Pal, O. Cicekoglu, Allpass filters using DDCC and MOSFET based electronic resistor, Int. J. Circuit Theory Appl. 39 (8) (2011) 881–891. [35] V. Aggarwal, Novel canonic current mode DDCC based SRCO synthesized using a genetic algorithm, Analog Integr. Circuits Signal Process. 40 (1) (2004) 83–85. [36] J.W. Horng, C.L. Hou, C.M. Chang, Y.T. Lin, I.C. Shiu, W.Y. Chiu, First-order allpass filter and sinusoidal oscillators using DDCCs, Int. J. Electron. 93 (7) (2006) 457–466. [37] M.A. Ibrahim, S. Minaei, E. Yuce, N. Herencsar, J. Koton, Lossy/lossless floating/ grounded inductance simulation using one DDCC, Radioengineering 21 (1) (2012) 3–10. [38] E. Yuce, New low component count floating inductor simulators consisting of a single DDCC, Analog Integr. Circuits Signal Process. 58 (1) (2009) 61–66. [39] M.A. Ibrahim, Development of High Performance CMOS DDCC and DVCC Structures and Their Applications (thesis), Institute of Science and Technology, Istanbul Technical University, 2004. [40] A. Nedungadi, T.R. Viswanathan, Design of linear transconductance elements, IEEE Trans. Circuit Theory 31 (1984) 891–894. [41] A. Zeki, H. Kuntman, Accurate and high output impedance current mirror suitable for CMOS current output stages, Electron. Lett. 33 (1997) 1042–1043. [42] E. Sackinger, W. Guggenbuhl, A high-swing, high-impedance MOS cascode circuit, IEEE J. Solid State Circuits 25 (1990) 289–298. [43] Y.N. Joglekar, S.J. Wolf, The elusive memristor: Properties of basic electrical circuits, Eur. J. Phys. 30 (4) (2009) 661–675.
Contents lists available at ScienceDirect
Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo
A new DDCC based memristor emulator circuit and its applications Abdullah Yeşil, Yunus Babacan, Fırat Kaçar n Department of Electrical and Electronics Engineering, Istanbul University, Istanbul, Turkey
art ic l e i nf o
a b s t r a c t
Article history: Received 3 August 2013 Received in revised form 10 January 2014 Accepted 17 January 2014
Memristor is a new passive circuit element. The interaction of the memristor with other circuit elements is important for designers. In this paper, new memristor emulator circuit is designed using DDCC (differential difference current conveyor) based on CMOS. It is realized that the proposed emulator causes less complexity compared to other designed emulator circuits. Compatibility of memristor with CMOSs and its operation ability at high frequencies are very important for circuit design based on memristor. The emulator based on CMOS can manage to provide these two fundamental properties successfully. In order to test the proposed emulator, it is connected to memristor with both ways, serial and parallel, than MC circuit is analyzed and results are shown at the end of the paper. & 2014 Elsevier Ltd. All rights reserved.
Keywords: Memristor DDCC Analog Integrated Circuit CMOS
1. Introduction Prediction [1,2] and experimental realization of the memristor [3] increased interest in passive circuit element memristor. In 1971, Leon Chua noted mathematical relations between four fundamental circuit components i, v, q and ϕ as shown in Fig. 1. Resistance (R) is the rate of voltage with current (R ¼dv/di), capacitance (C) is the rate of charge with voltage (C ¼ dq/dv) and inductance (L) is the rate of change of magnetic flux with current (L ¼dϕ/di). From symmetry, Chua noticed the absent of the fourth fundamental element which for him should be, called memristor (M), relation between charge and magnetic flux, M ¼dϕ/dq. Memristor had been just a theory before Williams and coworkers fabricated memristor as a structure of Pt/TiO2/Pt [3] and they showed realistic mathematical definition/formula of a memristive device that can be used to compute and predict important electrical and dynamical properties of the device [4]. The memristor invented at HP Labs is made of titanium dioxide sandwiched between two platinum contacts as shown in Fig. 2. The structure has two regions with a high dopant concentration (low resistance¼RON) and a low dopant concentration (higher resistance¼ROFF). Doped and undoped regions provide conductive and insulator layer for device, respectively. The comprehensive study about switching mechanism of memristor is analyzed by Waser and Aono [5]. RON state is conductive state of memristor, for another state (ROFF) memristor behaves like an insulator. Current–Voltage equation of
n
Corresponding author. E-mail addresses: [email protected] (A. Yeşil), [email protected] (Y. Babacan), [email protected] (F. Kaçar). 0026-2692/$ - see front matter & 2014 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.mejo.2014.01.011
memristor can be seen below. Here, wðtÞ wðtÞ VðtÞ ¼ RON þ ROFF 1 iðtÞ D D
ð1Þ
I(t): Memristor Current, RON : ON state resistance of Memristor V(t): Memristor Voltage, ROFF : OFF state resistance of Memristor Designers expect wide application area for memristive systems such as; neuromorphic networks, nonvolatile memories, chaotic circuits, logic circuits and so on [6]. In addition automatic gain control circuit [7], programmable analog circuits [8], oscillators [9–10], basic arithmetic operators [11] are the applications which memristors have already been used in. Memristor has numerous advantages but it is not available easily. For this reason, a lot of memristor SPICE macro models [12–17] and emulators [18–27] are proposed. HP memristor model is one of the earliest models. Various physical memristors and models proposed these years [19] and many mathematical models are highly consistent with the corresponding physical memristors-characteristics of physical memristors show differences from material to material-, such as the threshold adaptive memristor model proposed in [20] and the compact memristor model proposed in [21]. Abdalla and Pickett suggested SPICE model of real TiO2 memristive device [22]. In addition a physics-based memristor model suggested Williams and co-workers [23]. Another emulator proposed by Kolka et al. [24] consists of Analog Digital Converter Block, Microcontroller Unit and Digital Analog Converter Block. This emulator is programmable and it can be used commercially but its structure is complex. Mutlu and Karakulak [25] suggested emulator based on Op-Amp, which can be used practically. However, this configuration has two OP-AMPS, seven resistors, single capacitor, single diode and a multiplier. In a study by
A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
Kim et al. [26] reported that the memristor emulator is employing five OP-AMPs, eight resistors, discrete ten transistors and an adder. Yener and Kuntman [27] proposed memristor emulator based on CMOS
283
consists of four blocks that are employed five Differential Difference Current Conveyors (DDCC), four resistors and single capacitor. In this paper we will present a very simple memristor emulator using DDCC based on CMOS. In proposed emulator we have a single DDCC, two resistors, one capacitor and one multiplier circuit. Compatibility of memristor with CMOS is very important feature and this emulator achieved successfully. Integrating VLSI designs, working different frequency modes and having a simple structure are one of the prior properties of this emulator. In order to test the proposed emulator, applications (single, serial, parallel and MC circuit) are shown at the end of the paper.
2. Properties of subcircuit
Fig. 1. Relations of basic circuit component [3].
Current mode structures have many advantages circuit design. For this reason, current conveyors as a current mode structure are finding significant place in the IC design. Current conveyors have more linearity, very simple circuit structure, higher bandwidth, larger dynamic range, lower power consumption, and less chip area [28–30]. The Differential Difference Current Conveyor (DDCC) is introduced by Chiu et al.[31]. Filters, oscillators and inductance simulators are important applications of DDCC [32–39]. The circuit symbol of the DDCC is shown in Fig. 3, which shows the two types of output terminals, the positive outputs represented by terminal ZP and the negative by terminal ZN. The terminal characteristic of the DDCC can be described by the following matrix equation; 0 1 0 1 10 I VX 0 1 1 1 0 0 X B C B C V Y1 C B I Y1 C B 0 0 0 0 0 0C CB B C B C CB B I Y2 C B B 0 0 0 0 0 0 CB V Y2 C B C B C B C ð2Þ B C¼ B C V Y3 C B I Y3 C B 0 0 0 0 0 0C CB B C B B C CB B I ZP C B C 0 0 0 0 A@ V ZP A @ A @ 1 0 I ZN V ZN 1 0 0 0 0 0
Fig. 2. Memristor structure.
Fig. 3. DDCC circuit symbol.
The internal structure of improved DDCC is given (in Fig. 4) by three stages, which are cross-coupled quad, trans-linear loop and regulate gate cascade, respectively. In the literature, the cross-coupled quad configuration proposed by [40], has superior linearity and input voltage range compared with conventional source-coupled differential pair. The trans-linear loop provides the necessary feedback action to make the voltage VX independent of the current drawn from the port-X. Also, a high performance output stage is proposed by [41] in the regulated–gate cascade (RGC) parts [42] of the output stage high output impedance is achieved by the negative active feedback loop.
Fig. 4. Internal structure of DDCC [39].
284
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To verify the functionality of the improved DDCC, SPICE simulations have been carried out using TSMC 0.35 mm CMOS process model parameters and DC supply voltages equal to 71.5 V and bias voltage equals to VB ¼ 0.4 V. The aspect ratios of the transistors are given in Table 1 [39]. All MOS transistors are operated in saturation region and all of the bulks are connected to the sources. The main performances of the DDCC are summarized in Table 2.
3. Proposed emulator circuit Memristor emulator was designed by using DDCC active circuit component based on CMOS. As shown in Fig. 5, this decremental memristor circuit is employed single DDCC, two resistors, single capacitor and single multiplier. Capacitor voltage (VC) and resistor voltage (VR) are multiplied and after multiplication these value become Y1 terminal. RS initial resistance is connected to X terminal. Routine analysis of decremental memristor emulator shown Fig. 5 gives the following equation; V INPUT ¼ I INPUT RS þ V X
Table 1 Transistors aspect ratios for DDCC.
ð3Þ
Using characteristic equation of DDCC and VY2 ¼0,
Transistors
W(lm)
L(lm)
Transistors
W(lm)
L(lm)
M1–M4 M1A–M4A M6,M7 M5A, M5B M8 M9
4 10 32 7 20 1
4 1 2 1 1 1
M10, M11 M12, M13 MP1–MP7 MAP, MKP MBN,MCN,MBP,MCP MN1–MN7 MAN, MKN
10 30 30 3 2.5 10 1
1 1 1 1 1 1 1
V X ¼ V Y1 þ V Y3
ð4Þ
Vin Iin
60mV
8µA
40mV 4µA
Table 2 Performances of DDCC.
0µA
0mV
Current (Iin)
Voltage (Vin)
20mV
-20mV
Parameters Linearity VX/VY Linearity IZP/IX , IZN/IX VX/VY gain IZP/IX gain , IZN/IX gain VX/VY f-3dB IZP/IX f-3dB , IZN/IX f-3dB Output resistance RZP, RZN
Values –1.278 V/0.73 V –647 mA/488 mA, 500 mA/559 mA 0.99 0.99, 0.99 307 MHz 180.7 MHz, 178.2 MHz 445 GΩ, 432 GΩ
-4µA -40mV
-8µA
-60mV 0.7ms
0.8ms
0.9ms
1ms
Time
Fig. 7. Voltage–Time and Current–Time characteristics of decremental memristor.
Fig. 5. Decremental memristor emulator (a) schematic and (b) electrical symbol.
Fig. 6. Incremental memristor emulator (a) schematic and (b) electrical symbol.
A. Yeşil et al. / Microelectronics Journal 45 (2014) 282–287
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VY1 is obtained VR multiple by VC and VY3 ¼ Vsum V Y1 ¼ V R V C
ð5Þ
where VR and VC are defined by in Eq. (6) V R ¼ I INPUT RT ; and V C ¼
qC CT
Substituting Eqs. (4)–(6) into equation (3) gives q V INPUT ¼ I INPUT RS þ I INPUT RT C þ V SUM CT
ð6Þ
ð7Þ
Vsum equal to zero (0) while memristance equation of decremental memristor is calculated in Eq. (7). Therefore, memristance equation of the proposed decremental memristor is obtained as M¼
V INPUT q ¼ RS RT C I INPUT CT
ð8Þ
It is seen from Eq. (8) that there is only one condition to prevent negative memristance (M). The condition is given following equation: Fig. 8. Current–Voltage characteristics of memristor and connections.
Table 3 The values of RS, CT and RT for different frequency ranges. 1–10 Hz
100 Hz–1 kHz
10–100 kHz
100 kHz–1 MHz
RS ¼16 kΩ RT ¼6 kΩ CT ¼ 1 mF
RS ¼ 16 kΩ RT ¼ 6 kΩ CT ¼10 nF
RS ¼ 16 kΩ RT ¼ 6 kΩ CT ¼100 pF
RS ¼ 16 kΩ RT ¼6 kΩ CT ¼10 pF
RS 4RT
qC CT
ð9Þ
In order to prevent negative memristance, the condition should be satisfied given in Eq. (9) while passive components are selected. The sign of CqCT RT expression is negative (RS RT CqCT ) for decremental memristor and also this sign is positive (RS þ RT CqCT ) for incremental memristor in Eq. (8). Creating both decremental and incremental memristors are very easily for designed emulator. If output terminals have different
Fig. 9. Current–Voltage characteristics of memristor with different frequency ranges.
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polarity, emulator becomes decremental as shown in Fig. 5 or if these terminals have the same polarity than emulator behaves as an incremental memristor shown in Fig. 6. If a voltage is applied to serial connected memristors, these memristors share applied voltage like resistors according to voltage law. As a result, input voltage equal to the sum of each memristor voltage like ordinary resistors [26]. To sum each voltage of components must be transferred to next component. For this reason, new terminal (Vsum) is added to memristor to provide this summing operation. New terminal (Vsum) is important because voltage summation is more difficult than current summation for this reason extra circuit is required. But extra circuit is not used to provide summing operation in the proposed emulator unlike another emulator circuit [26].
5. Conclusion We designed new memristor emulator using DDCC based on CMOS. Compatibility of memristor with other semiconductor device (especially CMOS) is very important for VLSI. This is important for compact circuit design using memristor and other circuit elements. Proposed memristor emulator; (i) is very simple. (ii) works different frequency modes (This property provides to designers adaptive circuit design analyses and realization. (iii) does not need extra adder. Lack of the adder circuit for serial connections offers extra advantage compared to other emulators. The performance of the proposed memristor emulator circuit was tested with application examples of connected serial, parallel memristor and MC circuit. Spice simulation results were given to verify the theory. It was seen that the simulation results verified the theory.
4. Simulation results and application examples
Table 4 The values of M, C and R. M, R, C values RS ¼ 16 kΩ R¼ 16 kΩ 100 nF
Minitial (10-100 kHz) R C
50mV
40mV
Voltage (Vin)
In order to show memristor characteristics, values of passive elements, RS ¼16 kΩ, RT ¼6 kΩ and CT ¼100 pF, are chosen to work at 10 kHz. Firstly emulator was simulated to test the behavior via using SPICE program. Input voltage and input current characteristics of memristor emulator are given in Fig. 7. Single memristor, connected serial and parallel memristors as shown in Fig. 8 are simulated. Fundamental characteristics of memristor are obtained expectedly. Namely parallel memristor hysteresis loop is bigger than single memristor and serial connected memristor (opposite direction) behaves as a linear resistor. After using different connections, frequency response of memristor is tested for four different frequency regions and chosen passive elements values are given in Table 3. In Fig. 9, it can be seen that hysteresis loop converts to linear resistor from low to high frequency. As shown in Fig. 9, this emulator can work different frequency modes changing capacitor value. This property is very important for wide range frequency circuits. In order to show applications of memristor with other passive circuit elements, serial MC (decremental and incremental memristor) and serial RC connections are indicated in Fig. 10. If decremental memristor is used with capacitor (MC-decremental) discharge time must be lower, for incremental this must be higher than serial RC circuit. The values chosen for passive element is given in Table 4. Decay time depends on resistance variations (namely memristance) and if memristance becomes lower than initial memristance value of memristor (decremental) than time constant becomes lower. In case of usage of incremental memristor, memristance value is higher than initial memristance value and time constant will be higher as shown in Fig. 11 (time constant are RC, MC, C value fixed). As a result, it is seen that simulation results are very similar Joglekar's theoretical MC circuit [43].
RCinFig.10a MC(decremental)inFig.10b MC(incremental)inFig.10c
30mV
20mV
10mV
0mV 0ms
3ms
6ms
9ms
12ms
Time Fig. 11. Decharge curves of MC and RC.
Fig. 10. (a) RC, (b) MC (decremental) and (c) MC (incremental) circuit for application of memristor.
15ms
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