Assignment 2 Solutions
Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 – Combinational Logic Due October 19th, 2009
Question 1:
A convenient shorthand for specifying truth tables is to list the set of minterms (or maxterms) for which the corresponding Boolean function is true (or false). Consider the following truth table:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
F(A,B,C,D) d 0 1 1 0 1 0 0 d 0 1 1 0 1 0 0
F(A, B,C, D) =
∑ 2,3, 5,10,11,13 + 1
∑ 0,8 d
F(A, B,C, D) =
∏1,4,6,7,9,12,14,15 + 0
∏ 0,8 d
The shorthand for the sum-of-products (∑∏) and product-of-sums (∏∑) forms is shown at the right of the truth table. Given this specification for a Boolean function, answer the following questions. a) Use algebraic methods to derive the minimal forms for both ∑∏ and ∏∑ assuming that don't cares are set to 0 for ∑∏ and 1 for ∏∑. b) Repeat the above using Karnaugh maps. Here you may choose the don't cares to minimize the resulting expressions. c) Repeat the minimization, this time assuming don't cares are all 0, using any minimization method. Prove algebraically that the resulting forms are equal (same truth table).
Question 2 Write down the truth table for a full subtracter. Your truth table should be laid out in the following order: Ai Bi | Di Ro Ri The structure is identical to that of the full adder, except that Di corresponds to the difference, Ri to the borrow input, and Ro to the borrow output respectively. In a non two's complement machine such a circuit would be required to implement the subtraction operation directly. Once you have determined the truth table, determine the minimal ∑∏ and ∏∑ forms corresponding to the borrow output, Ro, respectively. Do this using both algebraic minimization and Karnaugh maps. Implement the corresponding circuits using NAND-NAND and NOR-NOR logic in LogicWorks. Show that your circuits implement the specified truth tables. Question 3 Any Boolean function can be implemented using either NAND gates or NOR gates exclusively, provided that sufficient inputs are available (e.g. a 4-input NAND gate can serve as a 3-input NAND gate, a 2-input NAND gate, and an inverter). Determine the maximum number of inputs for each of the circuits you designed in Question 2 and design the corresponding gates following the examples shown in the course notes. For this question use active pull-ups and pull-downs. Implement and test your gates using LogicWorks. You can then use the DEVICE SYMBOL option under the FILE menu to encapsulate your gate design for subsequent use. Test each of the 2 gates using LogicWorks (i.e. verify their truth tables). Next, re-implement each of the two circuits from Question 2 (NAND-NAND and NOR-NOR), and verify their functionality using the same testing as applied in Question 2. Note: Since LogicWorks does not have an active(0) type of switch, use an inverter connected to the control input of an active(1) switch instead. If you want to be a bit more elegant, use the device editor to create an active(0) switch by modifying the active(1) switch (i.e. X-gate) by negating the control input. You can also use the drawing tools to place an inverter bubble on the gate symbol. MAKE SURE THAT YOU SAVE THE RESULT IN A DIFFERENT LIBRARY UNDER A DIFFERENT NAME so that you don't overwrite the existing part.
Question 4 Another way to implement a truth table is to use a multiplexer. A 2 to1 mux, like the one discussed in class, can select one of two inputs using a single control input. A 4 to 1 mux selects one of four inputs using two control inputs. Consider the following. By using the 2 control inputs as the table input variables and appropriately hard wiring the 4 inputs of the mux to 0 or 1, a 2 input truth table can be implemented. Using this approach, an n input truth table can be implemented using a 2 n to 1 mux. a) Using the gate types you designed in Question 3, design a 2 to 1 multiplexer. Verify its operation using LogicWorks. b) Now using the 2-way routing switch as a building block (use the device editor in LogicWorks to encapsulate the 2-way switch), design a multiplexer large enough to implement the truth table described in Question 2. Predict the propagation delay, Tpd, of your multiplexer (you will need this to figure out how to space the inputs to your circuit in time). Test your multiplexer with appropriate waveforms and verify that the measured Tpd is consistent with its predicted value. c) Hard wire the inputs to your multiplexer to implement the truth table described in Question 2. Verify its operation using LogicWorks. d) Explain the presence of any anomalous signals (glitches) in your output and give an example of an input transition that results in a glitch at the output. Show this example using LogicWorks. Question 5: Bonus The size of the multiplexer used to implement a truth table can be cut in half (e.g. 4 inputs instead of 8) if one of the variables is used as an input instead of being connected to a select line. For example, a truth table with inputs A, B, C, could be implemented using a 4-input multiplexer with A and B connected to the 2 select lines. A and B would then be able to select 0, 1, C or C (assuming that an inverter is available for C). Figure out how to re-implement Question 3 this way and prove that your solution is correct with a LogicWorks simulation.
FPF/October 5th, 2009
Question 1:
A convenient shorthand for specifying truth tables is to list the set of minterms (or maxterms) for which the corresponding Boolean function is true (or false). Consider the following truth table:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
F(A,B,C,D) d 0 1 1 0 1 0 0 d 0 1 1 0 1 0 0
F(A, B,C, D) =
∑ 2,3, 5,10,11,13 + 1
∑ 0,8 d
F(A, B,C, D) =
∏1,4,6,7,9,12,14,15 + 0
∏ 0,8 d
The shorthand for the sum-of-products (∑∏) and product-of-sums (∏∑) forms is shown at the right of the truth table. Given this specification for a Boolean function, answer the following questions. a) Use algebraic methods to derive the minimal forms for both ∑∏ and ∏∑ assuming that don't cares are set to 0 for ∑∏ and 1 for ∏∑. b) Repeat the above using Karnaugh maps. Here you may choose the don't cares to minimize the resulting expressions. c) Repeat the minimization, this time assuming don't cares are all 0, using any minimization method. Prove algebraically that the resulting forms are equal (same truth table).
Question 2 Write down the truth table for a full subtracter. Your truth table should be laid out in the following order: Ai Bi | Di Ro Ri The structure is identical to that of the full adder, except that Di corresponds to the difference, Ri to the borrow input, and Ro to the borrow output respectively. In a non two's complement machine such a circuit would be required to implement the subtraction operation directly. Once you have determined the truth table, determine the minimal ∑∏ and ∏∑ forms corresponding to the borrow output, Ro, respectively. Do this using both algebraic minimization and Karnaugh maps. Implement the corresponding circuits using NAND-NAND and NOR-NOR logic in LogicWorks. Show that your circuits implement the specified truth tables. Question 3 Any Boolean function can be implemented using either NAND gates or NOR gates exclusively, provided that sufficient inputs are available (e.g. a 4-input NAND gate can serve as a 3-input NAND gate, a 2-input NAND gate, and an inverter). Determine the maximum number of inputs for each of the circuits you designed in Question 2 and design the corresponding gates following the examples shown in the course notes. For this question use active pull-ups and pull-downs. Implement and test your gates using LogicWorks. You can then use the DEVICE SYMBOL option under the FILE menu to encapsulate your gate design for subsequent use. Test each of the 2 gates using LogicWorks (i.e. verify their truth tables). Next, re-implement each of the two circuits from Question 2 (NAND-NAND and NOR-NOR), and verify their functionality using the same testing as applied in Question 2. Note: Since LogicWorks does not have an active(0) type of switch, use an inverter connected to the control input of an active(1) switch instead. If you want to be a bit more elegant, use the device editor to create an active(0) switch by modifying the active(1) switch (i.e. X-gate) by negating the control input. You can also use the drawing tools to place an inverter bubble on the gate symbol. MAKE SURE THAT YOU SAVE THE RESULT IN A DIFFERENT LIBRARY UNDER A DIFFERENT NAME so that you don't overwrite the existing part.
Question 4 Another way to implement a truth table is to use a multiplexer. A 2 to1 mux, like the one discussed in class, can select one of two inputs using a single control input. A 4 to 1 mux selects one of four inputs using two control inputs. Consider the following. By using the 2 control inputs as the table input variables and appropriately hard wiring the 4 inputs of the mux to 0 or 1, a 2 input truth table can be implemented. Using this approach, an n input truth table can be implemented using a 2 n to 1 mux. a) Using the gate types you designed in Question 3, design a 2 to 1 multiplexer. Verify its operation using LogicWorks. b) Now using the 2-way routing switch as a building block (use the device editor in LogicWorks to encapsulate the 2-way switch), design a multiplexer large enough to implement the truth table described in Question 2. Predict the propagation delay, Tpd, of your multiplexer (you will need this to figure out how to space the inputs to your circuit in time). Test your multiplexer with appropriate waveforms and verify that the measured Tpd is consistent with its predicted value. c) Hard wire the inputs to your multiplexer to implement the truth table described in Question 2. Verify its operation using LogicWorks. d) Explain the presence of any anomalous signals (glitches) in your output and give an example of an input transition that results in a glitch at the output. Show this example using LogicWorks. Question 5: Bonus The size of the multiplexer used to implement a truth table can be cut in half (e.g. 4 inputs instead of 8) if one of the variables is used as an input instead of being connected to a select line. For example, a truth table with inputs A, B, C, could be implemented using a 4-input multiplexer with A and B connected to the 2 select lines. A and B would then be able to select 0, 1, C or C (assuming that an inverter is available for C). Figure out how to re-implement Question 3 this way and prove that your solution is correct with a LogicWorks simulation.
FPF/October 5th, 2009
