bandgap voltage reference ic for hv automotive applications with
Journal of Circuits, Systems, and Computers Vol. 22, No. 1 (2013) 1250069 (17 pages) # .c World Scienti¯c Publishing Company DOI: 10.1142/S0218126612500697
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BANDGAP VOLTAGE REFERENCE IC FOR HV AUTOMOTIVE APPLICATIONS WITH PSEUDO-REGULATED BIAS AND SERVICE ¤ REGULATOR
SERGIO SAPONARA† and LUCA FANUCCI Department of Information Engineering, University of Pisa, via Caruso 16, I-56122 Pisa, Italy † [email protected] TOMMASO BALDETTI and ENRICO PARDI SensorDynamics AG (now Maxim IC), Navacchio, via, Giuntini 13, 56023 Navacchio (Pisa), Italy Received 24 November 2011 Accepted 14 June 2012 Published 14 January 2013 The paper presents a bandgap voltage reference (BGR) implemented in TSMC 0.25 m BCD technology for an automotive application. To withstand a car's battery large voltage variations, from 5 V to 40 V, the circuit features an embedded pseudo-regulator providing a stable bias current for the bandgap core. High-voltage (HV) MOS count has been kept low thus allowing the design of a compact BGR with an area of 0.118 mm2. The BGR has been designed to operate in automotive extended temperature range (40 C to 150 C) and it provides a stable voltage of 1.21 V, which is also used as reference for a cascade 3.7 V linear regulator. Measurements carried on fabricated IC samples prove the e®ectiveness of the BGR design in terms of supported input voltage variations and operating temperature range, temperature drift, line regulation and PSRR performance. Keywords: High-voltage (HV); bandgap voltage reference (BGR); integrated circuits (IC); automotive electronics.
1. Introduction Automotive electronics has become one of the fastest growing markets for the semiconductor industry. ABS, ESP, adaptive steering, intelligent headlights, active safety: there is hardly a function in today's automobile that does not rely on *This paper was recommended † Corresponding author.
by Regional Editor Piero Malcovati.
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electronic systems. Today, electrical and electronic components make up more than 20% of a car's value, on average.1 Thanks to the advance in high-voltage (HV) smart power electronics27,18,21 in cars a lot of mechanical systems have been replaced with electronic ones. The root cause of this exponential growth has to be found in technologies, like the Bipolar-CMOS-DMOS (BCD), which permit to satisfy the increasing demand for System-On-Chip (SoC) devices that integrate both power/HV electronics and analog/digital signal processing circuitry. Engineers are challenged by a multitude of stringent requirements since automotive grade circuits must feature robustness to all conditions present in a harsh environment like a car.58 Firstly it is required the capability to work both with HV levels (up to 40 V) and low ones (few V), then these circuits must operate reliably over a large temperature range, while located in a complex vibrational and electromagnetic environment. Particularly, bandgap voltage references (BGR) are essential blocks in many applications. Their role is to provide a temperature and supply independent voltage over temperature and supply variations for many blocks such as data converters, power management, and sensor conditioning circuits. This paper presents a voltage reference, based on the bandgap principle, embedded in an automotive ASIC for the control of a DC motor actuating an exhaust gas recirculation (EGR) valve. The chip, that combines four DMOS power transistors in a H-bridge con¯guration and the analog/digital circuitry for the driving, is placed in a harsh environment, i.e., near the exhaust manifold of the engine. Moreover, the BGR shall generate precise voltage references directly starting from the unregulated battery supply considering a variation range of one order of magnitude, from roughly 5 V to 40 V, being 12 V the nominal battery value for cars and 24 V for trucks.9 Di®erently from state-of-art BGR ICs,1016,19,20 limited to 25 V, the proposed design can work with supply voltage levels up to 40 V, in extended temperature range and achieving optimal performance in terms of power supply rejection ratio (PSRR), line regulation, temperature drift, compact size. The target of this work is thus designing a macrocell, integrable in an automotive SoC with analog and digital IPs,22 able to sustain wide voltage supply range and producing two stable voltages, a 1.21 V bandgap and a 3.7 V regulated one. Such voltages can be used directly in those blocks needing a voltage reference but where a TC of 100150 ppm/ C and a PSRR of 60 dB are enough. The 3.7 V regulated voltage can be also used as supply rail for high-precision low-voltage bandgap producing references with better TC and PSRR values, but working with a lower input variation range and with a lower supply voltage. As typical in automotive ICs, technology nodes below 180 nm are not used while CMOS SOI and BCD technologies are exploited to face harsh environments. A 3.3 V bandgap reference in BCD technology, withstanding a 1040 V range, is proposed in Ref. 9 but the circuit, limited in the range from 40 C to 80 C, does not meet automotive requirements and is only simulated. Another bandgap reference in BCD technology, operating up to 40 V, is described in Ref. 19 but there are no experimental results. 1250069-2
BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
The paper is organized as follows: Section 2 describes the principle of operation and the circuit architecture. Section 3 shows the layout realization in 0.25 m BCD technology and the characterization and performance analysis of the new BGR IC. In Sec. 4 measurement results are gathered and shown. Section 5 draws some conclusions.
2. HV BGR Circuit and Service Regulator
A temperature independent voltage reference can be obtained by adding a voltage that increases with temperature, i.e., has proportional-to-absolute temperature (PTAT) dependence, to a voltage that decreases linearly with temperature, i.e., has complementary-to-absolute temperature (CTAT) dependence, as shown in Fig. 1. The diode voltage drop across the base-emitter junction (VBE ) of a bipolar transistor acts as CTAT voltage while a PTAT source is obtained from the di®erence of VBE of two diode connected BJT equally polarized. There will be a temperature value for which the temperature dependence of the output voltage is negligible. Based on such principle several ICs have been proposed in the literature, whose performances are used as reference comparison for our design in Sec. 4 (see Table 3). 2.2. Pseudo-regulator circuit To increase performance in terms of PSRR and noise immunity, and to directly face HV external levels, a circuit for pre-regulation of bias current has been embedded in the BGR IC. The implementation of the pre-regulator circuit is shown in Fig. 2 while Fig. 3 shows its integration within the whole HV BGR unit. The circuit can withstand large supply variations (5 V to 40 V) still keeping the pseudo-regulated output in a range that permits the correct operation of the BGR core. This is a distinguishing feature of the proposed BGR versus state-of-art BGR ICs.1016 Please note that all used MOS transistors are of enhanced type; when using HV MOS a di®erent symbol including a label \HV" has been used. Circuits sketched in Figs. 2 and 3 show a simpli¯ed version of the implemented architectures, to easily understand the principle
Voltage
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2.1. Basics of BGR design and state-of-art ICs
Negative TC
VBE
VT=KT/q
VBE µ -2mV/K VPTATµ VT
VBG b
Positive TC
Temperature
Fig. 1. Bandgap schematic and VBE and VPTAT behavior versus T .
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VBATT
HV
VBATT
HV
M13 HV
HV
M15
M13
M14
M12
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HV
M14
R1
R1
M3
M15 HV
HV
M12
HV
M7
M3
M2
M6
M2
M1
R3
M1
HV
HV
agnd
M7
HV
HV
M6
agnd
(a)
(b)
Fig. 2. Proposed topology (a) and standard cascode mirror one (b).
of operation. Thanks to the circuit topology in Fig. 2(a), with resistors instead of nmos in the lower right branches of the mirror, it is possible to obtain a quite constant current in M13 M12 M7M6R3 branch when VBATT varies between 5 V and 40 V. We assume that all transistors in the circuit of Fig. 2 operate in saturation.
VBATT
HV
HV
M13 HV
M12
M15
M16
HV
HV
M17
HV
M24
HV
M31
M14
M18
HV
HV
M19
HV
M26
HV
M32
M20
HV
HV
HV
R1
VBG M21 ibias M3
HV
HV
M7 M22
M23 M34
M2
M6
M1
R3
I
I
Q1
HV
HV
M38
R5
R4 I
Q2
Q3
M35
M39
agnd
Pseudo-regulator
Bandgap core
Bias current for voltage regulator
Fig. 3. Complete schematic of HV bandgap reference, the 1.21 V VBG output and the ibias current are used as reference for the service regulator.
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25 modified
I (µA)
20
standard
15 10 5
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0
5
10
15
20 25 VBATT (V)
30
35
40
Fig. 4. Performance comparison between topologies of Figs. 2(a) and 2(b). The plots show the behavior of current I versus battery voltage sweep (color online).
Referring to Fig. 2(b), whereas current I can be written as: I ¼ current I of Fig. 2(a) is set by the relationship I ¼
VGS R3 ,
VBATT 3VGS , R1
where VGS is the gate-source
voltage of M1 . In the case B the current is highly dependent on VBATT voltage (see Fig. 4, \standard" curve). In the proposed case A (\modi¯ed" curve in Fig. 4) the current does not depend directly on VBATT . The current does not depend on VBATT directly means that VBATT term does not appear directly in the equation of the current. It appears indirectly because VGS3 depends on the operating point that is in°uenced by VBATT . Nevertheless with the proposed architecture the dependence from VBATT is tremendously reduced. In Fig. 4 the \standard" topology has a current variation of tens of A while in the \modi¯ed" topology the variation of the current value is reduced by one order of magnitude. The current is more constant thanks to the quadratic relationship existing between the drain current and the gate-source voltage of M1 : ID / (VGS V t)2. It means that if the ID of M1 changes (by variation of VBATT ), its VGS follows a square-root law. To validate the e®ectiveness of this solution electrical simulations where performed. A VBG result comparison between the proposed schematic (Fig. 2(a)) and the circuit of Fig. 2(b), when integrated in the whole HV BGR circuit, is shown in Fig. 5. Thanks to the proposed pseudo-regulator the VBG is more stable when VBATT changes and, as will be demonstrated in Sec. 3.2 (see Fig. 11), also when temperature changes. The pseudo-regulator works both in normal operation mode and also during start-up phase contributing in turning on the bandgap circuitry. 2.3. Bandgap reference circuit Figure 3 shows the schematic of the whole HV bandgap core. The bandgap core in Fig. 3 is composed by a PTAT and a CTAT current generators; the PTAT block is constituted by the two branches with diode connected bipolar transistors Q1 and Q2 . 1250069-5
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modified standard
VBG (V)
1.30 1.25 1.20 1.15
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5
10
15
20 25 VBATT (V)
30
35
40
Fig. 5. Performance comparison between topologies of Figs. 2(a) and 2(b). The plots show the behavior of VBG versus battery voltage sweep (color online).
The loop made by transistors from M16 to M23 forces the bias points of the BJTs so that the current in the two branches is equal. Then the current is mirrored to another resistor-BJT branch, thus obtaining a bandgap voltage, as it will be shown in Eq. (3). With reference to Fig. 3 the equation for the loop constituted by Q1 Q2 M22 M23 R4 is as follows, with Vs23 ¼ Vs22 (the source voltages can be considered equal, having M22 and M23 the same current imposed by the M16 M17 M18 M19 cascode mirror, the same W, L sizing and the same gate node), VS22 R4 I VEB1 ¼ VS23 VEB2 :
ð1Þ
Then the expression for the current is: I¼
VEB2 VEB1 VEB ¼ : R4 R4
ð2Þ
From well known results in literature,17 if the two bipolars operate at di®erent current densities then the di®erence between emitter-base voltages is PTAT. The currents °owing in the ¯rst branch is mirrored with a ratio n (5:1 in our case), and steered to the branch made up by R5 and Q3 . The output bandgap voltage is: VBG ¼ VEB3 þ n I R5 ¼ VEB3 þ n
R5 VEB : R4
ð3Þ
Thus the output reference voltage is constituted by a TC < 0 component (VEB3 ) and a TC > 0 one (VEB ). 2.4. Startup phase Bandgap circuits can have more than one stable operating point. To ensure the bandgap settles on the correct operating point a startup circuit is needed. The same transistors (M1 to M14 ) that provide a stable bias to the BGR core during normal operation mode work also during the startup phase. At power-up when VBATT rises, thanks to the pseudo-regulator circuit, a current starts °owing in the BGR core 1250069-6
BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
settling it in the right operating point. The startup phase and the BGR operating point have been checked over all process voltage temperature (PVT) corners, verifying a correct startup sequence in all cases.
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2.5. Service regulator A linear regulator (whose block diagram is sketched in Fig. 6 and whose schematic is sketched in Fig. 7 is also integrated on-chip. It provides a stable internal supply voltage Vout reg centered on about 3.7 V, required by the automotive DC motor control ASIC. This regulator, as well as for the HV bandgap in Fig. 3, can work with battery voltages ranging from 5 V up to 40 V. The integrated service regulator in Fig. 7 features pmos pass transistors, output voltage sensing through the R5 R6
VBATT
VBG Pass transistor
VOUT
Fig. 6. Block schematic of the integrated service regulator.
VBATT HV
HV
M21
M23 HV
M13
HV
M15
M14
HV
M22 M12
M24
HV
HV
M17
HV
HV
M19 HV
M25
HV
M26
M18
HV
HV
sense ibias
M16
HV
HV
M20
PMOS pass transistor
VOUT_REG M27 M28
Vbg R5 R6
M3
HV
HV
M2
M5
M4
Bias
HV
HV
M7
M9
M8
M6
Error amplifier Fig. 7. Service regulator schematic.
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M11
M10
Sense
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partition and negative control feedback with an error ampli¯er using the output VBG of Fig. 3 as reference. The operational ampli¯er design is based on folded cascade topology. In Fig. 6 the block schematic of the service regulator is sketched. The value of the regulated output voltage is set according to Eq. (4) by closing the feedback loop with a partition of the VOUT (Vout reg in Fig. 7; the resistive divider made by R5 and R6 has been designed and layouted to minimize mismatch errors (e.g., using dummy structures, common centroid layout). In order to achieve wide supply operating range we used high compliance current mirror structures (from M12 to M20) to allow the regulator work with low supply voltages. For what concerns the PMOS pass transistors in Fig. 7, the majority of voltage drop is across M26 (at bias it operates in saturation with a VSD of roughly 8 V in typical conditions of VBATT 12 V and Vout reg of about 3.7 V). Since the current provided by the linear regulator to its load is low, about 0.3 mA, there are no power dissipation issues. The stability of the feedback loop has been checked on all PVT corners. Gain margin values range from 10 dB to 15 dB while phase margin ranges in the 8090 range. Open loop gain is 78 dB in typical conditions. R5 Vout ¼ Vout reg ¼ VBG 1 þ : ð4Þ R6
3. BGR Post-Layout Simulations in BCD Technology 3.1. Layout design The proposed BGR was simulated with SPECTRE TM simulator in CADENCE TM environment using BSIM3v3 device models. DC and transient simulations have been performed to check the correct bias of all devices, the correct value of the output voltage and power consumption. During layout design in the TSMC 0.25 m BCD technology we used common centroid layout and dummy structures. The complete voltage reference circuit (Figs. 3 and 6) measures only 263 m 448 m for a total area of about 0.118 mm2. 3.2. Electrical simulations (post-layout) As result of characterization in the 0.25 m BCD technology the proposed BGR gives a HV VBG and a Vout reg output voltages of 1.21 V and 3.68 V respectively, in typical conditions (27 C, 12 V battery voltage). The BGR is rated for supply voltages from 5 V to 40 V. To validate the behavior of the circuits several DC sweep tests over PVT corners have been performed. A typical condition result is shown in Fig. 8. When the supply changes from 5 V to 40 V the variation of output voltage is less than 100 mV (from 3.65 V to 3.74 V) for Vout reg and less than 30 mV for VBG . The line regulation (LR), de¯ned as the variation of output divided the variation of input, is about 1250069-8
BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
vout_reg (V)
3.8
3.7
3.6
5
10
15
20 25 VBATT (V)
30
35
40
5
10
15
20 25 VBATT (V)
30
35
40
1.26 1.24 VBG (V)
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3.5
1.22 1.20 1.18 1.16
Fig. 8.
Variation of VBG and Vout
reg
versus VBATT (color online).
2.5 mV/V (0.25%) for Vout reg and 0.8 mV/V (0.08%) for VBG . Thanks to the use of the integrated pseudo regulator the variation when the supply changes from 5 V to 40 V is limited. The temperature drift of VBG and Vout reg over the full temperature range has been evaluated by means of temperature sweep simulations keeping VBATT at its nominal 12 V value. The results of this analysis are plotted in Fig. 9. The startup time has been evaluated over all PVT corners, verifying the correct sequence in each case. The resulting values are within a hundred of microseconds (worst case). A 300 run process and mismatch Monte Carlo analysis has been carried to evaluate some circuit parameters. As example, from this simulation we estimated the statistical distribution of VBG which has, at room temperature and nominal supply voltage (12 V), a standard deviation () of about 16 mV and a mean value () of about 1.21 V. A process and mismatch Monte Carlo analysis at nominal supply voltage (12 V) has been also carried out to evaluate the temperature coe±cient (TC) which has a standard deviation of 22 ppm/ C and a mean value of 108 ppm/ C. Process variation of all resistors in the design (including R1 and R3) has been taken into account through corner simulations, see Fig. 10 showing the behavior of VBG voltage vs. temperature in the three cases \typical", \best" (fast corner), \worst" (slow corner). Corner variations on resistors cause a shift of the VBG versus T curve of few %.
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1.010
1.010 VBG/VBG_typ
VBG/VBG_typ
vout_reg/vout_reg_typ
1.000
1.000
0.995
0.995
0.990
0.990
0.985
0.985 0.980
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1.005
Fig. 9. Behavior of VBG and Vout values (color online).)
vout_reg/vout_reg_typ
1.005
reg
0
20 40 60 80 100 120 140 T (°C)
versus temperature sweep. (Data are normalized to their room T
Furthermore, the following Fig. 11 shows the behavior of normalized VBG versus T (typical corner) for the whole range 40 C to 150 C in two cases: on the top ¯gure the dashed red curve refers to a circuit con¯guration without the pseudo-regulator of Fig. 3 during the BGR operating mode (w/o pseudo reg); on the bottom ¯gure the continuous blue curve refers to a circuit con¯guration with the pseudo-regulator of Fig. 3 working in normal operation mode (w/o pseudo reg). By comparing the two curves is clear that the variation of VBG versus T , and hence the temperature coef¯cient, is lower when the pseudo-regulator is kept on in operating mode while is higher in the case the pseudo-regulator is deactivated. The improvement over the whole temperature range is about 25%. A similar comparative analysis has been done
Fig. 10. Behavior of VBG versus temperature sweep considering process corner variations of all resistors (color online).
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BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
considering, at typical temperature, the e®ect on VBG of the variation of the battery supply from 5 V to 40 V. In such case we have not registered a remarkable di®erence (as in the case of VBG versus T ) deactivating the pseudo-regulator during operating mode versus the already cited 0.8 mV/V obtained when the pseudo-regulator is kept on. Taking also into account the considerations done in Sec. 2.4, we can say that: (i) the pseudo-regulator during operation mode helps slightly improving the BGR performance (improvement of the VBG behavior versus T , see Fig. 11, while for the line regulation there are not remarkable changes); (ii) the current injected by the pseudo-regulator (300 nA) is small in comparison to the current °owing in the bandgap branch (25 A), a ratio of about 83 so as to not increasing noticeably the power consumption; (iii) avoiding to turn o® the pseudo regulator when the system has already settled also avoids the risk that a malfunction of the circuitry deputed to shut down, in some corner cases, can set the bandgap core on another bad operating point. Therefore the pseudo-regulator circuit is kept on during both BGR start-up phase and normal operating mode. To achieve a high-performance voltage reference it is mandatory to pay attention to some important parameters such as the PSRR, beside the already cited line
Fig. 11. Behavior of VBG versus temperature sweep with (bottom blue curve, w/o) or without (top red curve, w/o) the pseudo-regulator of Fig. 3 during BGR operating mode (data are normalized to their room T values) (color online).
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-10
VBG (dB)
-20
worst typ best
-30 -40 -50 -60 100
101 102 103 104 Frequency (Hz)
105
10
6
105
10
6
-10 -20 vout_reg (dB)
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-70 10-1
worst typ best
-30 -40 -50 -60 -70 10-1
100
101 102 103 104 Frequency (Hz)
Fig. 12. PSRR related to VBG (top) and to Vout
reg
(bottom) (color online).
regulation (LR), and temperature coe±cient. By means of AC analysis over all PVT corners we evaluated the PSRR value in the min-typ-max conditions. As can be seen in Fig. 12 the PSRR of the proposed BGR is higher than 60 dB at 100 Hz in the typical corner. Figure 13 shows instead the power supply rejection ratio related to disturbs injected through the substrate (negative-power supply rejection ratio, NSRR). 4. Experimental Results The designed BGR was fabricated in a 0.25 m BCD technology. Careful layout has been implemented to minimize devices' mismatch. Figure 14 shows the die photo of the BGR circuit with bonding pads. The size of the prototype BGR is 448 m 263 m (0.118 mm2). The package used for this ASIC is a QFN with exposed die pad (where the bottom die pad is exposed outside the mold compound, to improve package thermal performance). The measurement of VBG and Vout reg voltages at room temperature for about 150 samples has been carried out. We measured a standard deviation () of 1250069-12
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worst typ best
VBG (dB)
-30 -40 -50 -60 -70 -80 -90 100
-20
101 102 103 104 Frequency (Hz)
105
106
105
10
worst typ best
-30
vout_reg (dB)
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10-1
-40 -50 -60 -70 -80 -90 10-1
100
101 102 103 104 Frequency (Hz)
Fig. 13. NSRR related to VBG (top) and to Vout
reg
6
(bottom) (color online).
Fig. 14. Microphotograph of the fabricated ASIC, BGR highlighted (color online).
about 22 mV around a mean value () of about 1.21 V for VBG ; ¼ 3:68 V and ¼ 67 mV for Vout reg . temperature chamber sweep tests (from 40 C to 150 C) on several samples (see Fig. 15) show a behavior in-line with simulation results in Fig. 9 and with the statistical Monte Carlo analysis in Sec. 3: the maximum variation
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VBG (V)
1.24 1.23 1.22 1.21 1.2
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1.19 1.18 -40
VBG@COLD - VBG@HOT 18.6mV (1.51%) 20.5mV (1.63%) 20.4mV (1.65%) 28.7mV (2.30%) 27.3mV (2.25%) -20
0
20
40
60
80
100
120
140
Temperature (°C)
Fig. 15. Measurement of VBG value versus T , ¯ve di®erent IC samples (color online).
Table 1. Measured temperature coe±cient (TC) for ¯ve IC samples at two di®erent supply voltages. Sample
Temperature coe±cient (ppm/ C)
#1
#2
#3
#4
#5
VBATT ¼ 12 V VBATT ¼ 4:5 V
79.3 99
85.6 104
86.9 101
120.9 140
118.6 132
Note: Please note that lower supply voltage is 4.5 V, less than minimum value from IC speci¯cations.
between VBG measured at hot (150 C) and cold (40 C) is less than 2.5% of room temperature value. Temperature coe±cient has been also measured (Table 1). Table 2 reports the main experimental measured electrical characteristics of the proposed HV BGR: operating external supply voltage, bandgap output voltage, temperature drift and power supply drift, PSRR, and total current consumption. Table 2. Main parameters of the BGR and service regulator. Value Parameter
Min
Typ
Max
Unit
Supply voltage VBG Vout reg VBG temperature drift VBG power supply drift Vout reg power supply drift VBG PSRR@100 Hz BGR current consumption
4.5 — — — — — — —
12 1.21 3.68 121* 0.8 2.48 61 233
40 — — — — — — —
V V V ppm/ C mV/V mV/V dB A
Note: *From Table 1 for typical VBATT of 12 V.
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Table 3.
Our Ref. Ref. Ref. Ref. Ref. Ref. Ref. Ref.
10 11 12 13 14 15 16 20
Analysis of state of the art BGR ICs.
VBG (V)
TC (ppm/ C)
Supply (V)
Temp. ( C)
PSRR (dB)
Area (mm 2 )
Tech.
1.21 2.5 1.24 1.265 0 2.1 1.22 1.09 1.23 1.26
121 16.4 20 35 100 80 3 47 13.7
540 618 4.55.5 4.55.5 33.6 1225 1.53.3 N/A 2.75
40150 1585 20140 40260 40120 0100 20100 7575 40150
61 103 59 N/A 80 N/A 80 N/A 98
0.118 N/A 0.09 0.3 N/A N/A 0.81 0.14 0.034
BCD 0.25 m BCD 1.5 m CMOS 0.5 m BCD CMOS 0.35 m SOI 0.35 m CMOS 0.35 m CMOS 0.35 m BCD 0.5 m
Comparing the performance of the proposed BGR (experimental measurements) versus the state of the art in Table 3 these considerations can be done: (i) the proposed circuit sustains HV supply, up to 40 V, and with large variations, roughly a factor 10 from 5 V to 40 V, while most other ICs are limited to 25 V and to a factor 23 of variation; (ii) measured PSRR at 100 Hz (ASIC typical operating range) is comparable to reported state-of-the-art BGR ICs; (iii) the area is minimized since HV MOS count has been kept low. As far as line regulation is concerned, for the reference works in Table 3 that are operating in a lower voltage range1113,15,16,20 sustain variations in a range of few Volts a direct comparison with our design, operating over a range of 35 V from 5 V up to 40 V, is not fair. For Ref. 14 which supports power supply variation in the range 12 V to 25 V there is a variation of the bandgap voltage of 1% of 1.22 V over 13 V that is 0.938 mV/V. For Ref. 10 which supports power supply variation in the range 6 V to 18 V there is a variation of the bandgap voltage of 0.32 mV versus the nominal 2.5 V over 12 V that is roughly 0.03 mV/V. The proposed design has a regulation factor of 0.8 mV/V (better than Ref. 14 but worse than Ref. 10) over a variation range of 35 V (from 5 V to 40 V) which is 3 times larger than the variation range supported in Refs. 10 and 14. From measured results in Fig. 15 our design has a slight CTAT behavior in the range 40 C to 150 C. However the achieved performances of a TC in the range 100150 ppm/ C over a wide temperature range of roughly 200 C, and the sustained wide input voltage variation (from 4.5 V to 40 V, not available in the state of art) meet the required project speci¯cations. The macrocell has been integrated in a real automotive SoC.
5. Conclusions A BGR architecture for an automotive application, capable to withstand HV and wide supply variations in harsh scenarios, has been designed and characterized in TSMC BCD 0.25 m technology by means of both post-layout simulations and measurements on fabricated IC samples. A service regulator that uses the 1.21 V VBG 1250069-15
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as reference is integrated on-chip to provide a further 3.7 V stable internal supply voltage. HV MOS count has been kept low allowing the design of a compact BGR, 0.118 mm2 area. As highlighted in the introduction, the target of this work is the design of a macrocell, for an automotive SoC, able to work on a wide supply range and producing two stable voltages, a 1.21 V bandgap and a 3.7 V regulated one. Such voltages can be used directly in those blocks needing a voltage reference where a TC of 100150 ppm/ C and a PSRR of 60 dB are enough. The 3.7 V output can be used as supply rail for high-precision low-voltage bandgap producing references with better TC and PSRR values but working with a lower input variation range and with a lower supply voltage. The proposed BGR operates correctly with supply variations from 5 V to 40 V, while most state-of-art BGR ICs are limited to 25 V and to a factor 23 of variation. Measurements carried on fabricated IC samples prove also the e®ectiveness of the BGR design in terms of temperature drift, line regulation and PSRR. The supported temperature range on which experimental measures have been done is from 40 C to 150 C.
References 1. Oliver Wyman Group, Electronics are Driving the Development of the Automobile Industry, www.oliverwyman.com, 2006 2. D. Riccardi et al., BCD8 from 7 V to 70 V: A new 0.18 m technology platform to address the evolution of applications towards smart power ICs with high logic contents, IEEE ISPSD (2007), pp. 7376. 3. C. Contiero et al., Progress in power ICs and MEMS, analog technologies to interface the real world, IEEE ISPSD'04, pp. 312. 4. R. M. Forsyth, Technology and design of integrated circuits for up to 50 V applications, IEEE ICIT (2003), pp. 713. 5. S. Prosser et al., Advanced automotive electronic systems: Packaging & environmental challenges, IEEE ESTC (2006). 6. N. Costantino et al., Design and test of an HV-CMOS intelligent power switch with integrated protections and self-diagnostic for harsh automotive applications, IEEE Trans. Ind. Electron. 58 (2011) 27152727. 7. F. Baronti et al., Design and veri¯cation of hardware building blocks for high-speed and fault-tolerant in-vehicle networks, IEEE Trans. Ind. Electron. 58 (2011) 792801. 8. R. W. Johnson et al., The changing automotive environment: High-temperature electronics, IEEE Trans. Electron. Packag. Manuf. 27 (2004) 164176. 9. H. Yueli et al., Voltage regulator architecture used in automotive electronics, IEEE Int. Conf. Measuring Tech. and Mech. Automation (2011), pp. 11351138. 10. G. Shurong et al., A high precision bandgap reference used in power management ICs, Eng. Lett. 14 (2007) 14. 11. A. Tajalli et al., An area and power optimization technique for CMOS bandgap voltage references, Analog Integr. Circuits Signal Process. (2010) 131140. 12. W. Horn et al., A robust smart power bandgap reference circuit for use in an automotive environment, IEEE J. Solid-State Circuits 37 (2002) 949952. 13. F. G. R. Ramos et al., A programmable voltage reference optimized for power management applications, SBCCI'07, pp. 3641.
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BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
14. V. Sukumar et al., High voltage bandgap reference design using SO1 technology, IEEE Microelectr. Symp. (2003), pp. 120123. 15. X. Guan, X. Wang, A. Wang and B. Zhao, A 3 V 110 W 3.1 ppm/ C curvaturecompensated CMOS bandgap reference, Analog Integr. Circuits Signal Process. 62 (2010) 113119. 16. J. P. Martinez Brito, S. Bampi and H. Klimach, A 4-bits trimmed CMOS bandgap reference with an improved matching modeling design, IEEE ISCAS (2007), pp. 19111914. 17. B. Razavi, Design of Analog CMOS Integrated Circuits, Chapter 11 (McGraw-Hill, New York, USA, 2000). 18. S. Saponara et al., A °exible LED-driver for automotive lighting applications: IC design and experimental characterization, IEEE Trans. Power Electron. 27 (2012) 10711075. 19. W. Huang, X. Yang and C. Ling, A bandgap voltage reference design for high power supply, IEEE Int. Conf. Anti-Counterfeiting, Security and Identi¯cation ASID, June 2011, pp. 184187. 20. Y. Yintang et al., A high precision high PSRR bandgap reference with thermal hysteresis protection, IOP J. Semiconductors 31 (2010) 095010-1095019-10. 21. S. Saponara et al., Design of an integrated scanning micromirror driver in BCD technology, J. Circuits, Syst. Comput. 20 (2011) 781799. 22. L. Fanucci et al., Power pptimization of an 8051-compliant IP microcontroller, IEICE Trans. Electron. 88-C (2005) 597600.
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BANDGAP VOLTAGE REFERENCE IC FOR HV AUTOMOTIVE APPLICATIONS WITH PSEUDO-REGULATED BIAS AND SERVICE ¤ REGULATOR
SERGIO SAPONARA† and LUCA FANUCCI Department of Information Engineering, University of Pisa, via Caruso 16, I-56122 Pisa, Italy † [email protected] TOMMASO BALDETTI and ENRICO PARDI SensorDynamics AG (now Maxim IC), Navacchio, via, Giuntini 13, 56023 Navacchio (Pisa), Italy Received 24 November 2011 Accepted 14 June 2012 Published 14 January 2013 The paper presents a bandgap voltage reference (BGR) implemented in TSMC 0.25 m BCD technology for an automotive application. To withstand a car's battery large voltage variations, from 5 V to 40 V, the circuit features an embedded pseudo-regulator providing a stable bias current for the bandgap core. High-voltage (HV) MOS count has been kept low thus allowing the design of a compact BGR with an area of 0.118 mm2. The BGR has been designed to operate in automotive extended temperature range (40 C to 150 C) and it provides a stable voltage of 1.21 V, which is also used as reference for a cascade 3.7 V linear regulator. Measurements carried on fabricated IC samples prove the e®ectiveness of the BGR design in terms of supported input voltage variations and operating temperature range, temperature drift, line regulation and PSRR performance. Keywords: High-voltage (HV); bandgap voltage reference (BGR); integrated circuits (IC); automotive electronics.
1. Introduction Automotive electronics has become one of the fastest growing markets for the semiconductor industry. ABS, ESP, adaptive steering, intelligent headlights, active safety: there is hardly a function in today's automobile that does not rely on *This paper was recommended † Corresponding author.
by Regional Editor Piero Malcovati.
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electronic systems. Today, electrical and electronic components make up more than 20% of a car's value, on average.1 Thanks to the advance in high-voltage (HV) smart power electronics27,18,21 in cars a lot of mechanical systems have been replaced with electronic ones. The root cause of this exponential growth has to be found in technologies, like the Bipolar-CMOS-DMOS (BCD), which permit to satisfy the increasing demand for System-On-Chip (SoC) devices that integrate both power/HV electronics and analog/digital signal processing circuitry. Engineers are challenged by a multitude of stringent requirements since automotive grade circuits must feature robustness to all conditions present in a harsh environment like a car.58 Firstly it is required the capability to work both with HV levels (up to 40 V) and low ones (few V), then these circuits must operate reliably over a large temperature range, while located in a complex vibrational and electromagnetic environment. Particularly, bandgap voltage references (BGR) are essential blocks in many applications. Their role is to provide a temperature and supply independent voltage over temperature and supply variations for many blocks such as data converters, power management, and sensor conditioning circuits. This paper presents a voltage reference, based on the bandgap principle, embedded in an automotive ASIC for the control of a DC motor actuating an exhaust gas recirculation (EGR) valve. The chip, that combines four DMOS power transistors in a H-bridge con¯guration and the analog/digital circuitry for the driving, is placed in a harsh environment, i.e., near the exhaust manifold of the engine. Moreover, the BGR shall generate precise voltage references directly starting from the unregulated battery supply considering a variation range of one order of magnitude, from roughly 5 V to 40 V, being 12 V the nominal battery value for cars and 24 V for trucks.9 Di®erently from state-of-art BGR ICs,1016,19,20 limited to 25 V, the proposed design can work with supply voltage levels up to 40 V, in extended temperature range and achieving optimal performance in terms of power supply rejection ratio (PSRR), line regulation, temperature drift, compact size. The target of this work is thus designing a macrocell, integrable in an automotive SoC with analog and digital IPs,22 able to sustain wide voltage supply range and producing two stable voltages, a 1.21 V bandgap and a 3.7 V regulated one. Such voltages can be used directly in those blocks needing a voltage reference but where a TC of 100150 ppm/ C and a PSRR of 60 dB are enough. The 3.7 V regulated voltage can be also used as supply rail for high-precision low-voltage bandgap producing references with better TC and PSRR values, but working with a lower input variation range and with a lower supply voltage. As typical in automotive ICs, technology nodes below 180 nm are not used while CMOS SOI and BCD technologies are exploited to face harsh environments. A 3.3 V bandgap reference in BCD technology, withstanding a 1040 V range, is proposed in Ref. 9 but the circuit, limited in the range from 40 C to 80 C, does not meet automotive requirements and is only simulated. Another bandgap reference in BCD technology, operating up to 40 V, is described in Ref. 19 but there are no experimental results. 1250069-2
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The paper is organized as follows: Section 2 describes the principle of operation and the circuit architecture. Section 3 shows the layout realization in 0.25 m BCD technology and the characterization and performance analysis of the new BGR IC. In Sec. 4 measurement results are gathered and shown. Section 5 draws some conclusions.
2. HV BGR Circuit and Service Regulator
A temperature independent voltage reference can be obtained by adding a voltage that increases with temperature, i.e., has proportional-to-absolute temperature (PTAT) dependence, to a voltage that decreases linearly with temperature, i.e., has complementary-to-absolute temperature (CTAT) dependence, as shown in Fig. 1. The diode voltage drop across the base-emitter junction (VBE ) of a bipolar transistor acts as CTAT voltage while a PTAT source is obtained from the di®erence of VBE of two diode connected BJT equally polarized. There will be a temperature value for which the temperature dependence of the output voltage is negligible. Based on such principle several ICs have been proposed in the literature, whose performances are used as reference comparison for our design in Sec. 4 (see Table 3). 2.2. Pseudo-regulator circuit To increase performance in terms of PSRR and noise immunity, and to directly face HV external levels, a circuit for pre-regulation of bias current has been embedded in the BGR IC. The implementation of the pre-regulator circuit is shown in Fig. 2 while Fig. 3 shows its integration within the whole HV BGR unit. The circuit can withstand large supply variations (5 V to 40 V) still keeping the pseudo-regulated output in a range that permits the correct operation of the BGR core. This is a distinguishing feature of the proposed BGR versus state-of-art BGR ICs.1016 Please note that all used MOS transistors are of enhanced type; when using HV MOS a di®erent symbol including a label \HV" has been used. Circuits sketched in Figs. 2 and 3 show a simpli¯ed version of the implemented architectures, to easily understand the principle
Voltage
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2.1. Basics of BGR design and state-of-art ICs
Negative TC
VBE
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of operation. Thanks to the circuit topology in Fig. 2(a), with resistors instead of nmos in the lower right branches of the mirror, it is possible to obtain a quite constant current in M13 M12 M7M6R3 branch when VBATT varies between 5 V and 40 V. We assume that all transistors in the circuit of Fig. 2 operate in saturation.
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Fig. 3. Complete schematic of HV bandgap reference, the 1.21 V VBG output and the ibias current are used as reference for the service regulator.
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Fig. 4. Performance comparison between topologies of Figs. 2(a) and 2(b). The plots show the behavior of current I versus battery voltage sweep (color online).
Referring to Fig. 2(b), whereas current I can be written as: I ¼ current I of Fig. 2(a) is set by the relationship I ¼
VGS R3 ,
VBATT 3VGS , R1
where VGS is the gate-source
voltage of M1 . In the case B the current is highly dependent on VBATT voltage (see Fig. 4, \standard" curve). In the proposed case A (\modi¯ed" curve in Fig. 4) the current does not depend directly on VBATT . The current does not depend on VBATT directly means that VBATT term does not appear directly in the equation of the current. It appears indirectly because VGS3 depends on the operating point that is in°uenced by VBATT . Nevertheless with the proposed architecture the dependence from VBATT is tremendously reduced. In Fig. 4 the \standard" topology has a current variation of tens of A while in the \modi¯ed" topology the variation of the current value is reduced by one order of magnitude. The current is more constant thanks to the quadratic relationship existing between the drain current and the gate-source voltage of M1 : ID / (VGS V t)2. It means that if the ID of M1 changes (by variation of VBATT ), its VGS follows a square-root law. To validate the e®ectiveness of this solution electrical simulations where performed. A VBG result comparison between the proposed schematic (Fig. 2(a)) and the circuit of Fig. 2(b), when integrated in the whole HV BGR circuit, is shown in Fig. 5. Thanks to the proposed pseudo-regulator the VBG is more stable when VBATT changes and, as will be demonstrated in Sec. 3.2 (see Fig. 11), also when temperature changes. The pseudo-regulator works both in normal operation mode and also during start-up phase contributing in turning on the bandgap circuitry. 2.3. Bandgap reference circuit Figure 3 shows the schematic of the whole HV bandgap core. The bandgap core in Fig. 3 is composed by a PTAT and a CTAT current generators; the PTAT block is constituted by the two branches with diode connected bipolar transistors Q1 and Q2 . 1250069-5
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Fig. 5. Performance comparison between topologies of Figs. 2(a) and 2(b). The plots show the behavior of VBG versus battery voltage sweep (color online).
The loop made by transistors from M16 to M23 forces the bias points of the BJTs so that the current in the two branches is equal. Then the current is mirrored to another resistor-BJT branch, thus obtaining a bandgap voltage, as it will be shown in Eq. (3). With reference to Fig. 3 the equation for the loop constituted by Q1 Q2 M22 M23 R4 is as follows, with Vs23 ¼ Vs22 (the source voltages can be considered equal, having M22 and M23 the same current imposed by the M16 M17 M18 M19 cascode mirror, the same W, L sizing and the same gate node), VS22 R4 I VEB1 ¼ VS23 VEB2 :
ð1Þ
Then the expression for the current is: I¼
VEB2 VEB1 VEB ¼ : R4 R4
ð2Þ
From well known results in literature,17 if the two bipolars operate at di®erent current densities then the di®erence between emitter-base voltages is PTAT. The currents °owing in the ¯rst branch is mirrored with a ratio n (5:1 in our case), and steered to the branch made up by R5 and Q3 . The output bandgap voltage is: VBG ¼ VEB3 þ n I R5 ¼ VEB3 þ n
R5 VEB : R4
ð3Þ
Thus the output reference voltage is constituted by a TC < 0 component (VEB3 ) and a TC > 0 one (VEB ). 2.4. Startup phase Bandgap circuits can have more than one stable operating point. To ensure the bandgap settles on the correct operating point a startup circuit is needed. The same transistors (M1 to M14 ) that provide a stable bias to the BGR core during normal operation mode work also during the startup phase. At power-up when VBATT rises, thanks to the pseudo-regulator circuit, a current starts °owing in the BGR core 1250069-6
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settling it in the right operating point. The startup phase and the BGR operating point have been checked over all process voltage temperature (PVT) corners, verifying a correct startup sequence in all cases.
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2.5. Service regulator A linear regulator (whose block diagram is sketched in Fig. 6 and whose schematic is sketched in Fig. 7 is also integrated on-chip. It provides a stable internal supply voltage Vout reg centered on about 3.7 V, required by the automotive DC motor control ASIC. This regulator, as well as for the HV bandgap in Fig. 3, can work with battery voltages ranging from 5 V up to 40 V. The integrated service regulator in Fig. 7 features pmos pass transistors, output voltage sensing through the R5 R6
VBATT
VBG Pass transistor
VOUT
Fig. 6. Block schematic of the integrated service regulator.
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partition and negative control feedback with an error ampli¯er using the output VBG of Fig. 3 as reference. The operational ampli¯er design is based on folded cascade topology. In Fig. 6 the block schematic of the service regulator is sketched. The value of the regulated output voltage is set according to Eq. (4) by closing the feedback loop with a partition of the VOUT (Vout reg in Fig. 7; the resistive divider made by R5 and R6 has been designed and layouted to minimize mismatch errors (e.g., using dummy structures, common centroid layout). In order to achieve wide supply operating range we used high compliance current mirror structures (from M12 to M20) to allow the regulator work with low supply voltages. For what concerns the PMOS pass transistors in Fig. 7, the majority of voltage drop is across M26 (at bias it operates in saturation with a VSD of roughly 8 V in typical conditions of VBATT 12 V and Vout reg of about 3.7 V). Since the current provided by the linear regulator to its load is low, about 0.3 mA, there are no power dissipation issues. The stability of the feedback loop has been checked on all PVT corners. Gain margin values range from 10 dB to 15 dB while phase margin ranges in the 8090 range. Open loop gain is 78 dB in typical conditions. R5 Vout ¼ Vout reg ¼ VBG 1 þ : ð4Þ R6
3. BGR Post-Layout Simulations in BCD Technology 3.1. Layout design The proposed BGR was simulated with SPECTRE TM simulator in CADENCE TM environment using BSIM3v3 device models. DC and transient simulations have been performed to check the correct bias of all devices, the correct value of the output voltage and power consumption. During layout design in the TSMC 0.25 m BCD technology we used common centroid layout and dummy structures. The complete voltage reference circuit (Figs. 3 and 6) measures only 263 m 448 m for a total area of about 0.118 mm2. 3.2. Electrical simulations (post-layout) As result of characterization in the 0.25 m BCD technology the proposed BGR gives a HV VBG and a Vout reg output voltages of 1.21 V and 3.68 V respectively, in typical conditions (27 C, 12 V battery voltage). The BGR is rated for supply voltages from 5 V to 40 V. To validate the behavior of the circuits several DC sweep tests over PVT corners have been performed. A typical condition result is shown in Fig. 8. When the supply changes from 5 V to 40 V the variation of output voltage is less than 100 mV (from 3.65 V to 3.74 V) for Vout reg and less than 30 mV for VBG . The line regulation (LR), de¯ned as the variation of output divided the variation of input, is about 1250069-8
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Fig. 8.
Variation of VBG and Vout
reg
versus VBATT (color online).
2.5 mV/V (0.25%) for Vout reg and 0.8 mV/V (0.08%) for VBG . Thanks to the use of the integrated pseudo regulator the variation when the supply changes from 5 V to 40 V is limited. The temperature drift of VBG and Vout reg over the full temperature range has been evaluated by means of temperature sweep simulations keeping VBATT at its nominal 12 V value. The results of this analysis are plotted in Fig. 9. The startup time has been evaluated over all PVT corners, verifying the correct sequence in each case. The resulting values are within a hundred of microseconds (worst case). A 300 run process and mismatch Monte Carlo analysis has been carried to evaluate some circuit parameters. As example, from this simulation we estimated the statistical distribution of VBG which has, at room temperature and nominal supply voltage (12 V), a standard deviation () of about 16 mV and a mean value () of about 1.21 V. A process and mismatch Monte Carlo analysis at nominal supply voltage (12 V) has been also carried out to evaluate the temperature coe±cient (TC) which has a standard deviation of 22 ppm/ C and a mean value of 108 ppm/ C. Process variation of all resistors in the design (including R1 and R3) has been taken into account through corner simulations, see Fig. 10 showing the behavior of VBG voltage vs. temperature in the three cases \typical", \best" (fast corner), \worst" (slow corner). Corner variations on resistors cause a shift of the VBG versus T curve of few %.
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Fig. 9. Behavior of VBG and Vout values (color online).)
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Furthermore, the following Fig. 11 shows the behavior of normalized VBG versus T (typical corner) for the whole range 40 C to 150 C in two cases: on the top ¯gure the dashed red curve refers to a circuit con¯guration without the pseudo-regulator of Fig. 3 during the BGR operating mode (w/o pseudo reg); on the bottom ¯gure the continuous blue curve refers to a circuit con¯guration with the pseudo-regulator of Fig. 3 working in normal operation mode (w/o pseudo reg). By comparing the two curves is clear that the variation of VBG versus T , and hence the temperature coef¯cient, is lower when the pseudo-regulator is kept on in operating mode while is higher in the case the pseudo-regulator is deactivated. The improvement over the whole temperature range is about 25%. A similar comparative analysis has been done
Fig. 10. Behavior of VBG versus temperature sweep considering process corner variations of all resistors (color online).
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BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
considering, at typical temperature, the e®ect on VBG of the variation of the battery supply from 5 V to 40 V. In such case we have not registered a remarkable di®erence (as in the case of VBG versus T ) deactivating the pseudo-regulator during operating mode versus the already cited 0.8 mV/V obtained when the pseudo-regulator is kept on. Taking also into account the considerations done in Sec. 2.4, we can say that: (i) the pseudo-regulator during operation mode helps slightly improving the BGR performance (improvement of the VBG behavior versus T , see Fig. 11, while for the line regulation there are not remarkable changes); (ii) the current injected by the pseudo-regulator (300 nA) is small in comparison to the current °owing in the bandgap branch (25 A), a ratio of about 83 so as to not increasing noticeably the power consumption; (iii) avoiding to turn o® the pseudo regulator when the system has already settled also avoids the risk that a malfunction of the circuitry deputed to shut down, in some corner cases, can set the bandgap core on another bad operating point. Therefore the pseudo-regulator circuit is kept on during both BGR start-up phase and normal operating mode. To achieve a high-performance voltage reference it is mandatory to pay attention to some important parameters such as the PSRR, beside the already cited line
Fig. 11. Behavior of VBG versus temperature sweep with (bottom blue curve, w/o) or without (top red curve, w/o) the pseudo-regulator of Fig. 3 during BGR operating mode (data are normalized to their room T values) (color online).
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-70 10-1
worst typ best
-30 -40 -50 -60 -70 10-1
100
101 102 103 104 Frequency (Hz)
Fig. 12. PSRR related to VBG (top) and to Vout
reg
(bottom) (color online).
regulation (LR), and temperature coe±cient. By means of AC analysis over all PVT corners we evaluated the PSRR value in the min-typ-max conditions. As can be seen in Fig. 12 the PSRR of the proposed BGR is higher than 60 dB at 100 Hz in the typical corner. Figure 13 shows instead the power supply rejection ratio related to disturbs injected through the substrate (negative-power supply rejection ratio, NSRR). 4. Experimental Results The designed BGR was fabricated in a 0.25 m BCD technology. Careful layout has been implemented to minimize devices' mismatch. Figure 14 shows the die photo of the BGR circuit with bonding pads. The size of the prototype BGR is 448 m 263 m (0.118 mm2). The package used for this ASIC is a QFN with exposed die pad (where the bottom die pad is exposed outside the mold compound, to improve package thermal performance). The measurement of VBG and Vout reg voltages at room temperature for about 150 samples has been carried out. We measured a standard deviation () of 1250069-12
BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator -20
worst typ best
VBG (dB)
-30 -40 -50 -60 -70 -80 -90 100
-20
101 102 103 104 Frequency (Hz)
105
106
105
10
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-30
vout_reg (dB)
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10-1
-40 -50 -60 -70 -80 -90 10-1
100
101 102 103 104 Frequency (Hz)
Fig. 13. NSRR related to VBG (top) and to Vout
reg
6
(bottom) (color online).
Fig. 14. Microphotograph of the fabricated ASIC, BGR highlighted (color online).
about 22 mV around a mean value () of about 1.21 V for VBG ; ¼ 3:68 V and ¼ 67 mV for Vout reg . temperature chamber sweep tests (from 40 C to 150 C) on several samples (see Fig. 15) show a behavior in-line with simulation results in Fig. 9 and with the statistical Monte Carlo analysis in Sec. 3: the maximum variation
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S. Saponara et al. 1.27 1.26 1.25
VBG (V)
1.24 1.23 1.22 1.21 1.2
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1.19 1.18 -40
VBG@COLD - VBG@HOT 18.6mV (1.51%) 20.5mV (1.63%) 20.4mV (1.65%) 28.7mV (2.30%) 27.3mV (2.25%) -20
0
20
40
60
80
100
120
140
Temperature (°C)
Fig. 15. Measurement of VBG value versus T , ¯ve di®erent IC samples (color online).
Table 1. Measured temperature coe±cient (TC) for ¯ve IC samples at two di®erent supply voltages. Sample
Temperature coe±cient (ppm/ C)
#1
#2
#3
#4
#5
VBATT ¼ 12 V VBATT ¼ 4:5 V
79.3 99
85.6 104
86.9 101
120.9 140
118.6 132
Note: Please note that lower supply voltage is 4.5 V, less than minimum value from IC speci¯cations.
between VBG measured at hot (150 C) and cold (40 C) is less than 2.5% of room temperature value. Temperature coe±cient has been also measured (Table 1). Table 2 reports the main experimental measured electrical characteristics of the proposed HV BGR: operating external supply voltage, bandgap output voltage, temperature drift and power supply drift, PSRR, and total current consumption. Table 2. Main parameters of the BGR and service regulator. Value Parameter
Min
Typ
Max
Unit
Supply voltage VBG Vout reg VBG temperature drift VBG power supply drift Vout reg power supply drift VBG PSRR@100 Hz BGR current consumption
4.5 — — — — — — —
12 1.21 3.68 121* 0.8 2.48 61 233
40 — — — — — — —
V V V ppm/ C mV/V mV/V dB A
Note: *From Table 1 for typical VBATT of 12 V.
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BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
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Table 3.
Our Ref. Ref. Ref. Ref. Ref. Ref. Ref. Ref.
10 11 12 13 14 15 16 20
Analysis of state of the art BGR ICs.
VBG (V)
TC (ppm/ C)
Supply (V)
Temp. ( C)
PSRR (dB)
Area (mm 2 )
Tech.
1.21 2.5 1.24 1.265 0 2.1 1.22 1.09 1.23 1.26
121 16.4 20 35 100 80 3 47 13.7
540 618 4.55.5 4.55.5 33.6 1225 1.53.3 N/A 2.75
40150 1585 20140 40260 40120 0100 20100 7575 40150
61 103 59 N/A 80 N/A 80 N/A 98
0.118 N/A 0.09 0.3 N/A N/A 0.81 0.14 0.034
BCD 0.25 m BCD 1.5 m CMOS 0.5 m BCD CMOS 0.35 m SOI 0.35 m CMOS 0.35 m CMOS 0.35 m BCD 0.5 m
Comparing the performance of the proposed BGR (experimental measurements) versus the state of the art in Table 3 these considerations can be done: (i) the proposed circuit sustains HV supply, up to 40 V, and with large variations, roughly a factor 10 from 5 V to 40 V, while most other ICs are limited to 25 V and to a factor 23 of variation; (ii) measured PSRR at 100 Hz (ASIC typical operating range) is comparable to reported state-of-the-art BGR ICs; (iii) the area is minimized since HV MOS count has been kept low. As far as line regulation is concerned, for the reference works in Table 3 that are operating in a lower voltage range1113,15,16,20 sustain variations in a range of few Volts a direct comparison with our design, operating over a range of 35 V from 5 V up to 40 V, is not fair. For Ref. 14 which supports power supply variation in the range 12 V to 25 V there is a variation of the bandgap voltage of 1% of 1.22 V over 13 V that is 0.938 mV/V. For Ref. 10 which supports power supply variation in the range 6 V to 18 V there is a variation of the bandgap voltage of 0.32 mV versus the nominal 2.5 V over 12 V that is roughly 0.03 mV/V. The proposed design has a regulation factor of 0.8 mV/V (better than Ref. 14 but worse than Ref. 10) over a variation range of 35 V (from 5 V to 40 V) which is 3 times larger than the variation range supported in Refs. 10 and 14. From measured results in Fig. 15 our design has a slight CTAT behavior in the range 40 C to 150 C. However the achieved performances of a TC in the range 100150 ppm/ C over a wide temperature range of roughly 200 C, and the sustained wide input voltage variation (from 4.5 V to 40 V, not available in the state of art) meet the required project speci¯cations. The macrocell has been integrated in a real automotive SoC.
5. Conclusions A BGR architecture for an automotive application, capable to withstand HV and wide supply variations in harsh scenarios, has been designed and characterized in TSMC BCD 0.25 m technology by means of both post-layout simulations and measurements on fabricated IC samples. A service regulator that uses the 1.21 V VBG 1250069-15
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S. Saponara et al.
as reference is integrated on-chip to provide a further 3.7 V stable internal supply voltage. HV MOS count has been kept low allowing the design of a compact BGR, 0.118 mm2 area. As highlighted in the introduction, the target of this work is the design of a macrocell, for an automotive SoC, able to work on a wide supply range and producing two stable voltages, a 1.21 V bandgap and a 3.7 V regulated one. Such voltages can be used directly in those blocks needing a voltage reference where a TC of 100150 ppm/ C and a PSRR of 60 dB are enough. The 3.7 V output can be used as supply rail for high-precision low-voltage bandgap producing references with better TC and PSRR values but working with a lower input variation range and with a lower supply voltage. The proposed BGR operates correctly with supply variations from 5 V to 40 V, while most state-of-art BGR ICs are limited to 25 V and to a factor 23 of variation. Measurements carried on fabricated IC samples prove also the e®ectiveness of the BGR design in terms of temperature drift, line regulation and PSRR. The supported temperature range on which experimental measures have been done is from 40 C to 150 C.
References 1. Oliver Wyman Group, Electronics are Driving the Development of the Automobile Industry, www.oliverwyman.com, 2006 2. D. Riccardi et al., BCD8 from 7 V to 70 V: A new 0.18 m technology platform to address the evolution of applications towards smart power ICs with high logic contents, IEEE ISPSD (2007), pp. 7376. 3. C. Contiero et al., Progress in power ICs and MEMS, analog technologies to interface the real world, IEEE ISPSD'04, pp. 312. 4. R. M. Forsyth, Technology and design of integrated circuits for up to 50 V applications, IEEE ICIT (2003), pp. 713. 5. S. Prosser et al., Advanced automotive electronic systems: Packaging & environmental challenges, IEEE ESTC (2006). 6. N. Costantino et al., Design and test of an HV-CMOS intelligent power switch with integrated protections and self-diagnostic for harsh automotive applications, IEEE Trans. Ind. Electron. 58 (2011) 27152727. 7. F. Baronti et al., Design and veri¯cation of hardware building blocks for high-speed and fault-tolerant in-vehicle networks, IEEE Trans. Ind. Electron. 58 (2011) 792801. 8. R. W. Johnson et al., The changing automotive environment: High-temperature electronics, IEEE Trans. Electron. Packag. Manuf. 27 (2004) 164176. 9. H. Yueli et al., Voltage regulator architecture used in automotive electronics, IEEE Int. Conf. Measuring Tech. and Mech. Automation (2011), pp. 11351138. 10. G. Shurong et al., A high precision bandgap reference used in power management ICs, Eng. Lett. 14 (2007) 14. 11. A. Tajalli et al., An area and power optimization technique for CMOS bandgap voltage references, Analog Integr. Circuits Signal Process. (2010) 131140. 12. W. Horn et al., A robust smart power bandgap reference circuit for use in an automotive environment, IEEE J. Solid-State Circuits 37 (2002) 949952. 13. F. G. R. Ramos et al., A programmable voltage reference optimized for power management applications, SBCCI'07, pp. 3641.
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BVR IC for HV Automotive Applications with Pseudo-Regulated Bias and Service Regulator
14. V. Sukumar et al., High voltage bandgap reference design using SO1 technology, IEEE Microelectr. Symp. (2003), pp. 120123. 15. X. Guan, X. Wang, A. Wang and B. Zhao, A 3 V 110 W 3.1 ppm/ C curvaturecompensated CMOS bandgap reference, Analog Integr. Circuits Signal Process. 62 (2010) 113119. 16. J. P. Martinez Brito, S. Bampi and H. Klimach, A 4-bits trimmed CMOS bandgap reference with an improved matching modeling design, IEEE ISCAS (2007), pp. 19111914. 17. B. Razavi, Design of Analog CMOS Integrated Circuits, Chapter 11 (McGraw-Hill, New York, USA, 2000). 18. S. Saponara et al., A °exible LED-driver for automotive lighting applications: IC design and experimental characterization, IEEE Trans. Power Electron. 27 (2012) 10711075. 19. W. Huang, X. Yang and C. Ling, A bandgap voltage reference design for high power supply, IEEE Int. Conf. Anti-Counterfeiting, Security and Identi¯cation ASID, June 2011, pp. 184187. 20. Y. Yintang et al., A high precision high PSRR bandgap reference with thermal hysteresis protection, IOP J. Semiconductors 31 (2010) 095010-1095019-10. 21. S. Saponara et al., Design of an integrated scanning micromirror driver in BCD technology, J. Circuits, Syst. Comput. 20 (2011) 781799. 22. L. Fanucci et al., Power pptimization of an 8051-compliant IP microcontroller, IEICE Trans. Electron. 88-C (2005) 597600.
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