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D-STATCOM With Positive-Sequence Admittance and Negative-Sequence Conductance to Mitigate Voltage Fluctuations in High-Level Penetration of Distributed-Generation Systems Tzung-Lin Lee, Member, IEEE, Shang-Hung Hu, Student Member, IEEE, and Yu-Hung Chan
Abstract—Voltage fluctuations resulting from variable output power of renewable energy sources are strictly challenging power quality in distributed-generation systems. This paper presents a control method for distributed static synchronous compensator (D-STATCOM) to alleviate variation of both positive- and negative-sequence voltages. The D-STATCOM simultaneously operates as fundamental positive-sequence admittance and fundamental negative-sequence conductance to restore the positivesequence voltage to the nominal value as well as reduce the negative-sequence voltage to an allowable level. Both admittance and conductance are dynamically tuned to improve voltageregulation performances in response to load changes and power variation of renewable sources. A proportional–resonant current regulator with selectively harmonic compensation is realized to control the fundamental current of the D-STATCOM as well as reduce the harmonic current, which could be an advantage in practical applications due to high voltage distortion in low-voltage microgrids. Voltage-regulation performances are discussed for different D-STATCOM locations as well as different D-STATCOM currents. Computer simulations and laboratory tests validate effectiveness. Index Terms—Distributed STATCOM (D-STATCOM), microgrid, voltage fluctuations, voltage imbalance.
I. I NTRODUCTION
G
LOBAL concerns about the environment and fossil fuels continue to advance the development of renewable energy systems, such as wind turbines, photovoltaics, fuel cells, etc. The microgrid concept was proposed to intelligently coordinate various renewable energy sources (RESs) into distribution networks for both grid-connected and islanding operations [1], [2]. Increasing the use of RESs could help relieve network congestion, reduce system losses, and defer infrastructure investments. These issues have received much attention recently, and numerous projects have been commissioned to demonstrate and evaluate functionality of microgrids by worldwide research organizations, for example, Consortium for Electric Reliability Manuscript received February 23, 2011; revised May 6, 2011 and July 27, 2011; accepted August 12, 2011. Date of publication August 30, 2011; date of current version November 22, 2012. This work was supported by the National Science Council of Taiwan under Grant NSC 99-3113-P-214-001. The authors are with the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan (e-mail:
[email protected]. edu.tw;
[email protected];
[email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TIE.2011.2166233
Technology Solutions [3] and New Energy and Industrial Technology Development Organization [4]. Conventionally, voltage fluctuations in the power system mainly result from impedance of transmission lines, loading types, and uneven distribution of single-phase loads. The scenarios become much severer in the low-voltage microgrid system due to reverse power flow contributed by distributed generations (DGs) in either three- or single-phase connection [5]. Voltage fluctuations cause system losses, capacity reduction, transformer overloading, and motor overheating, and even results in output limitation of DGs, nuisance tripping of protected devices, and malfunction of sensitive equipment. According to IEEE Std 1547.2-2008 [6], voltage fluctuations are limited to ±5% as RESs are paralleled to low-voltage systems. Voltage imbalance measured by %Unbalance or %VUF kept below 2.0%–3.0% is acceptable for both manufactures and utility, where %Unbalance and %VUF are defined as the percentage of maximum deviation from the average value and the ratio of the negative-sequence voltage to the positivesequence voltage, respectively [7]. Therefore, voltage regulation is absolutely needed to allow more DGs to join gridconnected operation. Voltage regulation in the power system could be realized by using an on-load tap changer (OLTC) or a static VAR compensator (SVC) at substations, and a step voltage regulator or a switched capacitor on feeders. With the help of the so-called optimal or intelligent control on all devices, the voltage profile could be improved on a real-time base [8], [9]. Thanks to the advancement of semiconductor technologies, voltage-sourceconverter-based solutions, such as static synchronous compensator (STATCOM), unified power flow controller (UPFC), distributed STATCOM (D-STATCOM), and active power filter (APF), become viable in practical applications [10]–[14]. STATCOM technology has been extensively studied and developed in transmission systems to regulate voltage by adjusting its reactive power into the power system, whereas UPFC was designed to control real- and reactive-power flows between two substations. On the other hand, D-STATCOM and APF are suitable for power quality improvement of the distributed power system, such as harmonic compensation, harmonic damping, and reactive-power compensation. A D-STATCOM for compensating voltage fluctuations of load bus was presented [15]. In this paper, voltage regulation
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Fig. 1. Simplified Thévenin equivalent circuit of the DG system.
was conducted by injecting reactive current into the utility. However, regulation performances may suffer from controlling error due to either imbalanced voltage or harmonic distortion. In [16], fundamental positive- and negative-sequence currents were separately controlled to improve the voltageregulation performances of the D-STATCOM. However, negative-sequence compensation may not work properly as the imbalanced source is nearby. A harmonic damping active filter was proposed to restore the voltage swell due to distributed generators [17]. However, discussions were limited in controlling positive-sequence voltage only. The concept of inverter-based RESs with functionality of VAr supporting was presented to accomplish voltage regulation locally [18]–[22]. Although RESs are currently not allowed to actively regulate the voltage at the point of common coupling (PCC) by IEEE Std 1547.2-2008, this operation may be viable in the future because supplying reactive power by customers with tariff reimbursement will benefit the utility for reducing equipment investment as well [23]–[25]. Compensating voltage fluctuations in DG systems by a D-STATCOM was presented in [26]. In this paper, we present extended simulations and discussions as well as experimental verification. The proposed D-STATCOM realizes positivesequence admittance and negative-sequence conductance to regulate positive-sequence voltage as well as suppress negative-sequence voltage. Both positive-sequence admittance and negative-sequence conductance are dynamically adjusted according to positive-sequence voltage deviation and imbalanced-voltage percentage. Therefore, voltage quality can be maintained at an allowable level in case of variation of DGs or loads. A proportional–resonant (PR) current regulator with selective harmonic compensation [27], [28] is implemented to control the fundamental current of the D-STATCOM as well as reduce harmonic current due to high voltage distortion in low-voltage networks. Theoretical analysis of voltage regulation with supporting results from simulations and experiments validates the proposed approach. II. VOLTAGE VARIATION IN THE DG S YSTEM Voltage fluctuations resulting from reverse power flow contributed by DGs have been reported [4], [5], [29]. In this section, a simplified Thévenin equivalent circuit of the DG system shown in Fig. 1 is established to address this phenomenon. Source voltage Ep is assumed to contain a positive-sequence component only, and line impedance is assumed to be equal to Z = R + jXL for both positive and negative sequences. Positive-sequence current IGp represents the equivalent real power supplied from the distributed generator or consumed by
Fig. 2. Positive-sequence voltage profile to impedance variation for various IGp [1.0, 0.5, −0.5, and −1.0 per unit (p.u.)]. (a) IGp = 0.5 p.u.. (b) IGp = 1.0 p.u.. (c) IGp = −0.5 p.u.. (d) IGp = −1.0 p.u..
the load, while negative-sequence current IGn is contributed by a single-phase generator or load. Figs. 2 and 3 show positivesequence voltage Vp and negative-sequence voltage Vn with
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Fig. 5. Generation of reference current.
mittance and fundamental negative-sequence conductance as given i∗ = Yp∗ · Ef+ + G∗n · Ef−
Fig. 3. Negative-sequence voltage profile to impedance variation for various negative-sequence currents IGn (0.5 and 0.25 p.u.). (a) IGn = 0.25 p.u.. (b) IGn = 0.5 p.u.
(1)
where i∗ is the reference current of the D-STATCOM, Ef+ is the quadrature fundamental positive-sequence voltage, and Ef− is the fundamental negative-sequence voltage. The fundamental positive-sequence admittance Yp∗ and the fundamental negativesequence conductance G∗n are defined as variable control gains to accomplish regulating positive-sequence voltage and suppressing imbalanced voltage. The control algorithm will be discussed in detail, followed by phasor analysis of the proposed method. A. Reference-Current Generation
Fig. 4.
Power circuit of D-STATCOM.
impedance variation for different current injections IGp and IGn . We could see that voltage variation is a significant issue in the DG system. In order to collect more power from DGs, voltage fluctuations need to be absolutely suppressed. Important observations from Figs. 2 and 3 are summarized as follows. 1) Injecting active power increases both Vp and Vn , whereas consuming active power decreases both Vp and Vn . 2) Large impedance and large R/XL ratio have a strong impact on voltage fluctuations. 3) Voltage fluctuations become severe with increasing current of DGs. III. O PERATION P RINCIPLE Fig. 4 shows the D-STATCOM circuit implemented by a conventional three-phase voltage source inverter and connected to the distribution line by a step-up transformer. The proposed D-STATCOM operates as fundamental positive-sequence ad-
The control is realized by using the so-called synchronous reference frame (SRF) transformation, as shown in Fig. 5. The ¯ +e is obtained by using a low-pass positive-sequence voltage E qd filter (LPF) to filter out ripple components. In addition to the LPF, a band-rejected filter tuned at the second-order harmonic frequency is needed to determine the negative-sequence volt¯ −e . By applying reverse transformation, the quadrature age E qd fundamental positive-sequence voltage Ef+ and the negativesequence voltage Ef− in the three-phase system are available, where Ef+ lags the fundamental positive-sequence voltage by 90◦ . The positive-sequence current command i∗+ f and the negative-sequence current command i∗− are equal to Ef+ , f − ∗ ∗ multiplied by Yp and Ef , and multiplied by Gn , respectively. Thus, the current command i∗ is generated as given in (1). A dc voltage control is also designed to assure proper operation of the D-STATCOM. As shown in Fig. 5, a proportional–integral (PI) regulator is realized to produce a fundamental current in phase with the positive-sequence voltage to maintain the dc ∗ . voltage Vdc at the reference value Vdc B. Current Control Based on the current command i∗ , the measured current i, and the measured voltage E, the current regulator shown in
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Fig. 6. Current control.
Fig. 9. Thévenin equivalent circuit with the D-STATCOM compensating positive-sequence current ICp and negative-sequence current ICn .
Fig. 7. Current-loop block diagram.
Fig. 8. Tuning control of Yp∗ and G∗n .
Fig. 6 produces the voltage command v ∗ for space vector pulsewidth modulation (PWM) control of the inverter. The transfer functions Hf (s) and Hh (s) are defined as Hf (s) = kp + Hh (s) =
h
2Ki,f ξωf s s2 + 2ξωf s + ωf2
2Ki,h ξωh s s2 + 2ξωh s + ωh2
(2)
where kp represents a proportional gain; ωf and Ki,f are the fundamental frequency and its integral gain, respectively; and ωh and Ki,h represent the harmonic frequency and its integral gain, respectively. The current regulation is tuned with damping ratio ξ to introduce a narrow gain peak centered at the fundamental frequency for fundamental current tracking and also to produce various narrow gain peaks at the harmonic frequencies to reduce current distortion. The current-loop block diagram is shown in Fig. 7, in which digital signal processing delay and PWM delay are considered. T represents a sampling period. Accordingly, current-tracking capability and currentloop stability can be simply evaluated by using Bode plots of open- and closed-loop transfer functions. Further discussions on current control are provided in the simulation section. C. Tuning Control Fig. 8 shows the tuning control of both Yp∗ and G∗n . |Ef+ | and |Ef− | are defined as (3). They can be approximately calculated by using LPFs and SQRT operation, where LPFs are designed with cutoff frequency ωc = 10 Hz to filter out ripple
components in the calculation. Then, a PI regulator is realized ∗ to generate Yp∗ to maintain |Ef+ | at the nominal value |Ef+ | . Similarly, imbalanced voltage could be suppressed and maintained at an allowable level by controlling G∗n . In this paper, we adopt %VUF (percentage of voltage imbalance factor) to assess the level of imbalanced voltage. It is defined as the ratio of the negative-sequence voltage to the positive-sequence voltage and is expressed in (4) t+T +e Eq (t)2 + Ed+e (t)2 + t dt Ef = T t+T Eq−e (t)2 + Ed−e (t)2 − t dt (3) Ef = T − Ef (4) %VUF = · 100%. Ef+ Basically, there are three control loops in the proposed method. The bandwidth of the current control loop is the highest one, which is dependent on the switching frequency of the inverter. The tuning loops of both admittance and conductance are to generate the current commands to improve power quality, so their bandwidths are lower than that of the current loop. In practice, their PI parameters are tuned to control both admittance and conductance with suitable transient response as well as zero steady-state error. On the other hand, the voltage on the dc capacitor will fluctuate due to inverter losses and conductance for suppressing imbalanced voltage. The lower the dc capacitance, the larger fluctuation will happen. Generally, due to large capacitance, the bandwidth of dc voltage control is lowest in the system. D. Phasor Analysis In this section, D-STATCOM operation will be discussed based on phasor analysis [12]. Fig. 9 shows the Thévenin equivalent circuit with the proposed D-STATCOM compensating positive-sequence current ICp as well as negative-sequence current ICn . Before the D-STATCOM starts operation, positivesequence voltage is swelled up, as shown in the red vectors of Fig. 10. |Vp | is obviously larger than |Ep |. This results from the voltage drop VGp on line impedance Z = R + jXL when IGp is injected into the grid. On the other hand, the negativesequence current IGn flowing on the line impedance Z causes the negative-sequence voltage drop Vn , as shown in the red
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IV. S IMULATION S TUDIES
Fig. 10. Positive-sequence phasor diagram.
A radial line rated at 23 kV and 100 MV · A in Fig. 12(a) is established by using the so-called alternative transient program to illustrate voltage fluctuations and verify the effectiveness of the proposed D-STATCOM. Since the grid voltage at the end of a radial line is most sensitive to injection of both real and reactive powers based on load flow analysis [29], the D-STATCOM is proposed to be installed at the end of the line. Tables I and II list line and load data, respectively. The D-STATCOM parameters are given as follows. 1) PWM frequency: 10 kHz. 2) The reference fundamental positive-sequence voltage and ∗ the reference voltage imbalance factor are set as |Ef+ | = ∗ 1.0 p.u. and %VUF = 2.0%, respectively. 3) Current controller: ki,f = ki,h = 40 (for h = 5, 7, 11, and 13), kp = 25, and ξ = 0.001. 4) Tuning controller: PI parameters for |Ef+ | (kp = 0.001, ki = 1 · 10−4 ) and for %VUF (kp = 10 and ki = 0.05). 5) Voltage base: 23 kV, current base: 2510 A, and impedance base: 5.29 Ω. Note that the inverter-based DG is assumed to be installed at the end of the bus, and also all single-phase loads are connected between phases a and b to generate severe voltage variation as well as voltage imbalance. The power of the DG is controlled by a PI regulator in the SRF to produce the current command. Similar to the current control of the D-STATCOM, resonant current control is realized to regulate the output current of the DG. The control of the DG has been sufficiently studied in other publications, so we will not repetitively discuss this issue in this paper [28]. A. Steady-State Operation
Fig. 11. Negative-sequence phasor diagram.
vectors of Fig. 11. Both phenomena have been numerically demonstrated and discussed in Section II. When the D-STATCOM draws ICp = −jYp∗ · Vp , the blue vectors of Fig. 10 show that |Vp | could be restored to the nominal value (the dashed line) by VCp due to ICp being 90◦ lagging with respect to Vp . In addition, phase leading of Vp after compensation is dependent on the line impedance Z and real-power injection IGp . Similarly, the D-STATCOM performs negative-sequence conductance Gn , reciprocal of resistance, to provide low impedance for negative-sequence current, thus reducing negative-sequence voltage. As shown in the blue vectors of Fig. 11, the D-STATCOM draws ICn = G∗n · Vn to mitigate negative-sequence voltage by VCn = −ICn · Z. Accordingly, |Vn | could be maintained at an acceptable value by variable G∗n . The acceptable value is represented by a dotted circle. As a consequence, we conclude that positive-sequence voltage could be restored by introducing an active admittance (or inductance) and that negative-sequence voltage could be suppressed by emulating an active conductance (or resistance).
Before the D-STATCOM starts operation, Fig. 12(b) shows that bus voltages are significantly swelled and imbalanced due to the DG and single-phase loads. Voltage fluctuation is getting worse toward the end of the line. For example, |Ef+ | = 1.06 p.u. and %VUF = 5.1% at Bus 5. Table III summarizes both |Ef+ | and %VUF for all buses. When the D-STATCOM is initiated with compensation of the positive-sequence voltage only (G∗n = 0), |Ef+ | on each bus could be restored to the nominal value, as listed in Table IV. At this time, the D-STATCOM is operated at Yp∗ = 0.37 p.u. with rms currents ia = ib = ic = 0.37 p.u.. However, Fig. 12(c) shows that voltage fluctuation is still significant due to imbalanced voltage. After imbalance suppression is activated, Fig. 12(d) shows that bus voltages are clearly recovered from fluctuation. Table V illustrates that both |Ef+ | and %VUF could be maintained below the presetting level (1.0 p.u. and 2%) on all buses. As shown in Fig. 12(g), the D-STATCOM consumes imbalanced currents ia = 0.52 p.u., ib = 0.25 p.u., and ic = 0.35 p.u. with Yp∗ = 0.37 p.u. and G∗n = 9.6 p.u., respectively. B. Frequency-Domain Analysis Fig. 13 shows frequency responses of the current control, including open- and closed-loop gains. Fundamental
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Fig. 12. Simulation circuit and test results. (a) Simulation circuit. (b) D-STATCOM off. (c) D-STATCOM on, but G∗n = 0. (d) D-STATCOM on. (e) D-STATCOM off. (f) D-STATCOM on, but G∗n = 0. (g) D-STATCOM on. TABLE I L INE DATA (in per unit)
TABLE II L OAD DATA (in per unit)
TABLE III B US VOLTAGES B EFORE THE D-STATCOM IS S TARTED
current-tracking capability is assured by a resonant gain at the fundamental frequency. Various resonant gains at the 5th, 7th, 11th, and 13th frequencies are introduced to reduce har-
TABLE IV B US VOLTAGES A FTER THE D-STATCOM O NLY C OMPENSATES P OSITIVE -S EQUENCE VOLTAGE
TABLE V B US VOLTAGES A FTER THE D-STATCOM C OMPENSATES B OTH P OSITIVE - AND N EGATIVE -S EQUENCE VOLTAGES
monic current. The phase margin of the designed current loop approaches 70◦ . Fig. 12(g) shows that D-STATCOM currents are almost maintained as sinusoidal waveforms. This could confirm the functionality of harmonic reduction because the nonlinear load at Bus 4 results in severely distorted line voltages (THDa = 3%, THDb = 2.5%, and THDc = 3.7%). C. Transient Operation Various events are defined in Table VI to evaluate the transient performances of the D-STATCOM. Fig. 14 shows the
LEE et al.: D-STATCOM WITH ADMITTANCE AND CONDUCTANCE TO MITIGATE VOLTAGE FLUCTUATIONS
Fig. 13. Frequency-domain analysis of the current loop. (a) Open loop. (b) Closed loop. TABLE VI L OAD OR DG VARIATION
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Fig. 14. Voltages in transient. (a) |Ef+ |. (b) %VUF.
behaves as a capacitor. Therefore, voltage regulation could be accomplished by dynamically tuning Yp∗ and G∗n of the D-STATCOM. D. Large R/L Ratio
transient behaviors of |Ef+ | and %VUF, while Fig. 15 shows those of Yp∗ and G∗n . When three-phase loads at Buses 3 and 4 are turned off at t = 4 and 6 s, respectively, |Ef+ | is increased. Thanks to the tuning control, Yp∗ is correspondingly increased to maintain |Ef+ | at 1.0 p.u. In contrast, tuning off the single-phase load at t = 7 s reduces the imbalanced voltage in Fig. 14(b), so G∗n is decreased to keep %VUF at 2%, as shown in Fig. 15(b). At t = 8 s, the output power of the DG decreases from 0.9 to 0.45 p.u. Since the swelled voltage becomes slighter, Yp∗ and the required reactive power of the D-STATCOM are reduced accordingly. More interestingly, with the DG being turned off at t = 9 s, |Ef+ | becomes lower than 1.0 p.u. In this situation, the D-STATCOM is operated with minus Yp∗ to supply reactive current for increasing fundamental voltage. Instead of an inductor, the D-STATCOM currently
In low-voltage systems, the feeder with high R/L ratio is very common. Here, we evaluate D-STATCOM performances in cases where the R/L ratio is increased by two and five times, respectively. As can be seen from Tables VII and VIII, both |Ef+ | and %VUF are obviously increased, and this situation is growing worse with the increase of the R/L ratio. For example, |Ef+ | is 1.1 and 1.25 p.u., and %VUF is 7.3% and 14%, respectively. After the D-STATCOM is in operation, |Ef+ | is restored to the nominal value throughout the feeder, and %VUF is also improved. However, the imbalanced voltages on Buses 3 and bus 4 are still higher than 2%. This is because the feeder with high R/L ratio will limit the damping capability of the D-STATCOM at a distant location. The D-STATCOM currents are ia = 0.75 p.u., ib = 0.43 p.u., and ic = 0.57 p.u. for Table VII and ia = 0.90 p.u., ib = 0.54 p.u., and ic = 0.80 p.u. for Table VIII. Obviously, the D-STATCOM needs larger currents to accomplish voltage regulation compared with the results in Section IV-A.
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Fig. 15. D-STATCOM commands in transient. (a) Yp∗ . (b) G∗n . TABLE VII R/L R ATIO IS I NCREASED BY T WO T IMES
TABLE VIII R/L R ATIO IS I NCREASED BY F IVE T IMES
Fig. 16. |Ef+ | and %VUF at all buses when the D-STATCOM is deployed at Buses 2, 3, 4, and 5, respectively. (a) |Ef+ |. (b) %VUF.
the right side. Installing the D-STATCOM at the end of the line provides the best performances of voltage regulation on the entire line, while voltage fluctuations could not receive much improvement if the D-STATCOM is closed to the voltage source. This result absolutely complies with other studies [29], [30]. Note that imbalance suppression is no longer needed (G∗n = 0) when the D-STATCOM is located at Bus 2 due to %VUF lower than 2%. B. D-STATCOM Current
V. D ISCUSSIONS A. D-STATCOM Location In this section, voltage-regulation performances are evaluated considering the D-STATCOM at different locations. Fig. 16 shows |Ef+ | and %VUF when the D-STATCOM is deployed at Buses 2, 3, 4, and 5, respectively. At the installation point, both |Ef+ | and %VUF can be clearly maintained at 1.0 p.u. and 2%, respectively. Regulating performances on the left side of the installation point are better than those on
We will concentrate on the required D-STATCOM current ∗ for various levels of |Ef+ | and %VUF∗ . For convenience, percentage positive-sequence voltage derivation %PVD∗ is defined as (5). Thus, both positive-sequence current Ip and negativesequence current In could be displayed in the same figure ∗ %PVD∗ = % Ef+ − 100%. (5) Fig. 17 shows D-STATCOM currents for %PVD∗ and %VUF∗ in the range of 0%–5%. Larger Ip and In are required to comply with the stricter standards of %PVD∗ and %VUF∗ . This result could help estimate the required current rating of the D-STATCOM to reduce voltage fluctuations being up to a certain level for a given feeder.
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Fig. 18. Arrangement of the experimental circuit.
Fig. 17. D-STATCOM currents with respect to %PVD∗ and %VUF∗ .
C. Cooperative Control of D-STATCOM Since the proposed D-STATCOM is intended for voltage regulation in the distributed power system, it is worth discussing on the cooperative control with other equipment, such as OLTC and SVC. First, the coordination of the D-STATCOM with them is presented, and then, the operation of multiple D-STATCOMs is considered. 1) OLTC: OLTC is usually installed at the substation to regulate the grid voltage by moving the transformer tap. Its response is too slow to cope with voltage fluctuations resulting from power variation of DGs. On the contrary, the proposed D-STATCOM is able to inject reactive power to maintain the grid voltage at an acceptable level with faster response time than OLTC. Accordingly, a low-frequency communication between OLTC and D-STATCOM can be established to reduce the power rating of the D-STATCOM after OLTC starting operation. 2) SVC: SVC is constructed by thyristor switches, capacitor banks, and inductors. The compensation of reactive power can only be adjusted in a stepped manner. On the other hand, the proposed D-STATCOM can change reactive-power compensation continuously. Therefore, both the D-STATCOM and SVC can be integrated together to reduce the required power rating of the D-STATCOM. 3) Multiple D-STATCOMs: When multiple D-STATCOMs are installed together, the PI-based voltage control may not work properly. Instead, the droop control method needs to be ∗ developed to adjust the voltage command |Ef+ | . Generally, the voltage command is designed to droop according to the rated kilovolt–ampere capacity of the D-STATCOM. Thus, various D-STATCOMs can evenly share reactive power. Furthermore, a low-frequency communication can be applied to change the setting of droop control for the purpose of voltage restoration. The so-called hierarchical control can be realized in this case [25]. VI. L ABORATORY T EST R ESULTS Fig. 18 shows an experimental circuit. The parameters are summarized as follows. 1) Power system: 220 V (line to line), 60 Hz, 20 kV · A, L = 0.4 mH, C = 150 μF, and R = 50 Ω.
Fig. 19. Photographs of the test bench. (a) D-STATCOM. (b) Inductors and capacitors.
2) The D-STATCOM circuit is a three-phase voltage source inverter (Fig. 4) with a switching frequency of 10 kHz and an output inductance of Li = 5 mH. 3) Current controller: ki,f = ki,h = 40 (for h = 5, 7, 11, and 13), kp = 25, and ξ = 0.001. 4) Tuning controller: PI parameters for |Ef+ | (kp = 0.01 and ki = 1 · 10−5 ) and for %VUF (kp = 300 and ki = 0.01). ∗ = 5) DC voltage control (kp = 0.01, ki = 1 · 10−5 , and Vdc 380 V). The control of the D-STATCOM is realized by using the TI DSP evaluation platform of TMS320F28335 chip [31] to perform phase-locked loop, SRF transformation, LPF, PI controller, current regulator, A/D conversion, and PWM mechanism. Hardware photographs are given in Fig. 19. Due to limited experimental equipment, swelled and imbalanced voltages are generated by using resistors and capacitors. Fig. 20 shows bus voltage v before the D-STATCOM is started. Line voltages vab , vbc , and vca fluctuate with
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Fig. 20. Line voltages with no D-STATCOM operated.
Fig. 22.
Time responses of |Ef+ |, Yp∗ , %VUF, G∗n , and Vdc in the startup of
the D-STATCOM. (a) Time responses of |Ef+ | and Yp∗ . (b) Time responses of %VUF and G∗n .
Fig. 21. Voltages and currents after the D-STATCOM is in operation. (a) Line voltages. (b) D-STATCOM currents.
|Ef+ |
= 1.04 p.u. and %VUF = 2.5%, respectively. After the D-STATCOM is in operation, Fig. 21(a) shows that voltage amplitude is reduced and voltage imbalance is improved compared with Fig. 20. At steady state, |Ef+ | and %VUF could be maintained at 1.00 p.u. and 2.0% with Yp∗ = 0.098 Ω−1 and G∗n = 1.2 Ω−1 , respectively. Fig. 21(b) shows that the D-STATCOM draws both positive- and negative-sequence currents with rms value as ia = 6.6 A, ib = 8.5 A, and ic = 3.5 A, respectively.
Fig. 23.
Transient behavior when S is turned on at T .
Fig. 22(a) and (b) shows time responses of Vdc , |Ef+ |, Yp∗ , %VUF, and G∗n , respectively, when the D-STATCOM is started up. As expected, Yp∗ and G∗n are generated by the PI controllers to reduce |Ef+ | and %VUF, respectively. In addition, the D-STATCOM draws a fundamental positive-sequence current to maintain Vdc at 380 V. Fig. 23 shows the transient behavior of the D-STATCOM as the switch S is turned on at t = T . Since the coming singlephase load increases imbalanced voltage, G∗n is raised from 1.2
LEE et al.: D-STATCOM WITH ADMITTANCE AND CONDUCTANCE TO MITIGATE VOLTAGE FLUCTUATIONS
to 1.7 Ω−1 to maintain %VUF at 2%. The dc voltage Vdc also shows tight regulation at 380 V in the switching moment. Note that |Ef+ | and Yp∗ are almost not changed due to slight variation of the load in this test.
VII. C ONCLUSION This paper has presented a control method of the D-STATCOM to alleviate voltage fluctuations in high-level penetration of DG systems. Together with positive-sequence admittance to recover the positive-sequence voltage, negativesequence conductance is implemented to cooperatively improve imbalanced voltage. A tuning control is designed to dynamically adjust admittance as well as conductance commands to maintain both positive- and negative-sequence voltages at an allowable level in response to power variation of DGs or loads. Extended discussions on the relationship between the D-STATCOM current and its voltage regulation have been presented. The D-STATCOM is controlled by separately adjusting admittance and conductance, and the compromise between the D-STATCOM rating and the required improvement on power quality can be accomplished. The voltage-regulation performances of the D-STATCOM deployed at different locations have also been investigated. The termination–installation D-STATCOM is the best option to suppress voltage fluctuations. However, practical installation of the D-STATCOM might be dependent on the DG location and the loading profile, as well as on the feeder configuration. For example, large clusters of current-controlled DGs are usually connected at the end of the lateral in the distributed power system. The proposed D-STATCOM can be installed at the same location to mitigate voltage fluctuations, so more DGs can be allowed online. Finally, the cooperative control of the D-STATCOM has been discussed. By establishing a low-frequency communication, the D-STATCOM can work together with both OLTC and SVC to regulate the grid voltage. Thus, the rated kilovolt–ampere capacity of the D-STATCOM can be significantly reduced. In addition, multiple D-STATCOMs are able to cooperatively provide reactive-power compensation under the help of the socalled droop control. Various D-STATCOMs can evenly share workload according to their kilovolt–ampere rating.
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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 4, APRIL 2013
Tzung-Lin Lee (S’04–M’08) received the B.S. degree in electrical engineering from Chung Yuan Christian University, Taoyuan, Taiwan, in 1993, the M.S. degree in electrical engineering from National Chung Cheng University, Chiayi, Taiwan, in 1995, and the Ph.D. degree in electrical engineering from National Tsing Hua University, Hsinchu, Taiwan, in 2007. From 1997 to 2001, he was with the Microwave Department, Electronics Research and Service Organization, Industrial Technology Research Institute, Hsinchu. He began his teaching career in Chang Gung University, Taoyuan, in September 2007. Since August 2008, he has been with the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan, where he is currently an Assistant Professor. His research interests are in utility applications of power electronics, such as active power filters and microgrids.
Shang-Hung Hu (S’10) received the B.S. degree in electrical engineering from the National Taiwan University of Science and Technology, Taipei, Taiwan, in 2008 and the M.S. degree in electrical engineering from National Sun Yat-Sen University, Kaohsiung, Taiwan, in 2010, where he is currently working toward the Ph.D. degree in the Department of Electrical Engineering. His recent research includes active power filters and inverter controls in microgrids.
Yu-Hung Chan received the B.S. degree in electrical engineering from Feng Chia University, Taichung, Taiwan, in 2009 and the M.S. degree in electrical engineering from National Sun Yat-Sen University, Kaohsiung, Taiwan, in 2011. He is currently with the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung. His research interests include active power filters and inverter controls.