Department of Electrical and Computer Engineering McGill University ECSE-221 Introduction to Computer Engineering I Mid Term Exam Examiner: F.P. Ferrie Question 1
Date: October 15th, 2003
(4 points)
Encode the number –5.37 x 10-16 using IEEE 754 single precision representation. Express your answer in hexadecimal form. (Compute mantissa to equivalent precision of input.) Question 2
(2 points)
Determine the ranges corresponding to the following “C” data types: unsigned short, short, unsigned long, long.
Question 3
(2 points)
Using binary long division, compute the quotient and remainder corresponding to 11110001 / 1101. Question 4
(2 points)
A signal with range [-5v, 7.5v] must be sampled with a resolution of 1.0 mV. How many digits would be required to represent this number if a base-7 system were used? Question 5
(2 points)
A program must be written to convert an unknown ASCII character stored in an 8-bit register to lower case. If the machine in question has all of the basic operations discussed in Module 1 except AND and OR, what is the minimal sequence of operations required to perform conversion. Question 6
(6 points)
Write down the canonical sum of products, SP, and product of sums, PS, forms corresponding to the Carry output of a one bit full adder. Using algebraic minimization, determine the minimal expressions corresponding to each form. Prove algebraically that your minimal forms are equal. Question 7
(2 points)
Show how a two input exclusive-OR (XOR) function can be implemented using a single, twoinput multiplexer. (turn over – more questions on back)
Question 8
(2 points)
Determine the number of switching elements required to implement the XOR function in Question 7, assuming no passive elements and a NAND-NAND implementation. Repeat this analysis assuming that the multiplexer implementation in Question 7 was used instead. Assume that the multiplexer is composed of 3 two-input NAND gates and an inverter. Question 9
(2 points)
A Boolean function with 4 inputs, some of which are complemented, is implemented using an 8input multiplexer. Calculate the total propagation delay for this circuit assuming the multiplexer is fabricated as a binary tree (the implementation shown in the notes). You may assume that all gates have a propagation delay of 1 Tg. Question 10 (2 points) Write down the state transition table corresponding to an S-R latch. Question 11 (4 points) Draw the NAND-NAND configuration of an S-R latch. Beginning with this configuration, derive the expression corresponding to the next state of Q as a function of S, R, and the current state of Q.