High-Order Mismatch-Shaped Segmented Multibit 16DACs With
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High-Order Mismatch-Shaped Segmented Multibit DACs With Arbitrary Unit Weights
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Nan Sun, Member, IEEE
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Abstract—This paper reports a new segment-mismatch-shaping DACs. Our technique allows an technique for multi-bit arbitrary weight of unit elements in each segment and a high segment mismatch shaping order. In addition, our required number of unit elements does not increase as the segment-mismatch-shaping order increases. Simulations under various conditions prove the validity of our technique.
( 2)
Index Terms—
16 DAC, data converter, mismatch shaping. I. INTRODUCTION
A
digital-to-analog converter (DAC) employing a multibit modulator is more advantageous than its binary counterpart for two major reasons: 1) its theoretical signal-to-noise ratio can be much higher, because a more aggressive noise transfer function can be used and the quantization noise is also smaller; 2) it makes the design of the analog reconstruction filter easier, for the output waveform more closely resembles the desired signal than the pulse-width-modulation-like square-wave output of the binary modulator. However, different from the binary DAC that is intrinsically linear, the multibit DAC cannot guarantee linearity due to component mismatches. To overcome the mismatch problem, various mismatch-shaping techniques have been developed, such as [1]–[21]. The key idea of these techniques is to insert an element selection logic (ESL) block between the modulator and a multibit unit-element DAC comprised of equally-weighted 1-b DACs (see Fig. 1 for an example of a 3-b mismatch-shaped DAC). The ESL block transforms the output of the modulator to a vector , each element of which assumes either 1 or 0 and controls one 1-bit DAC. The summation of has to be to maintain the intended output amplitude, but we have the freedom to choose which elements of are 1 or 0, and this freedom/redundancy is exploited by the ESL block to make each element of exhibit a shaped spectrum, which guarantees that conversion errors caused by mismatches between these 1-bit DACs are always shaped regardless of the magnitude and the distribution of the mismatches. These mismatch-shaping techniques work well in cases where the number of bits of the DAC is small , but they are not suitable for DACs with a large number of Manuscript received June 23, 2011; accepted July 08, 2011. Date of current version January 27, 2012. This paper was recommended by Associate Editor S. Pavan. The author is with the Department of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCSI.2011.2163970
Fig. 1. Mismatch-shaped multibit
16 DAC.
bits . The reason is that since these techniques require the use of the unit-element DAC whose number of elements grows exponentially with the number of bits, the digital circuit complexity of the ESL block that controls these unit elements also has to grow exponentially, which results in unacceptable power and area cost. The key to reduce the complexity of the ESL block is to decrease the number of elements. To this end, one straightforward way is to divide the DAC into segments with different unit-element weights. For example, instead of using 63 equallyweighted 1-b DACs to implement a 6-b DAC, we can divide the DAC into two segments: the first segment contains a 3-b DAC comprised of seven 1-bit DACs with unit weight of 1 least significant bit (LSB), and the second segment contains another 3-b DAC comprised of seven 1-bit DACs with unit weight of 8 LSBs (see Fig. 2). We can apply the same mismatch shaping techniques of [1]–[21] to shape the mismatches between 1-bit DACs within the same segment. In this way, we only need to implement two sub-ESL blocks that control 7 elements each, and thus, the digital circuit complexity is reduced substantially
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Fig. 2. Two-segment multibit
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compared to implementing a single ESL block that controls 63 elements. However, for this approach to work, we need to solve two problems. The first problem is that segmentation introduces another source of mismatch, that is, the mismatch between the elements across different segments (see Fig. 2). Using the prior example, the average weight of the elements in the second segment may not be exactly 8 times the average weight of the elements in the first segment due to process variation. This segment mismatch causes nonlinearity and cannot be shaped by the mismatch shaping techniques of [1]–[21] that handle only the mismatch between elements within the same segment. Thus, we need to develop/apply other techniques that can shape the noise caused by the segment mismatch. The second problem is that segmentation reduces the redundancy in the ways of using the 1-bit DACs. For example, to output 28, if we use sixty-three 1-bit DACs, we have in total ways of choosing which 1-bit DACs to output 1 and which 1-bit DACs to output 0; however, if we use the 2-segment configuration of Fig. 2, we have to choose three 1-bit DACs with weight of 8 LSBs to output 1, and four 1-bit DACs with weight of 1 LSB to output 1, and thus, we have only ways of choosing how the 1-bit DACs are used. Although this substantially reduced redundancy is still adequate for the shaping of the mismatch within the same segment, it is insufficient for the shaping of the mismatch across different segments, which requires extra redundancy in choosing how many 1-bit DACs are used in each segment. This additional redundancy leads to two undesirable consequences: 1) since we need to arrange more 1-bit DACs in each segment, the total number of elements increases, leading to an increased hardware complexity for the ESL block; 2) these additional 1-bit DACs dissipate extra power, or from a different angle, if we maintain the same power consumption by shrinking the size of each 1-bit
DAC, then the signal swing has to be reduced to maintain the redundancy. These disadvantages, thoroughly discussed in [22], are inevitable prices for the shaping of segment mismatches; however, they can be made small compared to the power and area saving brought by segmentation. Therefore, there is still considerable net gain for using segmentation. The key to the shaping of the segment mismatch is the design of the segmentation logic (SL) block (see Fig. 2). In order to shape the segment mismatch, the SL block has to ensure that and are noise shaped. Researchers have deboth veloped multiple ways of designing the SL block to achieve this goal [22]–[25]. The technique in [23] generates by requantizing through an additional modulator with a shorter-bit-width quantizer, and then produces by . The patent of [24] generalized [23] to higher segment mismatch shaping orders, more than two segments, and various unit element weights. The merit of the techniques in [23] and mismatch shaping order [24] is that they allow a high and an arbitrary unit element weight. Their drawback is that the required number of elements increases as the segment-mismatch-shaping order increases, because does not closely follow for a high-order modulator, which leads to an increased bit-width of and an increased number of elements in the first segment. The technique in [25] is developed from the tree-based element mismatch shaping techniques [10]–[13]. It uses a special tree-structured decoder to produce and . The paper of [22] built upon [25] and proposed a systematic way of designing segmented multibit DACs. The relative advantage of [22] and [25] is that their number of elements does not increase as the order increases, but they cannot provide high-order shaping1 and they limit the unit element weight in each segment to be power of 2. This paper presents a new segment mismatch-shaping technique, whose key feature is a specially-designed modular quantizer. Our technique circumvents the aforementioned drawbacks of existing approaches. Its number of elements does not increase as the segment mismatch shaping order increases, which cannot be achieved by [23] and [24], and it allows a high segment mismatch shaping order and an arbitrary unit element weight, which cannot be achieved by [22] and [25]. The paper is organized as follows. Section II presents the architecture of our segmented mismatch-shaped multibit DAC. Section III describes our first-, second-, and third-order segment-mismatch-shaping algorithms. Sections IV and V discuss the number of elements required and the signal swing reduction. Section VI shows the simulation results. We finally conclude in Section VII.
II. ARCHITECTURE OF OUR MISMATCH-SHAPED SEGMENTED MULTIBIT DAC The architecture of our mismatch-shaped segmented multibit DAC is shown in Fig. 3. A multibit modulator converts the digital input to , which is then decomposed by a segmentation logic (SL) block into , 1To the best knowledge of the author, people have not figured out a way to stabilize a high modulator inside the tree-structured decoder, order for it is very difficult to meet the tough requirement on the quantizer output while still maintaining stability.
(> 2)
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[]
Fig. 4. Generation of the first-order shaped v n .
Using (1), (2), and the fact that the modular rule
are all integers, we obtain
for
(3)
needs to satisfy. which is the second rule that The main contribution of this paper is that we propose a new satway of designing the SL block, so that its produced isfy the aforementioned three requirements. The detailed design of the SL block is presented in the following section. III. OUR SEGMENT MISMATCH SHAPING ALGORITHM A. First-Order Segment-Mismatch Noise Shaping
Fig. 3. Our mismatch-shaped segmented multibit
16 DAC.
where is the input to the th segment. There are in total segments, each of which is comprised of an element selection logic (ESL) block and a unit-element DAC. The summation of the outputs of all unit-element DACs goes through an analog reconstruction filter to produce the analog output . The shaping of the segment mismatch requires to have shaped spectra (see Appendix A for a detailed proof), which is achieved through the design of the SL block. Besides this requirement, there are two additional rules that need to satisfy. The first one is the number conservation rule, given by the following equation:
As discussed in Section II, the shaping of the segment misto have shaped spectra. For match requires simplicity of presentation, let us first consider the generation of a first-order shaped , which is shown in Fig. 4. The block diagram resembles a standard first-order modulator with a constant input of . The difference is that the configuration of Fig. 4 uses a specially designed modular quantizer (MQ), which is defined as the following: if if
.
(4)
For easier understanding of the MQ, we plot its operation in and . We define the MQ this way Fig. 5 for because we want to satisfy the modular rule (5) which is a special case of (3) for and is given by
. The relationship between
(1)
(6)
is the weight of the unit element in the th segment. where For brevity, we assume , , and , and thus, we can express as
Since , it is easy to prove that is bounded and the feedback loop of Fig. 4 is stable. To analyze the spectral property of , we use a linear approximation for the modular quantizer shown in Fig. 6, where is the quantization noise. It is easy to derive that
(2) NTF
(7)
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Fig. 5. Modular quantizer output curves for (a) J
= 2 and (b) J = 3. Fig. 8. Complete architecture of the SL block and the generation of ;L .
fv [n]g(i 2
[1 ])
can be recursively The scheme for the generation of used to generate . For example, once is generated, we perform the following operation:
(8)
[]
Fig. 6. Linear model for analyzing the spectrum of v n .
Then, we use another dashed box of Fig. 4, set its input to , and define a new modular quantizer (MQ) to be if if
.
(9)
is also first-order noise shaped and It is easy to prove that satisfies (3). The complete architecture for the SL block and the generation of ( ) is shown in Fig. 8, where each shaded box is a copy of the dashed box in Fig. 4. The recursive relationship and is given by between (10) where if if
[]
Fig. 7. Spectrum of the first-order shaped v n .
where is the -transform of and the quantization noise transfer function NTF . The first term is at dc and only produces an offset in the analog output [see (42)]. Thus, it does not generate noise. The second term represents a first-order shaped noise. To see how well the linear approximation is, we test our scheme of Fig. 4 for and a sinusoidal input with an amplitude of dB full scale and a frequency at about 1/128 of the sampling rate. Fig. 7 shows the spectrum of , whose 20-dB/dec asymptotic behavior clearly demonstrates the first-order noise shaping.
.
(11)
Equation (11) ensures (12) which is a general form of (5). It is easy to prove that the gensatisfy both (1) and (3), and are erated first-order noise shaped. Thus, according to the sufficient and necessary condition derived in Appendix A, this way of designing the SL block ensures that the segment mismatches are first-order shaped.
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Fig. 9. Generation of the second-order shaped v [n].
Fig. 11. Spectra of second-order shaped v [n] for various a.
Fig. 10.
. The used to generate other second-order shaped overall architecture of the SL block for the second-order segment mismatch noise shaping is identical to that of the firstorder segment mismatch noise shaping of Fig. 8, except that all shaded boxes need to be changed to Fig. 9. It is easy to prove that the generated are all second-order shaped and satisfy both (1) and (3).
fy g for various a.
max
B. Second-Order Segment-Mismatch Noise Shaping Our scheme can be readily generalized to the second-order segment-mismatch noise shaping. The block diagram for the generation of a second-order shaped is shown in Fig. 9, which resembles a standard second-order modulator. The modular quantization scheme for the second-order noise shaping is the same as that for the first-order case given by (4). Using a linear approximation, we derive NTF where NTF
(13)
is given by
C. Third-Order Segment-Mismatch Noise Shaping Our block diagram for the generation of a third-order shaped is shown in Fig. 12. Again the modular quantization scheme is the same as that for the first-order noise shaping given by (4). It is easy to derive that NTF
(15)
where NTF
(14)
(16)
which shows that the quantization noise is second-order shaped. As in the standard second-order modulator, the feedback loop of Fig. 9 is not guaranteed stable. To enhance its stability and reduce the swing of , we add the feed-forward path with gain of (Fig. 9, top). For example, we simulate our algorithm of Fig. 9 for and a sinusoidal input. The result of Fig. 10 shows that a larger results in a smaller , and hence, NTF decreases a better stability. The reason is that as increases [26]. The disadvantage for having a larger is that NTF is less aggressive, leading to an increased in-band quantization noise in . The spectra of for various are plotted in Fig. 11, which clearly shows that the quantization noise rises as increases. To balance the trade-off between stability and noise reduction, we choose for our second-order segment-mismatch-shaping scheme of Fig. 9. As in the first-order noise shaping, our scheme for the generation of second-order shaped [Fig. 9] can be recursively
The two feed-forward paths with gains of and (Fig. 12) are added to enhance the stability. Fig. 13 shows the simulated as a function of and for and a sinusoidal input. We see that when and are small, , which indicates that the feedback loop is unstable. As and increase, decreases, demonstrating an improved stability. The reduction in saturates for and . for three combinations of Fig. 14 shows the spectra of and . The spectrum for is not shaped due to the instability of the feedback loop. Since the NTF for is less aggressive, its quantization noise at the lowfrequency end is slightly larger than that for . However, given that the stability for is better, we still choose for our scheme of Fig. 12. We also prefer and to be power of 2 because then the multiplication by and can be easily implemented through bit aligning. The overall architecture of the SL block for our third-order segment mismatch noise shaping is once again identical to that
NTF
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Fig. 12. Generation of the third-order shaped v [n].
IV. NUMBER OF ELEMENTS A. Minimum Number of Elements Required This subsection calculates the number of elements required by our algorithm given the number of quantization levels and the number of segments . By definition, we have (17) where is the number of unit elements in the th unit element DAC. Let us first calculate the lower bound for . takes value in [see (11)] and Since , we derive from (28) that for Fig. 13.
= maxfsg for various a and b.
1
(18)
, we need to know the To calculate the lower bound for span of . It is easy to derive from (28) and that . In order to ensure that the produced using our algorithm of Section III are always nonnegative, we need to put a lower limit on
(19) Equation (19) is a sufficient and necessary condition for (see Appendix B for proof). Therefore, in order to have quantization levels, needs to span from which we derive
,
(20) represents the nearest integer less than or equal where to . Plugging (18) and (20) into (17), we obtain Fig. 14. Third-order shaped v [n] spectra for various a.
of the first-order segment mismatch noise shaping of Fig. 8, except that all shaded boxes are changed to Fig. 12. Our scheme can be generalized to even higher order segment mismatch shaping, but we omit it to keep the paper concise.
(21) Since both and are determined by [see (19)], (21) only depends on . Thus, the minimization of boils down to the selection of an optimum , so that the right-hand side of (21) is set of
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Fig. 16. versus segment mismatch shaping order for (a) our technique . and (b) the technique of [23] assuming
Fig. 15.
N
versus
L=2
technique is more suitable for higher order segment mismatch shaping than the technique of [23].
M and L.
minimized. This is a well-defined optimization problem, whose solution can be iteratively obtained from (22)
V. SIGNAL SWING RESTRICTION As discussed in Section I and [22], any segment mismatch shaping technique restricts the signal swing to provide sufficient redundancy so that the errors resulting from segment mismatches are shaped. For our technique, the full input signal , where is given by:2 range is
represents the nearest integer to . Thus, the where minimum number of element is given by (26) (23) where (24) (25) as a function of and in Fig. 15, which We plot shows that reduces substantially as increases. For example, without segmentation, a 10-b 1024-level DAC requires 1023 elements; however, by segmenting the DAC into 5 segments, only 32 elements are sufficient to produce the 1024 levels, while still guarantee that the noise caused by segment mismatches is shaped. This example demonstrates the effectiveness of segmentation in reducing the total number of elements. B. Comparison to the Technique of [23] The advantage of our technique in comparison to [23] is that our minimum number of elements is the same for any segmentmismatch shaping order [Fig. 16(a)], while that for [23] grows as the segment-mismatch shaping order increases [Fig. 16(b)]. The reason that our number of elements does not increase is that is limited to by the modular quantizer [see (4)]. for [23] is For the first-order segment mismatch shaping, the same as ours; however, for the third-order shaping, for [23] is more than two times larger than ours. Therefore, our
However, as analyzed in Section IV, to ensure the working of our mismatch shaping technique and , the input is restricted to , which leads to the signal-to-noise ratio (SNR) reduction if not compensated by dissipating more power to reduce circuit noise. Therefore, there exists an SNR or power cost for using segmentation to reduce the number of elements and hardware complexity. To see how signal swing reduction changes with the number of segments , we plot the normalized available input range, defined as , versus in Fig. 17, assuming we use the minimum-number-of-element segmentation strategy of Section IV. Fig. 17 clearly shows that as the DAC is segmented into more levels, the normalized signal swing decreases. In addition, the reduction in the number of elements saturates for large (see Fig. 15). As a result, to balance the tradeoff between the number of elements and the signal range, we may prefer a small (2, 3, or 4) to a large . VI. SIMULATIONS We have verified our segment mismatch noise shaping technique under various conditions. This section presents one example of applying our technique to a 7-bit 128-level third-order DAC with an over-sampling ratio (OSR) of 64. We segment the DAC into 3 segments using the minimum-number-ofelement strategy described in Section IV. The corresponding unit-element weight and number of elements for each segment are summarized in Table I. The input to the DAC dB is a sinusoidal wave whose amplitude is assumed to be
v
2
corresponds to the situation where all elements in the DAC are used.
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TABLE II SNR AND BEHAVIOR
Fig. 17. Normalized available signal range versus L. TABLE I VALUES OF K AND M (i
2 [1; 3])
each segment are shaped, if the mismatches across different segments are not shaped, the overall output spectrum is not shaped. In this example, the overall mismatch shaping order is determined by the segment mismatch shaping order because the mismatches within each segment have been shaped to the third order (see the end of Appendix A for further explanation). VII. CONCLUSION This paper reported a new segment mismatch shaping technique that allows an arbitrary unit element weight and a high segment-mismatch-shaping order. Another merit of this technique is that the required number of elements does not increase as the segment-mismatch-shaping order increases. With this technique, we vision that new multibit DACs with better linearity and less hardware complexity can be developed in the future. APPENDIX A In this appendix, we derive a sufficient and necessary condition for the shaping of mismatches in our segmented multibit DAC. Note that similar calculations have been done in [22]. We provide the following derivation, for it is best tailored for our DACs. segmented multibit As shown in Fig. 3, the -th element selection logic (ESL) into a vector block decodes (27)
Fig. 18. Output spectra for various segment mismatch shaping orders.
full scale (dBFS). Both the mismatches between unit elements within each segment and the mismatches across different segments are assumed to follow Gaussian distribution, with standard deviations of 0.3%, 0.6%, and 1.2% LSB for the first, second, and third segment, respectively. We apply the thirdorder mismatch shaping technique of [21] to shape the mismatch between unit elements within each segment. We use our segment mismatch shaping technique proposed in this paper to shape the mismatches across different segments. Fig. 18 shows the output spectra of the DAC without segment mismatch shaping and with our first-order, second-order, and third-order segment mismatch shaping. Their corresponding SNRs and behaviors are summarized in Table II. Even though the mismatches between unit elements within
is the total number of unit elements in the -th unit where element DAC. Each takes value of either 1 or 0, and controls the th 1-bit DAC in the th unit-element DAC (see Fig. 19). The ESL block ensures
(28) which is the number conservation rule for . As seen from Fig. 19, the output of the th unit-element DAC is given by
(29) where is the analog output of the th 1-bit DAC in the th unit-element DAC, and corresponds to during
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where (38)
(39) We use to denote the error pulses caused by mismatches to denote the average of across different segments, and use . Mathematically speaking Fig. 19. Unit-element DAC model.
(40) the th sample period and is nonzero only when . The relationship between and is given by
where (41)
. (30)
Using (1), (37), and (40), we obtain the complete expression DAC before the refor the output of the entire segmented construction filter,
where and are the error pulses that reflect the mismatches between different 1-bit DACs within the th segment, and is the average output pulse of all 1-bit DACs in the -th segment, defined as
(42)
if if
where (31)
(43)
Plugging (30) in (31), we obtain (44) (32) (45) The two cases in (30) can be combined into one expression (33) where (34) (35) The ESL blocks ensure that each into
can be decomposed
(36) where is a noise term uncorrelated with ging (32), (33), and (36) into (29), we obtain
. By plug-
(37)
Among the four terms on the right hand side of (42), the first term is the signal that is linear with , the second term [ of (43)] is the offset, the third term [ of (44)] is the summation of errors caused by the unit-element mismatches within each segment, and the 4th term [ of (45)] is the summation of errors caused by the mismatches across different segments. It is easy to derive from (42) that the sufficient and necessary condition for to be noise-shaped is: 1) is noise-shaped, which is made possible by the ESL block (see Fig. 3). Researchers have developed various ways of designing the ESL block to achieve this goal, such as [1]–[21]. 2) is noise-shaped regardless of and , which essentially requires the SL block (see Fig. 3) to be specially designed so that have shaped spectra. Researchers have developed several ways of designing the SL block [22]–[25]. Our contribution is a new design technique presented in Section III. Equation (42) also shows that because the total mismatch error is the summation of and , the overall mismatch-shaping
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order for is set by the lower mismatch-shaping order beand . For example, if is shaped to the third tween order, the overall mismatch-shaping order will be equal to the shaping order of , as long as the shaping order of is less than or equal to 3 (see Section VI for an example). APPENDIX B We prove that (19) is a sufficient and necessary condition for for by induction. First, we prove this statement for . When , the statement becomes: is a necessary and sufficient condition for [ is by definition of (7)]. From (13), is equivalent to . From (7), it is trivial to show that is both necessary and sufficient for . Now we assume that the statement is true for , that is, is necessary and sufficient for for . We want to prove that is also . Since necessary and sufficient for ensures , it is trivial to prove from (11) that ensures , which is both necessary and sufficient for according to (10). Therefore, by induction, the statement is true for any . ACKNOWLEDGMENT The author would like to thank the anonymous reviewers for their valuable comments, Dr. Bo Zhang of Broadcom Inc. for discussions, and Dr. Richard Schreier of Analog Devices Inc. for discussions and sharing the toolbox. REFERENCES [1] B. H. Leung and S. Sutarja, “Multibit sigma-delta A/D converter incorporating a novel class of dynamic element matching techniques,” IEEE Trans. Circuits Syst., vol. 39, pp. 35–51, Jan. 1992. [2] H. S. Jackson, “Circuit and Method for Cancelling Nonlinearity Error Associated With Component Value Mismatches in a Data Converter,” U.S. 5221926, Jun. 22, 1993. [3] R. W. Adams and T. W. Kwan, “Data-Directed Scrambler for Multi-Bit Noise shaping D/A Converters,” U.S. Patent 5404142, Apr. 4, 1995. [4] R. T. Baird and T. S. Fiez, “Linearity enhancement of multi-bit 61 A/D and D/A converters using data weighted averaging,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp. 753–762, Dec. 1995. [5] K. D. Chen and T. H. Kuo, “An improved technique for reducing baseband tones in sigma-delta modulators employing data weighted averaging algorithm without adding dither,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 1, pp. 63–68, Jan. 1999. [6] A. A. Hamoui and K. W. Martin, “High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling 16 ADCs for broadband applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 72–85, Jan. 2004. [7] H.-Y. Hsieh and L. Lin, “A first-order tree-structured DAC with reduced signal-band noise,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 5, pp. 392–396, May 2007. [8] R. K. Henderson and O. J. A. P. Nys, “Dynamic element matching techniques with arbitrary noise shaping functions,” in Proc. IEEE Int. Symp. Circuits Syst., May 1996, pp. 293–296. [9] A. Keady and C. Lyden, “Tree structure for mismatch noise-shaping multibit DAC,” Electron. Lett., vol. 33, no. 17, pp. 1431–1432, Aug. 1997.
[10] I. Galton, “Spectral shaping of circuit errors in digital-to-analog converters,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, pp. 808–817, Nov. 1997. [11] E. Fogleman, J. Welz, and I. Galton, “An audio ADC delta-sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 339–348, Mar. 2001. [12] J. Welz and I. Galton, “Necessary and sufficient conditions for mismatch shaping in a general class of multibit DACs,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 12, pp. 748–759, Dec. 2002. [13] N. Rakuljic and I. Galton, “Tree-structured DEM DACs with arbitrary numbers of levels,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 2, pp. 303–322, Feb. 2010. [14] R. Schreier and B. Zhang, “Noise-shaped multibit D/A convertor employing unit elements,” Electron. Lett, vol. 31, pp. 1712–1713, Sep. 1995. [15] H. Lin, J. da Silva, B. Zhang, and R. Schreier, “Multi-bit DAC with noise-shaped element mismatch,” in Proc. IEEE Int. Symp. Circuits Syst., May 1996, vol. 1, pp. 235–238. [16] R. Schreier, “Mismatch-shaping digital-to-analog conversion,” in Proc. 103rd Convention Audio Eng. Soc. , Sep. 1997, Preprint No. 4529. [17] T. Shui, R. Schreier, and F. Hudson, “Mismatch shaping for a currentmode multibit delta-sigma DAC,” IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 331–338, Mar. 1999. [18] R. Schreier, “Quadrature mismatch-shaping,” in Proc. IEEE Int. Symp. Circuits Syst., May 2002, vol. 4, pp. 675–678. [19] A. Yasuda and H. Tanimoto, “Noise shaping dynamic element matching method using tree structure,” Electron. Lett, vol. 33, pp. 130–131, Jan. 1997. [20] A. Yasuda, H. Tanimoto, and T. Iida, “A third-order 1 6 modulator using second-order noise-shaping dynamic element matching,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1879–1886, Dec. 1998. [21] N. Sun, “High-order mismatch shaping in multibit 16 DAC,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 6, pp. 346–350, Jun. 2011. [22] K.-L. Chan, N. Rakuljic, and I. Galton, “Segmented dynamic element matching for high-resolution digital-to-analog conversion,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, pp. 3383–3392, Dec. 2008. [23] R. Adams, K. Q. Nguyen, and K. Sweetland, “A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling,” IEEE J. SolidState Circuits, vol. 33, no. 12, pp. 1871–1878, Dec. 1998. [24] R. Adams, “Digital-to-Analog Converter Using Noise-Shaped Segmentation,” U.S. 5977899, Nov. 2, 1999. [25] A. Fishov, E. Siragusa, J. Welz, E. Fogleman, and I. Galton, “Segmented mismatch-shaping D/A conversion,” in Proc. IEEE Int. Symp. Circuits Syst., Aug. 2002, vol. 4, pp. 679–682. [26] R. Schreier, “An empirical study of high-order single-bit delta-sigma modulators,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 40, no. 8, pp. 461–466, Aug. 1993.
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Nan Sun (S’06–M’11) is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Texas at Austin. He received the B.S. degree in electronic science and technology from Tsinghua University, Beijing, China in 2006, where he ranked top in the Department of Electronic Engineering and graduated with the highest honor and the Outstanding Undergraduate Thesis Award. He earned the Ph.D. degree in engineering science from the School of Engineering and Applied Sciences at Harvard University in 2010. Dr. Sun received the 1st-class Outstanding Student Award from Tsinghua University each year from 2003 to 2006. He won the Top Prize in the Intercollegiate Physics Competition in 2003. He is the recipient of Samsung Fellowship, Hewlett Packard Fellowship, and Analog Devices Outstanding Student Designer Award in 2003, 2006, and 2007, respectively. He also won the Harvard Teaching Award in three consecutive years: 2008, 2009, and 2010. His research interests include: 1) developing micro- and nano-scale solid-state platforms (silicon ICs and beyond) to analyze biological systems for biotechnology and medicine; 2) low-cost medical imaging systems; 3) miniature spin resonance systems; 4) analog, mixed-signal, and RF integrated circuits.
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Abstract—This paper reports a new segment-mismatch-shaping DACs. Our technique allows an technique for multi-bit arbitrary weight of unit elements in each segment and a high segment mismatch shaping order. In addition, our required number of unit elements does not increase as the segment-mismatch-shaping order increases. Simulations under various conditions prove the validity of our technique.
( 2)
Index Terms—
16 DAC, data converter, mismatch shaping. I. INTRODUCTION
A
digital-to-analog converter (DAC) employing a multibit modulator is more advantageous than its binary counterpart for two major reasons: 1) its theoretical signal-to-noise ratio can be much higher, because a more aggressive noise transfer function can be used and the quantization noise is also smaller; 2) it makes the design of the analog reconstruction filter easier, for the output waveform more closely resembles the desired signal than the pulse-width-modulation-like square-wave output of the binary modulator. However, different from the binary DAC that is intrinsically linear, the multibit DAC cannot guarantee linearity due to component mismatches. To overcome the mismatch problem, various mismatch-shaping techniques have been developed, such as [1]–[21]. The key idea of these techniques is to insert an element selection logic (ESL) block between the modulator and a multibit unit-element DAC comprised of equally-weighted 1-b DACs (see Fig. 1 for an example of a 3-b mismatch-shaped DAC). The ESL block transforms the output of the modulator to a vector , each element of which assumes either 1 or 0 and controls one 1-bit DAC. The summation of has to be to maintain the intended output amplitude, but we have the freedom to choose which elements of are 1 or 0, and this freedom/redundancy is exploited by the ESL block to make each element of exhibit a shaped spectrum, which guarantees that conversion errors caused by mismatches between these 1-bit DACs are always shaped regardless of the magnitude and the distribution of the mismatches. These mismatch-shaping techniques work well in cases where the number of bits of the DAC is small , but they are not suitable for DACs with a large number of Manuscript received June 23, 2011; accepted July 08, 2011. Date of current version January 27, 2012. This paper was recommended by Associate Editor S. Pavan. The author is with the Department of Electrical and Computer Engineering, University of Texas, Austin, TX 78712 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCSI.2011.2163970
Fig. 1. Mismatch-shaped multibit
16 DAC.
bits . The reason is that since these techniques require the use of the unit-element DAC whose number of elements grows exponentially with the number of bits, the digital circuit complexity of the ESL block that controls these unit elements also has to grow exponentially, which results in unacceptable power and area cost. The key to reduce the complexity of the ESL block is to decrease the number of elements. To this end, one straightforward way is to divide the DAC into segments with different unit-element weights. For example, instead of using 63 equallyweighted 1-b DACs to implement a 6-b DAC, we can divide the DAC into two segments: the first segment contains a 3-b DAC comprised of seven 1-bit DACs with unit weight of 1 least significant bit (LSB), and the second segment contains another 3-b DAC comprised of seven 1-bit DACs with unit weight of 8 LSBs (see Fig. 2). We can apply the same mismatch shaping techniques of [1]–[21] to shape the mismatches between 1-bit DACs within the same segment. In this way, we only need to implement two sub-ESL blocks that control 7 elements each, and thus, the digital circuit complexity is reduced substantially
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Fig. 2. Two-segment multibit
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compared to implementing a single ESL block that controls 63 elements. However, for this approach to work, we need to solve two problems. The first problem is that segmentation introduces another source of mismatch, that is, the mismatch between the elements across different segments (see Fig. 2). Using the prior example, the average weight of the elements in the second segment may not be exactly 8 times the average weight of the elements in the first segment due to process variation. This segment mismatch causes nonlinearity and cannot be shaped by the mismatch shaping techniques of [1]–[21] that handle only the mismatch between elements within the same segment. Thus, we need to develop/apply other techniques that can shape the noise caused by the segment mismatch. The second problem is that segmentation reduces the redundancy in the ways of using the 1-bit DACs. For example, to output 28, if we use sixty-three 1-bit DACs, we have in total ways of choosing which 1-bit DACs to output 1 and which 1-bit DACs to output 0; however, if we use the 2-segment configuration of Fig. 2, we have to choose three 1-bit DACs with weight of 8 LSBs to output 1, and four 1-bit DACs with weight of 1 LSB to output 1, and thus, we have only ways of choosing how the 1-bit DACs are used. Although this substantially reduced redundancy is still adequate for the shaping of the mismatch within the same segment, it is insufficient for the shaping of the mismatch across different segments, which requires extra redundancy in choosing how many 1-bit DACs are used in each segment. This additional redundancy leads to two undesirable consequences: 1) since we need to arrange more 1-bit DACs in each segment, the total number of elements increases, leading to an increased hardware complexity for the ESL block; 2) these additional 1-bit DACs dissipate extra power, or from a different angle, if we maintain the same power consumption by shrinking the size of each 1-bit
DAC, then the signal swing has to be reduced to maintain the redundancy. These disadvantages, thoroughly discussed in [22], are inevitable prices for the shaping of segment mismatches; however, they can be made small compared to the power and area saving brought by segmentation. Therefore, there is still considerable net gain for using segmentation. The key to the shaping of the segment mismatch is the design of the segmentation logic (SL) block (see Fig. 2). In order to shape the segment mismatch, the SL block has to ensure that and are noise shaped. Researchers have deboth veloped multiple ways of designing the SL block to achieve this goal [22]–[25]. The technique in [23] generates by requantizing through an additional modulator with a shorter-bit-width quantizer, and then produces by . The patent of [24] generalized [23] to higher segment mismatch shaping orders, more than two segments, and various unit element weights. The merit of the techniques in [23] and mismatch shaping order [24] is that they allow a high and an arbitrary unit element weight. Their drawback is that the required number of elements increases as the segment-mismatch-shaping order increases, because does not closely follow for a high-order modulator, which leads to an increased bit-width of and an increased number of elements in the first segment. The technique in [25] is developed from the tree-based element mismatch shaping techniques [10]–[13]. It uses a special tree-structured decoder to produce and . The paper of [22] built upon [25] and proposed a systematic way of designing segmented multibit DACs. The relative advantage of [22] and [25] is that their number of elements does not increase as the order increases, but they cannot provide high-order shaping1 and they limit the unit element weight in each segment to be power of 2. This paper presents a new segment mismatch-shaping technique, whose key feature is a specially-designed modular quantizer. Our technique circumvents the aforementioned drawbacks of existing approaches. Its number of elements does not increase as the segment mismatch shaping order increases, which cannot be achieved by [23] and [24], and it allows a high segment mismatch shaping order and an arbitrary unit element weight, which cannot be achieved by [22] and [25]. The paper is organized as follows. Section II presents the architecture of our segmented mismatch-shaped multibit DAC. Section III describes our first-, second-, and third-order segment-mismatch-shaping algorithms. Sections IV and V discuss the number of elements required and the signal swing reduction. Section VI shows the simulation results. We finally conclude in Section VII.
II. ARCHITECTURE OF OUR MISMATCH-SHAPED SEGMENTED MULTIBIT DAC The architecture of our mismatch-shaped segmented multibit DAC is shown in Fig. 3. A multibit modulator converts the digital input to , which is then decomposed by a segmentation logic (SL) block into , 1To the best knowledge of the author, people have not figured out a way to stabilize a high modulator inside the tree-structured decoder, order for it is very difficult to meet the tough requirement on the quantizer output while still maintaining stability.
(> 2)
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[]
Fig. 4. Generation of the first-order shaped v n .
Using (1), (2), and the fact that the modular rule
are all integers, we obtain
for
(3)
needs to satisfy. which is the second rule that The main contribution of this paper is that we propose a new satway of designing the SL block, so that its produced isfy the aforementioned three requirements. The detailed design of the SL block is presented in the following section. III. OUR SEGMENT MISMATCH SHAPING ALGORITHM A. First-Order Segment-Mismatch Noise Shaping
Fig. 3. Our mismatch-shaped segmented multibit
16 DAC.
where is the input to the th segment. There are in total segments, each of which is comprised of an element selection logic (ESL) block and a unit-element DAC. The summation of the outputs of all unit-element DACs goes through an analog reconstruction filter to produce the analog output . The shaping of the segment mismatch requires to have shaped spectra (see Appendix A for a detailed proof), which is achieved through the design of the SL block. Besides this requirement, there are two additional rules that need to satisfy. The first one is the number conservation rule, given by the following equation:
As discussed in Section II, the shaping of the segment misto have shaped spectra. For match requires simplicity of presentation, let us first consider the generation of a first-order shaped , which is shown in Fig. 4. The block diagram resembles a standard first-order modulator with a constant input of . The difference is that the configuration of Fig. 4 uses a specially designed modular quantizer (MQ), which is defined as the following: if if
.
(4)
For easier understanding of the MQ, we plot its operation in and . We define the MQ this way Fig. 5 for because we want to satisfy the modular rule (5) which is a special case of (3) for and is given by
. The relationship between
(1)
(6)
is the weight of the unit element in the th segment. where For brevity, we assume , , and , and thus, we can express as
Since , it is easy to prove that is bounded and the feedback loop of Fig. 4 is stable. To analyze the spectral property of , we use a linear approximation for the modular quantizer shown in Fig. 6, where is the quantization noise. It is easy to derive that
(2) NTF
(7)
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Fig. 5. Modular quantizer output curves for (a) J
= 2 and (b) J = 3. Fig. 8. Complete architecture of the SL block and the generation of ;L .
fv [n]g(i 2
[1 ])
can be recursively The scheme for the generation of used to generate . For example, once is generated, we perform the following operation:
(8)
[]
Fig. 6. Linear model for analyzing the spectrum of v n .
Then, we use another dashed box of Fig. 4, set its input to , and define a new modular quantizer (MQ) to be if if
.
(9)
is also first-order noise shaped and It is easy to prove that satisfies (3). The complete architecture for the SL block and the generation of ( ) is shown in Fig. 8, where each shaded box is a copy of the dashed box in Fig. 4. The recursive relationship and is given by between (10) where if if
[]
Fig. 7. Spectrum of the first-order shaped v n .
where is the -transform of and the quantization noise transfer function NTF . The first term is at dc and only produces an offset in the analog output [see (42)]. Thus, it does not generate noise. The second term represents a first-order shaped noise. To see how well the linear approximation is, we test our scheme of Fig. 4 for and a sinusoidal input with an amplitude of dB full scale and a frequency at about 1/128 of the sampling rate. Fig. 7 shows the spectrum of , whose 20-dB/dec asymptotic behavior clearly demonstrates the first-order noise shaping.
.
(11)
Equation (11) ensures (12) which is a general form of (5). It is easy to prove that the gensatisfy both (1) and (3), and are erated first-order noise shaped. Thus, according to the sufficient and necessary condition derived in Appendix A, this way of designing the SL block ensures that the segment mismatches are first-order shaped.
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Fig. 9. Generation of the second-order shaped v [n].
Fig. 11. Spectra of second-order shaped v [n] for various a.
Fig. 10.
. The used to generate other second-order shaped overall architecture of the SL block for the second-order segment mismatch noise shaping is identical to that of the firstorder segment mismatch noise shaping of Fig. 8, except that all shaded boxes need to be changed to Fig. 9. It is easy to prove that the generated are all second-order shaped and satisfy both (1) and (3).
fy g for various a.
max
B. Second-Order Segment-Mismatch Noise Shaping Our scheme can be readily generalized to the second-order segment-mismatch noise shaping. The block diagram for the generation of a second-order shaped is shown in Fig. 9, which resembles a standard second-order modulator. The modular quantization scheme for the second-order noise shaping is the same as that for the first-order case given by (4). Using a linear approximation, we derive NTF where NTF
(13)
is given by
C. Third-Order Segment-Mismatch Noise Shaping Our block diagram for the generation of a third-order shaped is shown in Fig. 12. Again the modular quantization scheme is the same as that for the first-order noise shaping given by (4). It is easy to derive that NTF
(15)
where NTF
(14)
(16)
which shows that the quantization noise is second-order shaped. As in the standard second-order modulator, the feedback loop of Fig. 9 is not guaranteed stable. To enhance its stability and reduce the swing of , we add the feed-forward path with gain of (Fig. 9, top). For example, we simulate our algorithm of Fig. 9 for and a sinusoidal input. The result of Fig. 10 shows that a larger results in a smaller , and hence, NTF decreases a better stability. The reason is that as increases [26]. The disadvantage for having a larger is that NTF is less aggressive, leading to an increased in-band quantization noise in . The spectra of for various are plotted in Fig. 11, which clearly shows that the quantization noise rises as increases. To balance the trade-off between stability and noise reduction, we choose for our second-order segment-mismatch-shaping scheme of Fig. 9. As in the first-order noise shaping, our scheme for the generation of second-order shaped [Fig. 9] can be recursively
The two feed-forward paths with gains of and (Fig. 12) are added to enhance the stability. Fig. 13 shows the simulated as a function of and for and a sinusoidal input. We see that when and are small, , which indicates that the feedback loop is unstable. As and increase, decreases, demonstrating an improved stability. The reduction in saturates for and . for three combinations of Fig. 14 shows the spectra of and . The spectrum for is not shaped due to the instability of the feedback loop. Since the NTF for is less aggressive, its quantization noise at the lowfrequency end is slightly larger than that for . However, given that the stability for is better, we still choose for our scheme of Fig. 12. We also prefer and to be power of 2 because then the multiplication by and can be easily implemented through bit aligning. The overall architecture of the SL block for our third-order segment mismatch noise shaping is once again identical to that
NTF
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Fig. 12. Generation of the third-order shaped v [n].
IV. NUMBER OF ELEMENTS A. Minimum Number of Elements Required This subsection calculates the number of elements required by our algorithm given the number of quantization levels and the number of segments . By definition, we have (17) where is the number of unit elements in the th unit element DAC. Let us first calculate the lower bound for . takes value in [see (11)] and Since , we derive from (28) that for Fig. 13.
= maxfsg for various a and b.
1
(18)
, we need to know the To calculate the lower bound for span of . It is easy to derive from (28) and that . In order to ensure that the produced using our algorithm of Section III are always nonnegative, we need to put a lower limit on
(19) Equation (19) is a sufficient and necessary condition for (see Appendix B for proof). Therefore, in order to have quantization levels, needs to span from which we derive
,
(20) represents the nearest integer less than or equal where to . Plugging (18) and (20) into (17), we obtain Fig. 14. Third-order shaped v [n] spectra for various a.
of the first-order segment mismatch noise shaping of Fig. 8, except that all shaded boxes are changed to Fig. 12. Our scheme can be generalized to even higher order segment mismatch shaping, but we omit it to keep the paper concise.
(21) Since both and are determined by [see (19)], (21) only depends on . Thus, the minimization of boils down to the selection of an optimum , so that the right-hand side of (21) is set of
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Fig. 16. versus segment mismatch shaping order for (a) our technique . and (b) the technique of [23] assuming
Fig. 15.
N
versus
L=2
technique is more suitable for higher order segment mismatch shaping than the technique of [23].
M and L.
minimized. This is a well-defined optimization problem, whose solution can be iteratively obtained from (22)
V. SIGNAL SWING RESTRICTION As discussed in Section I and [22], any segment mismatch shaping technique restricts the signal swing to provide sufficient redundancy so that the errors resulting from segment mismatches are shaped. For our technique, the full input signal , where is given by:2 range is
represents the nearest integer to . Thus, the where minimum number of element is given by (26) (23) where (24) (25) as a function of and in Fig. 15, which We plot shows that reduces substantially as increases. For example, without segmentation, a 10-b 1024-level DAC requires 1023 elements; however, by segmenting the DAC into 5 segments, only 32 elements are sufficient to produce the 1024 levels, while still guarantee that the noise caused by segment mismatches is shaped. This example demonstrates the effectiveness of segmentation in reducing the total number of elements. B. Comparison to the Technique of [23] The advantage of our technique in comparison to [23] is that our minimum number of elements is the same for any segmentmismatch shaping order [Fig. 16(a)], while that for [23] grows as the segment-mismatch shaping order increases [Fig. 16(b)]. The reason that our number of elements does not increase is that is limited to by the modular quantizer [see (4)]. for [23] is For the first-order segment mismatch shaping, the same as ours; however, for the third-order shaping, for [23] is more than two times larger than ours. Therefore, our
However, as analyzed in Section IV, to ensure the working of our mismatch shaping technique and , the input is restricted to , which leads to the signal-to-noise ratio (SNR) reduction if not compensated by dissipating more power to reduce circuit noise. Therefore, there exists an SNR or power cost for using segmentation to reduce the number of elements and hardware complexity. To see how signal swing reduction changes with the number of segments , we plot the normalized available input range, defined as , versus in Fig. 17, assuming we use the minimum-number-of-element segmentation strategy of Section IV. Fig. 17 clearly shows that as the DAC is segmented into more levels, the normalized signal swing decreases. In addition, the reduction in the number of elements saturates for large (see Fig. 15). As a result, to balance the tradeoff between the number of elements and the signal range, we may prefer a small (2, 3, or 4) to a large . VI. SIMULATIONS We have verified our segment mismatch noise shaping technique under various conditions. This section presents one example of applying our technique to a 7-bit 128-level third-order DAC with an over-sampling ratio (OSR) of 64. We segment the DAC into 3 segments using the minimum-number-ofelement strategy described in Section IV. The corresponding unit-element weight and number of elements for each segment are summarized in Table I. The input to the DAC dB is a sinusoidal wave whose amplitude is assumed to be
v
2
corresponds to the situation where all elements in the DAC are used.
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TABLE II SNR AND BEHAVIOR
Fig. 17. Normalized available signal range versus L. TABLE I VALUES OF K AND M (i
2 [1; 3])
each segment are shaped, if the mismatches across different segments are not shaped, the overall output spectrum is not shaped. In this example, the overall mismatch shaping order is determined by the segment mismatch shaping order because the mismatches within each segment have been shaped to the third order (see the end of Appendix A for further explanation). VII. CONCLUSION This paper reported a new segment mismatch shaping technique that allows an arbitrary unit element weight and a high segment-mismatch-shaping order. Another merit of this technique is that the required number of elements does not increase as the segment-mismatch-shaping order increases. With this technique, we vision that new multibit DACs with better linearity and less hardware complexity can be developed in the future. APPENDIX A In this appendix, we derive a sufficient and necessary condition for the shaping of mismatches in our segmented multibit DAC. Note that similar calculations have been done in [22]. We provide the following derivation, for it is best tailored for our DACs. segmented multibit As shown in Fig. 3, the -th element selection logic (ESL) into a vector block decodes (27)
Fig. 18. Output spectra for various segment mismatch shaping orders.
full scale (dBFS). Both the mismatches between unit elements within each segment and the mismatches across different segments are assumed to follow Gaussian distribution, with standard deviations of 0.3%, 0.6%, and 1.2% LSB for the first, second, and third segment, respectively. We apply the thirdorder mismatch shaping technique of [21] to shape the mismatch between unit elements within each segment. We use our segment mismatch shaping technique proposed in this paper to shape the mismatches across different segments. Fig. 18 shows the output spectra of the DAC without segment mismatch shaping and with our first-order, second-order, and third-order segment mismatch shaping. Their corresponding SNRs and behaviors are summarized in Table II. Even though the mismatches between unit elements within
is the total number of unit elements in the -th unit where element DAC. Each takes value of either 1 or 0, and controls the th 1-bit DAC in the th unit-element DAC (see Fig. 19). The ESL block ensures
(28) which is the number conservation rule for . As seen from Fig. 19, the output of the th unit-element DAC is given by
(29) where is the analog output of the th 1-bit DAC in the th unit-element DAC, and corresponds to during
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where (38)
(39) We use to denote the error pulses caused by mismatches to denote the average of across different segments, and use . Mathematically speaking Fig. 19. Unit-element DAC model.
(40) the th sample period and is nonzero only when . The relationship between and is given by
where (41)
. (30)
Using (1), (37), and (40), we obtain the complete expression DAC before the refor the output of the entire segmented construction filter,
where and are the error pulses that reflect the mismatches between different 1-bit DACs within the th segment, and is the average output pulse of all 1-bit DACs in the -th segment, defined as
(42)
if if
where (31)
(43)
Plugging (30) in (31), we obtain (44) (32) (45) The two cases in (30) can be combined into one expression (33) where (34) (35) The ESL blocks ensure that each into
can be decomposed
(36) where is a noise term uncorrelated with ging (32), (33), and (36) into (29), we obtain
. By plug-
(37)
Among the four terms on the right hand side of (42), the first term is the signal that is linear with , the second term [ of (43)] is the offset, the third term [ of (44)] is the summation of errors caused by the unit-element mismatches within each segment, and the 4th term [ of (45)] is the summation of errors caused by the mismatches across different segments. It is easy to derive from (42) that the sufficient and necessary condition for to be noise-shaped is: 1) is noise-shaped, which is made possible by the ESL block (see Fig. 3). Researchers have developed various ways of designing the ESL block to achieve this goal, such as [1]–[21]. 2) is noise-shaped regardless of and , which essentially requires the SL block (see Fig. 3) to be specially designed so that have shaped spectra. Researchers have developed several ways of designing the SL block [22]–[25]. Our contribution is a new design technique presented in Section III. Equation (42) also shows that because the total mismatch error is the summation of and , the overall mismatch-shaping
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order for is set by the lower mismatch-shaping order beand . For example, if is shaped to the third tween order, the overall mismatch-shaping order will be equal to the shaping order of , as long as the shaping order of is less than or equal to 3 (see Section VI for an example). APPENDIX B We prove that (19) is a sufficient and necessary condition for for by induction. First, we prove this statement for . When , the statement becomes: is a necessary and sufficient condition for [ is by definition of (7)]. From (13), is equivalent to . From (7), it is trivial to show that is both necessary and sufficient for . Now we assume that the statement is true for , that is, is necessary and sufficient for for . We want to prove that is also . Since necessary and sufficient for ensures , it is trivial to prove from (11) that ensures , which is both necessary and sufficient for according to (10). Therefore, by induction, the statement is true for any . ACKNOWLEDGMENT The author would like to thank the anonymous reviewers for their valuable comments, Dr. Bo Zhang of Broadcom Inc. for discussions, and Dr. Richard Schreier of Analog Devices Inc. for discussions and sharing the toolbox. REFERENCES [1] B. H. Leung and S. Sutarja, “Multibit sigma-delta A/D converter incorporating a novel class of dynamic element matching techniques,” IEEE Trans. Circuits Syst., vol. 39, pp. 35–51, Jan. 1992. [2] H. S. Jackson, “Circuit and Method for Cancelling Nonlinearity Error Associated With Component Value Mismatches in a Data Converter,” U.S. 5221926, Jun. 22, 1993. [3] R. W. Adams and T. W. Kwan, “Data-Directed Scrambler for Multi-Bit Noise shaping D/A Converters,” U.S. Patent 5404142, Apr. 4, 1995. [4] R. T. Baird and T. S. Fiez, “Linearity enhancement of multi-bit 61 A/D and D/A converters using data weighted averaging,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp. 753–762, Dec. 1995. [5] K. D. Chen and T. H. Kuo, “An improved technique for reducing baseband tones in sigma-delta modulators employing data weighted averaging algorithm without adding dither,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 1, pp. 63–68, Jan. 1999. [6] A. A. Hamoui and K. W. Martin, “High-order multibit modulators and pseudo data-weighted-averaging in low-oversampling 16 ADCs for broadband applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 72–85, Jan. 2004. [7] H.-Y. Hsieh and L. Lin, “A first-order tree-structured DAC with reduced signal-band noise,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 54, no. 5, pp. 392–396, May 2007. [8] R. K. Henderson and O. J. A. P. Nys, “Dynamic element matching techniques with arbitrary noise shaping functions,” in Proc. IEEE Int. Symp. Circuits Syst., May 1996, pp. 293–296. [9] A. Keady and C. Lyden, “Tree structure for mismatch noise-shaping multibit DAC,” Electron. Lett., vol. 33, no. 17, pp. 1431–1432, Aug. 1997.
[10] I. Galton, “Spectral shaping of circuit errors in digital-to-analog converters,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, pp. 808–817, Nov. 1997. [11] E. Fogleman, J. Welz, and I. Galton, “An audio ADC delta-sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 339–348, Mar. 2001. [12] J. Welz and I. Galton, “Necessary and sufficient conditions for mismatch shaping in a general class of multibit DACs,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 12, pp. 748–759, Dec. 2002. [13] N. Rakuljic and I. Galton, “Tree-structured DEM DACs with arbitrary numbers of levels,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 2, pp. 303–322, Feb. 2010. [14] R. Schreier and B. Zhang, “Noise-shaped multibit D/A convertor employing unit elements,” Electron. Lett, vol. 31, pp. 1712–1713, Sep. 1995. [15] H. Lin, J. da Silva, B. Zhang, and R. Schreier, “Multi-bit DAC with noise-shaped element mismatch,” in Proc. IEEE Int. Symp. Circuits Syst., May 1996, vol. 1, pp. 235–238. [16] R. Schreier, “Mismatch-shaping digital-to-analog conversion,” in Proc. 103rd Convention Audio Eng. Soc. , Sep. 1997, Preprint No. 4529. [17] T. Shui, R. Schreier, and F. Hudson, “Mismatch shaping for a currentmode multibit delta-sigma DAC,” IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 331–338, Mar. 1999. [18] R. Schreier, “Quadrature mismatch-shaping,” in Proc. IEEE Int. Symp. Circuits Syst., May 2002, vol. 4, pp. 675–678. [19] A. Yasuda and H. Tanimoto, “Noise shaping dynamic element matching method using tree structure,” Electron. Lett, vol. 33, pp. 130–131, Jan. 1997. [20] A. Yasuda, H. Tanimoto, and T. Iida, “A third-order 1 6 modulator using second-order noise-shaping dynamic element matching,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1879–1886, Dec. 1998. [21] N. Sun, “High-order mismatch shaping in multibit 16 DAC,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 6, pp. 346–350, Jun. 2011. [22] K.-L. Chan, N. Rakuljic, and I. Galton, “Segmented dynamic element matching for high-resolution digital-to-analog conversion,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, pp. 3383–3392, Dec. 2008. [23] R. Adams, K. Q. Nguyen, and K. Sweetland, “A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling,” IEEE J. SolidState Circuits, vol. 33, no. 12, pp. 1871–1878, Dec. 1998. [24] R. Adams, “Digital-to-Analog Converter Using Noise-Shaped Segmentation,” U.S. 5977899, Nov. 2, 1999. [25] A. Fishov, E. Siragusa, J. Welz, E. Fogleman, and I. Galton, “Segmented mismatch-shaping D/A conversion,” in Proc. IEEE Int. Symp. Circuits Syst., Aug. 2002, vol. 4, pp. 679–682. [26] R. Schreier, “An empirical study of high-order single-bit delta-sigma modulators,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 40, no. 8, pp. 461–466, Aug. 1993.
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Nan Sun (S’06–M’11) is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Texas at Austin. He received the B.S. degree in electronic science and technology from Tsinghua University, Beijing, China in 2006, where he ranked top in the Department of Electronic Engineering and graduated with the highest honor and the Outstanding Undergraduate Thesis Award. He earned the Ph.D. degree in engineering science from the School of Engineering and Applied Sciences at Harvard University in 2010. Dr. Sun received the 1st-class Outstanding Student Award from Tsinghua University each year from 2003 to 2006. He won the Top Prize in the Intercollegiate Physics Competition in 2003. He is the recipient of Samsung Fellowship, Hewlett Packard Fellowship, and Analog Devices Outstanding Student Designer Award in 2003, 2006, and 2007, respectively. He also won the Harvard Teaching Award in three consecutive years: 2008, 2009, and 2010. His research interests include: 1) developing micro- and nano-scale solid-state platforms (silicon ICs and beyond) to analyze biological systems for biotechnology and medicine; 2) low-cost medical imaging systems; 3) miniature spin resonance systems; 4) analog, mixed-signal, and RF integrated circuits.
