Microelectronics Reliability 52 (2012) 294–295
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Research note
New threshold voltage definition for undoped symmetrical DG MOSFET Paweł Sałek ⇑, Lidia Łukasiak, Andrzej Jakubowski Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warszawa, Poland
a r t i c l e
i n f o
Article history: Received 13 April 2010 Received in revised form 20 April 2011 Accepted 25 July 2011 Available online 30 August 2011
a b s t r a c t A new threshold definition is proposed for symmetrical undoped double gate MOS (DGMOS). Threshold voltage is calculated using the potential model described in [1] with only two fitting parameters, the values of which do not depend on device geometry. Comparison with the results of numerical simulations and other models of VT is presented and good accuracy of the new model is demonstrated. Ó 2011 Elsevier Ltd. All rights reserved.
1. Introduction
Using the relationship between gate voltage and surface potential proposed in [1] threshold voltage may be described as:
0 1 !2 qu0MAX kT @ qV b DuS C ox a ¼ ln e kT pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi þ e kT A þ DuS q 2kTni eSi
Double gate structure provides reduction of short channel effects [2] allowing for more aggressive channel-length scaling. In the case of very small devices undoped channels make it possible to eliminate statistical fluctuations of doping concentration [3]. In such conditions the classical definition of the threshold voltage based on the Fermi level does not apply. Unfortunately, new definitions proposed in [4,5] neglect the dependence of threshold voltage on body thickness or gate oxide thickness. The analysis presented in [6] while interesting does not lead to a convenient, analytical formula. Other models [7,8] were tuned to achieve good agreement with DIBL or threshold voltage roll-off, but the absolute threshold voltage calculated according to these models is still less accurate than the model proposed in this paper.
Other symbols in (2) have their usual meaning. Although our approach ignores the quantum phenomena and short-channel effects, it is useful because it reduces the complexity of mathematical description.
2. Threshold definition
3. Comparison with numerical simulations
A simplified cross-section of the considered device is shown in Fig. 1. The new 1D definition of the threshold voltage is based on the relationship between surface potential and gate voltage (simulated using ATLAS [9] and shown in Fig. 2). Two regions of this relationship may be observed: subthreshold and above threshold. In the subthreshold region the surface potential is almost exactly equal to the gate voltage. Above threshold the surface potential in Fig. 2 becomes a nonlinear function of the gate voltage. The new definition of the threshold voltage is based on this phenomenon. The threshold voltage is the gate voltage at which the following condition is fulfilled:
The fitting parameters DuS and a are determined by means of numerical simulations of transfer characteristics using ATLAS [9] and extraction of threshold voltage from these characteristics (based on the maximum of the second derivative [3] for VDS = 10 mV). The best agreement is obtained for:
uS ¼ V G DuS
ð1Þ
where uS is the surface potential, VG = VGS VFB the difference between the gate-to-source voltage and flatband voltage, and DuS is the fitting parameter. ⇑ Corresponding author. Tel.: +48 784320627. E-mail address:
[email protected] (P. Sałek). 0026-2714/$ - see front matter Ó 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2011.07.083
V Th
ð2Þ
u0MAX is the maximum value of the potential in the middle of the channel (see Figs. 1 and 2) and a¼
u0 ðV G ¼ V Th Þ u0MAX
DuS ¼ 1:1
ð3Þ
kT q
a ¼ 0:795 A comparison between several models and the values of threshold voltage extracted from the characteristics simulated numerically is presented in Figs. 3 and 4 as a function of channel thickness and gate-oxide thickness, respectively. Both, the models and simulations neglect quantum effects. The values of the fitting parameters of the models taken from the literature are as stated in the original publications. As it was mentioned before, the model of Taur [4] is independent of channel thickness in contrast to the results of the simulations. Its dependence on the dielectric thick-
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P. Sałek et al. / Microelectronics Reliability 52 (2012) 294–295
Fig. 1. Simplified cross-section of a symmetrical double-gate MOSFET.
Threshold voltage [V]
0.65 0.60
tSi = 20 nm Taur
0.55 0.50
Shih & Wang
0.45 0.40
Proposed model
Simulation
Chen
0.35
Tsormpatzoglou
0.30 1.0
3.0
5.0
7.0
9.0
Dielectric thickness [nm] Fig. 4. Threshold voltage as function of gate oxide thickness in comparison with other models.
4. Summary
Fig. 2. Potential as a function of gate voltage at the surface (uS) and in the middle of the channel (u0) (VDS = 0).
Threshold voltage [V]
0,7 Taur
0,6
tox=2nm
Shih & Wang Proposed model
0,5
ATLAS Simulation
0,4 0,3
Chen
0,2 0,1 0
10
Acknowledgement This work has been partly supported by Polish Ministry of Science and Higher Education under research project No. 515444933 and partly by the European Community’s Seventh Framework Programme (FP7/2007-2013) under grant Agreement No. 216171 – NANOSIL. References
Tsormpatzoglou
1
A new threshold definition is proposed stating that threshold takes place when the difference between surface potential and gate voltage is sufficiently high. The model of the threshold voltage based on this definition is simple and has only two fitting parameters. With constant values of these parameters it shows good agreement with the values extracted from the simulated characteristics in the range of device parameters (channel and gate-oxide thickness) interesting from the point of view of aggressive miniaturization. Its accuracy (the error does not exceed 10 percent) is superior to that of other models presented in the literature.
100
1000
Channel thickness [nm] Fig. 3. Threshold voltage as a function of channel thickness in comparison with other models.
ness is in quantitative agreement with the simulations, but the accuracy is the worst of all models over the whole range of tox. The model of Chen et al. [5] generally underestimates the value of threshold voltage and fails to saturate at thicker channels, moreover, it does not take into account the dependence of VT on dielectric thickness. The model of Shih and Wang [7] is in qualitative agreement with the simulation results both in terms of tSi and tox dependence, but overestimates the values of threshold voltage. The model presented in [8] is quite good for all investigated gate oxides and thin channels, but fails completely for thicker tSi. The model presented in this paper offers the best accuracy over the whole range of the considered channel and gate-oxide thicknesses and its error does not exceed 10 percent.
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