On Simulated Annealing in EDA
On Simulated Annealing in EDA A tribute to Prof. C. L. Liu at ISPD‐2012
Martin D.F. Wong Department of Electrical and Computer Engineering University of Illinois at Urbana‐Champaign
1
ICCAD Panel on Simulated Annealing
1987 ICCAD Panel: “Is Simulated Annealing Practical for CAD?”
2
SA Research in Liu’s Group
1988 3
Preface of the Book
“We hope that our experiences with the techniques we employed, some of which indeed bear certain similarities for different problems, could be useful as hints and guides for other researchers in applying the method To the solutions of other problems.”
4
Studied Many Problems
Channel Routing
Pin Assignment
Gate Matrix Layout
ICCAD‐85
ICCD‐85, INTEGRATION‐87
ICCAD‐86
PLA Folding
Floorplan Design
Array Optimization
CICC‐85,JSSC‐87
DAC‐86,ICCAD‐87
DAC‐87 5
DAC‐86 6
DAC‐86
7
Methodology • Significant reduction in solution space size • Keep optimal solutions
8
Methodology Solution space partitioning: S = S1 + S2 + … + Sn Each Sk is a tractable optimization problem min S = min { x1, x2, …, xn } where xk = min Sk New solution space S’ = { x1, x2, …, xn } = { S1 , S2 , … , Sn } • Encoding for { S1 , S2 , … , Sn }
• • • •
x1 x2
9
PLA Folding
PLA
simple folding
multiple folding
10
PLA Folding
Solution Space = Row Permutations
maximum matching
simple folding
11
Array Optimization
Row Permutations + Column Permutations + 2D Compactions
12
Array Optimization
Solution Space =
, , 13
Floorplan Design Pack modules on a rectangular chip to optimize total area, interconnect cost and other performance measure. Module: – Hard modules – Soft modules
Connectivity: A
B
A C
10 C
1
B D
5 2
D
14
Algorithm * +
+ 1
7
*
5 2
2
3 4
Slicing Floorplan
1
3
+
6
4
* 5
6
7
Slicing Tree 23*1+45+67*+* Polish Expression 15
Algorithm
16
Algorithm
17
How good are slicing floorplans?
18
Results for Soft Blocks Experimental results => slicing is good for soft modules
Circuit
No. of Modules
runtime(s)
deadspace(%)
apte xerox hp ami33 ami49
9 10 11 33 49
0.31 0.38 0.45 3.22 6.93
0.74 0 0 0.01 0.13
*all modules have aspect ratio between 0.5 and 2
19
Results for Hard Blocks
13 8
• Excellent results by slicing for the largest MCNC benchmarks (Cheng, Deng, Wong, ASPDAC 2005)
5
49 1
48
19 36
6
3 34
39
10 44
27
16 21 31 26 17
30 4
41 22 14 15
33
32 47 25 11 37
7 29
28 45
429
38 43
46 2
35 18 23
24 40
12 20
20
Results on Large Benchmarks • Yan and Chu, DAC‐2008 • Slicing approach produced best results on GSRC & HB large benchmarks
21
Theoretical Analysis Theorem [Young and Wong ISPD‐97] Given a set of soft blocks of total area Atotal , maximum area Amax and shape flexibility r 2, there exists a slicing floorplan F of these blocks such that:
1 5 area ( F ) min ( 1 ), , ( 1 ) Atotal r 4 where
2 Amax rAtotal 22
Can we do better? Conjecture: For each non‐slicing floorplan, there exists a slicing floorplan with “similar” area and topology.
Are slicing floorplans dense ?
slicing floorplan
23
Wheel Floorplans with Squared Blocks Lemma Given any wheel floorplan with 5 squared blocks, there is a “neighboring” slicing floorplan with equal/smaller area. • It is not possible that x1 > x2 and x2 > x3 and x3 > x4 and x4 > x1. Otherwise, x1 > x1! • We may assume x1 ≤ x2. It is easy to see that there is a “neighboring” slicing floorplan which is smaller!
24
Tightly Packed Wheel Floorplans • Tightly packed wheel floorplans – 5 blocks: A, B, C and D identical, E is a square – 0
Martin D.F. Wong Department of Electrical and Computer Engineering University of Illinois at Urbana‐Champaign
1
ICCAD Panel on Simulated Annealing
1987 ICCAD Panel: “Is Simulated Annealing Practical for CAD?”
2
SA Research in Liu’s Group
1988 3
Preface of the Book
“We hope that our experiences with the techniques we employed, some of which indeed bear certain similarities for different problems, could be useful as hints and guides for other researchers in applying the method To the solutions of other problems.”
4
Studied Many Problems
Channel Routing
Pin Assignment
Gate Matrix Layout
ICCAD‐85
ICCD‐85, INTEGRATION‐87
ICCAD‐86
PLA Folding
Floorplan Design
Array Optimization
CICC‐85,JSSC‐87
DAC‐86,ICCAD‐87
DAC‐87 5
DAC‐86 6
DAC‐86
7
Methodology • Significant reduction in solution space size • Keep optimal solutions
8
Methodology Solution space partitioning: S = S1 + S2 + … + Sn Each Sk is a tractable optimization problem min S = min { x1, x2, …, xn } where xk = min Sk New solution space S’ = { x1, x2, …, xn } = { S1 , S2 , … , Sn } • Encoding for { S1 , S2 , … , Sn }
• • • •
x1 x2
9
PLA Folding
PLA
simple folding
multiple folding
10
PLA Folding
Solution Space = Row Permutations
maximum matching
simple folding
11
Array Optimization
Row Permutations + Column Permutations + 2D Compactions
12
Array Optimization
Solution Space =
, , 13
Floorplan Design Pack modules on a rectangular chip to optimize total area, interconnect cost and other performance measure. Module: – Hard modules – Soft modules
Connectivity: A
B
A C
10 C
1
B D
5 2
D
14
Algorithm * +
+ 1
7
*
5 2
2
3 4
Slicing Floorplan
1
3
+
6
4
* 5
6
7
Slicing Tree 23*1+45+67*+* Polish Expression 15
Algorithm
16
Algorithm
17
How good are slicing floorplans?
18
Results for Soft Blocks Experimental results => slicing is good for soft modules
Circuit
No. of Modules
runtime(s)
deadspace(%)
apte xerox hp ami33 ami49
9 10 11 33 49
0.31 0.38 0.45 3.22 6.93
0.74 0 0 0.01 0.13
*all modules have aspect ratio between 0.5 and 2
19
Results for Hard Blocks
13 8
• Excellent results by slicing for the largest MCNC benchmarks (Cheng, Deng, Wong, ASPDAC 2005)
5
49 1
48
19 36
6
3 34
39
10 44
27
16 21 31 26 17
30 4
41 22 14 15
33
32 47 25 11 37
7 29
28 45
429
38 43
46 2
35 18 23
24 40
12 20
20
Results on Large Benchmarks • Yan and Chu, DAC‐2008 • Slicing approach produced best results on GSRC & HB large benchmarks
21
Theoretical Analysis Theorem [Young and Wong ISPD‐97] Given a set of soft blocks of total area Atotal , maximum area Amax and shape flexibility r 2, there exists a slicing floorplan F of these blocks such that:
1 5 area ( F ) min ( 1 ), , ( 1 ) Atotal r 4 where
2 Amax rAtotal 22
Can we do better? Conjecture: For each non‐slicing floorplan, there exists a slicing floorplan with “similar” area and topology.
Are slicing floorplans dense ?
slicing floorplan
23
Wheel Floorplans with Squared Blocks Lemma Given any wheel floorplan with 5 squared blocks, there is a “neighboring” slicing floorplan with equal/smaller area. • It is not possible that x1 > x2 and x2 > x3 and x3 > x4 and x4 > x1. Otherwise, x1 > x1! • We may assume x1 ≤ x2. It is easy to see that there is a “neighboring” slicing floorplan which is smaller!
24
Tightly Packed Wheel Floorplans • Tightly packed wheel floorplans – 5 blocks: A, B, C and D identical, E is a square – 0
