Power Droop Testing
FIPS – TestWorkshop
Power Droop Testing
2005 Alejandro Czutro ALBERT-LUDWIGS¨ FREIBURG UNIVERSITAT ¨ RECHNERARCHITEKTUR LEHRSTUHL FUR
Overview • Power Droop Introduction Simplified View of the Power Grid What is Power Droop? Goal of Testing
• Approach for Non-Electrical Testing The Fault Model The Testing Procedure Thus required
• Test Pattern Generation A Heuristic for large m and n values Priority Rule for Justification
• Further Work Alejandro Czutro – Power Droop Testing
Overview – 2
as performance limiter and develop a fault model to address the problem of vector generation for delay faults arising out of power delivery problems. A fault extraction methodology applied to a microprocessor design block is explained.
Power Droop
Introduction
Instantaneous switching power supply voltage, w neous drop in power sup excessive delay and a sp is to create excessive ranging from none to ve ates a speed-path.
law for almost a quarter century. Miniaturization of deallowed • Voltage scalesvice bysize a has factor of more 0.8.transistors to be packed into an area while the improved transistor performance has resulted significantconsumption increase in frequency. • 225% increase in in current per area unit.
Watts/cm 2
1000
100
Pentium IV ® Pentium III ® Pentium II ® Pentium Pro ®
10
Delay Sensitivity (%change due to %change in V)
• Power density of modern high-end microprocessors has been increas1. Introduction Semiconductor industry has been driven by Moore’s per technology generation. ing by about 80% 9% 7% 5% 3% 1% 0.8
Pentium ® i386
i486
Figure 2 Del
1 1.5µ 1µ 0.7µ 0.5µ 0.35µ0.25µ0.18µ 0.13µ 0.1µ 0.07µ Alejandro Czutro – Power Droop Testing
Figure 1 Power density by technology
Power supply volta shows delay sensitivity a Power Droop – 3 90nm technology. Sensit
Simplified View of the Power Grid
VDD
GND VDD
GND
upper metal layer: connection to power source and to ground
vertical vias: Currents and voltages can be analysed at the vias.
lower metal layer: VDD and GND terminals of transistors are connected to these lines.
Alejandro Czutro – Power Droop Testing
Power Droop – 4
What is Power Droop? • non-uniform power consumption across power grid ⇒ non-uniform voltage drop • simultaneous switching of transistors connected to the same power distribution point ⇒ localised drop of power supply voltage (called power droop) possible • Voltage drop at the via slows down the switching of transistors connected to it. ⇒ behaviour of STF/STR transition faults • considering victim nodes with short switching times: Any additional delay may cause path delay problems.
Goal of Testing Localisation of nodes likely to have the described problem. How? Origination of excessive switching around nodes with short switching times. Alejandro Czutro – Power Droop Testing
Power Droop – 5
Approach for Non-Electrical Testing The Fault Model Given a victim node, choose a set of neighbour lines to observe. neighbour lines
other (probably unrelated) lines
victim line: has got STR/STF fault
Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 6
The Testing Procedure Test’s first part: Induce very low switching activity in the circuit. Test’s second part: Induce very high switching activity in the circuit. Test’s third part: Induce several on victim and neighbour lines.
simultaneous
equal
transitions
Finally: Propagate the error that may have been induced on the victim line to an output.
Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 7
The Testing Procedure Test’s first part: Induce very low switching activity in the circuit. Test’s second part: Induce very high switching activity in the circuit. Test’s third part: Induce several on victim and neighbour lines.
simultaneous
equal
transitions
Finally: Propagate the error that may have been induced on the victim line to an output.
Thus required A pattern sequence of length m + n: high activity part }| { h2 h3 hn−1 vw w 1 ll2 2 ll3 3 .. .. .. llm−1 m−1 h 2h 3 .. .. .. h n−1 v ll1 h11 h |{z} | {z } * low activity part
z
* Test Pair: simultaneous transitions + error propagation Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 7
Test Pattern Generation Unfold the circuit m + n times with some additional constraints.
and
perform
sequential
ATPG
Consider, for example, this circuit in which we test the victim cell’s rising transition:
Alejandro Czutro – Power Droop Testing
Test Pattern Generation – 8
Test Pattern Generation Unfold the circuit m + n times with some additional constraints.
and
perform
sequential
ATPG
Consider, for example, this circuit in which we test the victim cell’s rising transition:
Our task is mainly reduced to solving the following propagation/ justification problem:
1
1
1
1
0
Alejandro Czutro – Power Droop Testing
0
1
1
0
0
1
D
Test Pattern Generation – 8
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
i
k
j
Time frame m+n−1
k
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
i
k
j
Time frame m+n−1
k
D
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
k
i
k
k
1 D 0
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
i
i
1 k
k
k
k
k
1 D 0
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
i
i
1 1 k
k
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
1 D 0
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
k
0
1
1 0
1 D
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
i
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
i
0
0
1
1
1 0
1 D
k
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
i
0
0
1
0 1
1 0
1 D
k
1
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
Priority Rule for Justification When deciding which line to assign a value first, always prefer the line in the later time frame.
0 Time frame i−1
Alejandro Czutro – Power Droop Testing
Time frame i
Test Pattern Generation – 10
Priority Rule for Justification When deciding which line to assign a value first, always prefer the line in the later time frame.
‘‘Same signal’’
0 Time frame i−1
Alejandro Czutro – Power Droop Testing
0 Time frame i
Test Pattern Generation – 10
Further Work • Implement sequential circuit unfolding. • Implement ATPG taking into account the mentioned rules. • Run experiments on ISCAS 89 benchmarks for different m and n values. • Work on efficiency.
. Alejandro Czutro – Power Droop Testing
Typesetting with pdfTEX Further Work – 11
Power Droop Testing
2005 Alejandro Czutro ALBERT-LUDWIGS¨ FREIBURG UNIVERSITAT ¨ RECHNERARCHITEKTUR LEHRSTUHL FUR
Overview • Power Droop Introduction Simplified View of the Power Grid What is Power Droop? Goal of Testing
• Approach for Non-Electrical Testing The Fault Model The Testing Procedure Thus required
• Test Pattern Generation A Heuristic for large m and n values Priority Rule for Justification
• Further Work Alejandro Czutro – Power Droop Testing
Overview – 2
as performance limiter and develop a fault model to address the problem of vector generation for delay faults arising out of power delivery problems. A fault extraction methodology applied to a microprocessor design block is explained.
Power Droop
Introduction
Instantaneous switching power supply voltage, w neous drop in power sup excessive delay and a sp is to create excessive ranging from none to ve ates a speed-path.
law for almost a quarter century. Miniaturization of deallowed • Voltage scalesvice bysize a has factor of more 0.8.transistors to be packed into an area while the improved transistor performance has resulted significantconsumption increase in frequency. • 225% increase in in current per area unit.
Watts/cm 2
1000
100
Pentium IV ® Pentium III ® Pentium II ® Pentium Pro ®
10
Delay Sensitivity (%change due to %change in V)
• Power density of modern high-end microprocessors has been increas1. Introduction Semiconductor industry has been driven by Moore’s per technology generation. ing by about 80% 9% 7% 5% 3% 1% 0.8
Pentium ® i386
i486
Figure 2 Del
1 1.5µ 1µ 0.7µ 0.5µ 0.35µ0.25µ0.18µ 0.13µ 0.1µ 0.07µ Alejandro Czutro – Power Droop Testing
Figure 1 Power density by technology
Power supply volta shows delay sensitivity a Power Droop – 3 90nm technology. Sensit
Simplified View of the Power Grid
VDD
GND VDD
GND
upper metal layer: connection to power source and to ground
vertical vias: Currents and voltages can be analysed at the vias.
lower metal layer: VDD and GND terminals of transistors are connected to these lines.
Alejandro Czutro – Power Droop Testing
Power Droop – 4
What is Power Droop? • non-uniform power consumption across power grid ⇒ non-uniform voltage drop • simultaneous switching of transistors connected to the same power distribution point ⇒ localised drop of power supply voltage (called power droop) possible • Voltage drop at the via slows down the switching of transistors connected to it. ⇒ behaviour of STF/STR transition faults • considering victim nodes with short switching times: Any additional delay may cause path delay problems.
Goal of Testing Localisation of nodes likely to have the described problem. How? Origination of excessive switching around nodes with short switching times. Alejandro Czutro – Power Droop Testing
Power Droop – 5
Approach for Non-Electrical Testing The Fault Model Given a victim node, choose a set of neighbour lines to observe. neighbour lines
other (probably unrelated) lines
victim line: has got STR/STF fault
Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 6
The Testing Procedure Test’s first part: Induce very low switching activity in the circuit. Test’s second part: Induce very high switching activity in the circuit. Test’s third part: Induce several on victim and neighbour lines.
simultaneous
equal
transitions
Finally: Propagate the error that may have been induced on the victim line to an output.
Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 7
The Testing Procedure Test’s first part: Induce very low switching activity in the circuit. Test’s second part: Induce very high switching activity in the circuit. Test’s third part: Induce several on victim and neighbour lines.
simultaneous
equal
transitions
Finally: Propagate the error that may have been induced on the victim line to an output.
Thus required A pattern sequence of length m + n: high activity part }| { h2 h3 hn−1 vw w 1 ll2 2 ll3 3 .. .. .. llm−1 m−1 h 2h 3 .. .. .. h n−1 v ll1 h11 h |{z} | {z } * low activity part
z
* Test Pair: simultaneous transitions + error propagation Alejandro Czutro – Power Droop Testing
Approach for Non-Electrical Testing – 7
Test Pattern Generation Unfold the circuit m + n times with some additional constraints.
and
perform
sequential
ATPG
Consider, for example, this circuit in which we test the victim cell’s rising transition:
Alejandro Czutro – Power Droop Testing
Test Pattern Generation – 8
Test Pattern Generation Unfold the circuit m + n times with some additional constraints.
and
perform
sequential
ATPG
Consider, for example, this circuit in which we test the victim cell’s rising transition:
Our task is mainly reduced to solving the following propagation/ justification problem:
1
1
1
1
0
Alejandro Czutro – Power Droop Testing
0
1
1
0
0
1
D
Test Pattern Generation – 8
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
i
k
j
Time frame m+n−1
k
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
i
k
j
Time frame m+n−1
k
D
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
k
i
k
k
1 D 0
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
i
i
1 k
k
k
k
k
1 D 0
j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
i
i
1 1 k
k
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
1 D 0
j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
k
k
0
1
1 0
1 D
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
i
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
i
0
0
1
1
1 0
1 D
k
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
A Heuristic for large m and n values • Concentrate on the last time frame first and run the propagation algorithm. • Then concentrate on the last two time frames and run the justification algorithm. • Repeat the justification algorithm on the two previous time frames. • Go on like this until all time frames have been processed.
i
k
i
i
0
0
1
0 1
1 0
1 D
k
1
k
k
0 j
Time frame m+n−2 Alejandro Czutro – Power Droop Testing
k
0 j
Time frame m+n−1
j
Time frame m+n Test Pattern Generation – 9
Priority Rule for Justification When deciding which line to assign a value first, always prefer the line in the later time frame.
0 Time frame i−1
Alejandro Czutro – Power Droop Testing
Time frame i
Test Pattern Generation – 10
Priority Rule for Justification When deciding which line to assign a value first, always prefer the line in the later time frame.
‘‘Same signal’’
0 Time frame i−1
Alejandro Czutro – Power Droop Testing
0 Time frame i
Test Pattern Generation – 10
Further Work • Implement sequential circuit unfolding. • Implement ATPG taking into account the mentioned rules. • Run experiments on ISCAS 89 benchmarks for different m and n values. • Work on efficiency.
. Alejandro Czutro – Power Droop Testing
Typesetting with pdfTEX Further Work – 11
