SiSMA—A Tool for Efficient Analysis of Analog CMOS Integrated ...

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SiSMA—A Tool for Efficient Analysis of Analog CMOS Integrated Circuits Affected by Device Mismatch Giorgio Biagetti, Simone Orcioni, Claudio Turchetti, Member, IEEE, Paolo Crippa, Member, IEEE, and Michele Alessandrini

Abstract—In this paper a simulator for the statistical analysis of analog CMOS integrated circuits affected by technological tolerance effects, including device mismatch, is presented. The tool, able to perform dc, ac, and transient analyses, is based on a rigorous formulation of circuit equations starting from the modified nodal analysis and including random current sources to take into account technological tolerances. Statistical simulation of specific circuits shows that the simulator requires a simulation time several orders of magnitude lower than that required by Monte Carlo analysis, while ensuring a good accuracy. Index Terms—Device mismatch, metal–oxide–semiconductor integrated circuits (MOS ICs), modified nodal analysis (MNA), non-Monte Carlo analysis, statistical circuit analysis, stochastic simulation.

I. INTRODUCTION

T

HE microelectronics markets continuously demand highperformance integrated circuits (ICs) with higher level of integration in order to minimize the cost, reduce the size, and decrease the power consumption. High-performance analog, digital, and mixed-signal ICs are currently utilizing submicrometer fabrication processes. Unfortunately, the scaling of feature size has progressed more rapidly than the scaling of process tolerances, so that submicrometer devices exhibit greater performance variations compared to those in older technologies. Device mismatch is one of the most critical effects of technological tolerances occurring in the production of CMOS ICs, and it is becoming a limiting factor for high-performance circuits as device size continues to scale down into the submicrometer realm. In particular, the dependence of parameters of identical devices on their positions in the die is responsible for the performances spreading of circuits requiring an accurate device matching to work properly [1]–[8]. Well-known examples of such circuits are digital-to-analog and analog-to-digital converters, as well as phase-locked-loops, mixers, VCOs, band-gap references, sense-amplifiers, and so on. More specifically, highManuscript received November 28, 2002; revised April 4, 2003. This paper was presented in part at the IEEE/ACM International Conference on Computer Aided Design (ICCAD), San Jose, CA, November 2002. This paper was recommended by Associate Editor S. Saxena. The authors are with the Dipartimento di Elettronica, Intelligenza Artificiale e Telecomunicazioni, Università Politecnica delle Marche, I-60131 Ancona, Italy (e-mail: [email protected]). Digital Object Identifier 10.1109/TCAD.2003.822131

accuracy current steering digital-to-analog converters (DACs) are based on an array of matched current cells organized in unary-encoded or binary-weighted elements that are steered to the DAC output depending on the digital input code. The limitations of these architectures in terms of accuracy and linearity depend on device mismatch, and it is of central importance to predict their statistical behavior in the design stage in order to optimize the performance. Although mismatch effect has been thoroughly studied (several models have been suggested by many authors [9]–[16] and some CAD tools have been proposed [17], [18]), at present statistical circuit simulation, i.e., simulation predicting the statistical behavior of a circuit, is not currently employed in the design flow of analog CMOS ICs. Monte Carlo (MC) analysis is a widespread approach for statistical analysis of circuits affected by technological tolerances. However, an MC simulation requires hundreds or thousands of SPICE simulations, so this method is viable just for very simple, but not actual, circuits. Other approaches, such as response surface methodology (RSM), are able to perform much faster than MC at the expense of a design of experiments (DoE) preprocessing stage [19], [20]. The aim of this paper is to suggest a “direct” approach to statistical simulation, based on solving the equations (necessarily stochastic) which describe the statistical behavior of the circuit, rather than estimating it by a population of realizations as done in MC-like methods. This approach is particularly suitable to be part of the ICs design flow, as it reduces the simulation cost and makes the designer free of any expertise on statistical treatment of circuits. In this paper we present the SiSMA (Simulator for Statistical Mismatch Analysis) tool for statistical simulation of MOS ICs using a non-MC approach. This tool is able to perform an efficient and detailed analysis of analog CMOS circuits whose devices are affected by spatial parametric variations due to nonuniformities in the manufacturing process. The tool has been developed starting from the modified nodal analysis (MNA) [21] and including random current sources to take into account technological tolerances, thus giving rise to a stochastic modified nodal analysis (SMNA) in which a circuit is described by a set of stochastic differential equations. Equations of such a kind cannot be treated as ordinary differential equations using well-known differential calculus; thus, an ad hoc method has to be developed. In the paper an approach based on the linearization is suggested to solve the equations

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BIAGETTI et al.: SiSMA—TOOL FOR EFFICIENT ANALYSIS OF ANALOG CMOS INTEGRATED CIRCUITS AFFECTED BY DEVICE MISMATCH

resulting from the SMNA. The proposed approach is able to compute first- and second-order moments (i.e., mean value and autocorrelation) of all the circuit outputs. Even if the first two moments are in general not sufficient to completely characterize the circuit statistics, they usually convey useful information to allow the designer to optimize the circuit. The method employed is an improved version of that presented in [22], with higher accuracy for transient analysis and a complete new engine for ac analysis. Some simulation examples show the ability of SiSMA to accurately predict statistical behavior of circuits affected by mismatch with a simulation time several orders of magnitude lower than that required by MC analysis. This paper is organized as follows. Section II describes the spatial stochastic model of active devices, together with a procedure to fit the model to experimental data. Section III gives a detailed explanation of the SMNA and presents the stochastic circuit equations. In Section IV the circuit equations are linearized and solved for the dc, transient, and ac analyses. Section V presents the computer-aided design (CAD) tool SiSMA for the statistical simulation of ICs, while Section VI shows the effectiveness of the tool when applied to specific circuits. Finally, Section VII concludes the work.

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matrix as derived by sampling in correspondence of two deand , not necessarily of the same kind, has been vices expressed as follows: (3) where is the expectation. Here the functions and are intended to take into account geometric factors specific to the devices and , respectively, while the function should be responsible for effects deriving from their relative positioning. Thus, the only requirement in defining the model as given by (3) is (2), is that the resulting relationship for able to fit the autocorrelation matrix derived from experimental data. Although (1)–(3) are general enough to develop a circuital equation formulation of ICs for statistical simulation, in this paper we will focus on a model which has been proved to be a good tradeoff between simplicity and accuracy in predicting mismatch effects [23], [24]. In the following subsection, such model will be briefly discussed, together with an outline of the fitting procedure. A. Stationary Model for the Random Component of Let us assume that the random term (2) may be written in the following form:

II. STOCHASTIC MODEL OF THE DRAIN CURRENT IN MOS TRANSISTORS We assume that tolerance effects can be modeled in a MOS transistor as an error source coupled in parallel with the nomis given by inal current , so that the total drain current (1) The nonrandom term represents the usual drain current, while the term gives rise to some random fluctuations around depending both on the device position in the wafer and the region of operation of the device as well as on its geometry. Deriving a stochastic model of the random component , which is able to predict the realizations (i.e., the experimental , is a very difficult task. However, in statistical data) of design, such an accurate description of is not required, since, in general, the statistical behavior of a circuit is well characterized by the correlation between electrical variables. up As a consequence, a model predicting the statistics of to the second-order moments is quite adequate for simulation purposes. Thus, with this consideration in mind, we assume that can be written in the following form:

(4) takes into account the operating region (being where a fitting parameter to be estimated from experimental data), takes into account the dependence on dimensions and of the device active area, and summarizes all the sources of error depending on device position across the can be considered as a spatial stochastic die. Therefore, process, while is a stochastic process not only dependent on but also on bias and device sizes. Note the coordinates that (4) is a simplified version of (2), and that, using in the vector of geometrical parameters information on position and size only, is not able to model the mismatch effects due to differences in orientation, shape, or such. Referring to a circuit with devices placed at different posources of error result; sitions in the die, for these thus, the element of the autocorrelation matrix random sources is given by

(2) where is a vector containing bias voltages, while is a vector containing geometry and position information. is assumed to be a deterministic function of bias, so that the random behavior is entirely due to the stochastic process , which can take into account every aspect of the layout, such as position, size, shape, and orientation of the devices. Without loss of generality, and according to (1), it may be stated that this process has zero mean value. If it has not, the effect of the mean value may easily be incorporated into . In order to maximize flexibility and to make the implementation of new models easier, the elements of the autocorrelation

Let us assume value. In this case

(5) is a stationary process with zero mean

and the covariance function of the coincides with the autocorrelation function process [25]. is the Gaussian function, namely, for An usual choice for a stationary process (6) where

, and are fitting parameters, and are distances between a pair of devices

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and along the and axes, respectively. Also, for the dependence upon dimensions, we adopt the form, inspired from Pelgrom’s model [10] (7) is an additional fitting parameter. where The model in (5)–(7) relates the autocorrelation matrix of error sources to bias conditions, device dimensions, and po, sitions on the die and depends on the parameters , which have to be estimated from measurements. The and details of the fitting procedure may be found in [23]. Since the cannot be directly derived from measureactual behavior of ments, as the sources of error are not observable, the paramein ters are obtained by fitting the autocorrelation function (6) to a covariance matrix derived from drain current measurements over an array of transistors, as follows. Defining a matrix as (8) we have (9) where is the covariance matrix of the measured drain the inverse of matrix current vector . By denoting with , (9) can readily be solved for obtaining a relationship that relates the covariance of the error source to the covariance of the current (10) III. THE STOCHASTIC MODIFIED NODAL ANALYSIS The modified nodal analysis is a method for the formulation of nonlinear circuit equations that is adopted by currently used circuit simulators, since it ensures a sufficient generality for large classes of circuits [21]. Here we wish to derive an improved version of MNA that is able to include random effects due to technological process variabilities of some devices, with particular attention to MOS transistors. having composite Let us consider a connected network nodes. Let the composite branches be labranches and beled consecutively from 1 to , and let the nodes be labeled from 0 to . Without loss of generality, let us choose node 0 as the reference or datum node, and call the voltages from the remaining nodes with respect to datum nodal voltages, or simply can be classinode voltages. Every branch of the network fied as a current-defined or voltage-defined branch. If and ( and ) are the branch-current and branch-voltage vectors of the current-defined ( voltage-defined) branches, respectively, the overall branch-current and branch-voltage vectors can be written as (11)

Fig. 1. Current-defined circuit branch (general scheme).

Fig. 2.

Current-defined circuit branch.

The general scheme of a current-defined branch, shown in Fig. 1, is made up of the following: • an independent current source ; ; • a controlled current source associated with the drain • a random source current in a MOS transistor and dependent on technological tolerances. The noise term depends on branch voltages, so it is capable of modeling technological tolerances of nonlinear resistors as well as transistors and in particular, being a function of the coordinates through the random variable , it is able to take into account a dependence on the position across the die, thus, preis dicting mismatch effects. By assuming the current source the sum of three components dependent on , and , respectively (the third term is assumed to be linearly dependent on without any restriction on currently used circuits), and the current is the current flowing into voltage-defined branches, the scheme of Fig. 2 results. These assumptions are in agreement with those adopted in the currently used simulators and suffice for a large variety of circuits. Under these assumptions, the current can be written as (12) Thus, the current vector of all current-defined branches be written in matrix form as

can (13)

where .. .

.. .

.. .

.. .

.. .

A. Current-Defined Branches A th branch is current-defined if its branch current is the sum of currents forced by either independent or dependent current sources.

.. .

.. .

..

.

.. .

(14)

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where .. .

.. .

Fig. 3.

.. .

Voltage-defined circuit branch (general scheme).

.. .

.. .

.. .

..

.

.. .

(17)

C. Formulation of the Circuit Equations The Kirchoff’s current law (KCL) applied to the network is given by (18) is the reduced incidence matrix where [26]. Combining (13) and (18) we obtain

Fig. 4. Voltage-defined circuit branch.

is a sparse matrix with nonzero elements in the rows that correspond to branches containing mismatch sources, and is a random vector accounting for device tolerances.

(19) and so that the By defining matrices components of the voltage vector can be written as

B. Voltage-Defined Branches A th branch is voltage defined if its branch voltage is the sum of voltages forced by either independent or dependent voltage sources, as depicted in the general scheme shown in Fig. 3. In this case no random sources have been considered, since the most significative sources of tolerances in a MOS IC are well modeled by (4). As above, referring to Fig. 4, we can assume is the sum of four components: an independent voltage source , a current-controlled voltage source , a voltage-controlled voltage source , and an inductive voltage proportional to . Thus, the voltage can be written as

(20) (21) (19) and (16) become

(22) (23) or in a compact form (24)

(15)

where, as in the current defined branch, the dependence on currents is limited to those (i.e., ) flowing in the voltage-defined branches. Therefore, the overall voltage vector can be written in matrix form as

(16)

where with

(25)

are nodal voltages (see is the vector of unknowns, and Appendix I). Equation (24) represents a system of nonlinear stochastic differential equations that lead to the MNA equations when the

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random sources are set to zero. Equations such as (24) cannot be treated as ordinary differential equations using well-known , differential calculus, because of the random term which models tolerance effects. Solving (24) means to determine the probability density funcat each time instant . Howtion (pdf) of the random vector ever, although the theory of stochastic differential equations is well established [27]–[29], to our knowledge neither analytical nor numerical methods exist to directly solve (24). It is worth noticing that the main difficulty in solving (24) is related to the nonlinearity which implies that the general solution is given by

completely characterize the process itself, it suffices to quantitatively measure the effects of random tolerances whenever the desired performance is directly related to a circuital voltage or current. As usually done in circuit simulation, in the following subsections we will distinguish dc, transient, and ac analyses, deriving an expression for the autocorrelation matrix for each of these.

(26)

where and are functions of the deterministic dc solution. Instead of solving (31) we derive the autocorrelation of the . Assuming that a solution of (31) exists for random variable every realization of the random variable implies that the matrix is invertible so that it results

where is a nonlinear function of . Thus, in order to make the problem manageable, we linearize (24) by first-order Taylor’s expansion, and then we assume the solution of such a linear equation as an approximation to the true solution. Although in general the two solutions are not identical, they are very close to each other provided that either: 1) the magnitude of the random term is sufficiently small to consider the equation as linear in the range of variability of or 2) the nonlinearities in (24) are so smooth that they might be considered as linear even for a wide range of . From an application point of view this hypothesis implies that this kind of approach is, in general, not suitable for simulating digital circuits, due to their inherent nonlinear behavior, while it is adequate for wide classes of analog circuits. IV. LINEARIZATION OF STOCHASTIC DIFFERENTIAL EQUATIONS of (24) can be written at each instant time The solution as the superimposition of the mean value and a random variable (27) Assuming that the random term is sufficiently small or the nonlinearities in (24) are not so abrupt, then (24) can be approx. Under this imated by first-order Taylor’s expansion around hypothesis it can be shown that (see Appendix I for details) (24) is equivalent to two equations: 1) a nonlinear deterministic equation (28) representing the usual nonlinear differential equation as is achieved by conderived by MNA, whose solution ventional device-level simulators; 2) a linear nondeterministic equation taking the form (29) with initial condition (30) representing the stochastic behavior of the circuit. In this paper we will restrict our interest in the first two moments of the solution. In particular, being a zero-mean random variable, will also have zero mean, so we will only consider its autocorrelation matrix. Even though, in general, this does not

A. DC Analysis In this case it results and the matrices depend on time ; thus, (29) becomes

and

do not (31)

(32) where (33) showing that is linearly dependent on . The autocorrelation of such a random variable can easily be derived from definition (34) B. Transient Analysis In order to solve (29) in the general case of dependent on time, recalling that does not depend on time, it is more convenient to rewrite it in the form (35) where

(36) and the initial condition becomes (37) , (35) describes a stochastic In terms of the new variable differential vector equation in which randomness enters only through initial condition. It must be noted that although the inican be arbitrarily chosen, as represents tial condition a stochastic process, this corresponds to establishing the statistical properties of such a process; thus, at least the autocorrehas to be specified. However, at design stage lation the only functhis function is in general unknown being tion which can be estimated from measured data on a test pattern as discussed in Section II. With this consideration in mind, this problem can be easily solved by assuming that the initial coincides with a dc solution. In this way (34) condition provided is known. It is can be used to determine worth noticing that this assumption does not restrict at all the validity of the transient analysis of a network , since, in general,

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any given initial condition can be achieved by adding a specific forcing the dc solution to match the circuit to the network desired initial conditions. Thus, we proceed in the solution of is given by (32), which means that (35) assuming that (38) Due to linearity of (35) the solution at any time can be put in the form (39) where dition

represents a linear operator acting on the initial con. Combining (39) with (38) gives (40)

where of

is a matrix to be determined. The th column can be derived from (40) by assuming the realization in which the only 1 corresponds to the th component; thus, it results (41)

Once the matrix has been obtained, it is straightforward to at any time as derive the autocorrelation (42) C. AC Analysis Let us assume that the branch voltage vector the dc component and the ac component

is the sum of (43)

moreover, both of the components can be written as the sum of a deterministic and a stochastic term. The sinusoidal can be written in the phasor notation component (44) and in the same manner the stochastic ac currents becomes (45) represent the deterministic terms while where are random. Assuming the ac components as small variations around the dc component, (22) and (23) can be linearized by first-order Taylor’s expansion, giving the stochastic linear equation (46) (See Appendix II for the detailed derivation and definition of matrices , and ). Equation (46) is an algebraic equation which can be easily solved by putting (47) so that (48) The ac-solution autocorrelation matrix then becomes (49) To summarize, (34), (42), and (49) give explicit solutions for the autocorrelation matrices of the random term , in the case

Fig. 5. Block diagram showing data flow in SiSMA simulator.

of dc, transient and ac analysis, respectively. Since represents the random component of the vector , which includes all the independent voltages and currents of the network, its autocorrelation matrix gives a description of the amount of their variations. Although in general these matrices do not completely characterize the statistical behavior of the circuit, they usually suffice to allow the designer to optimize the circuit with regard to statistical variations. A good example of such an approach is reported in [24], where in designing high-performance current-steering DACs, the geometries and the relative positions of the devices have been chosen in order to minimize the variance of the performance. Finally, it is interesting to note that the solutions (34), (42), and (49) to the dc, transient, and ac analyses depend on the au. However, since no assumptions have tocorrelation matrix for their derivation, we conclude that the been made on . The Gaussian model SMNA is independent on the form of used in this work has been proven to be very successful [23], [24] in fitting the actual autocorrelation function derived from experimental data, even though any other more accurate model can be used. V. STATISTICAL SIMULATION OF ICS: THE TOOL SiSMA On the basis of the theory previously developed, the tool SiSMA implementing the SMNA has been developed [30]. It also contains the stochastic model of MOSFETs described in Section II, among the stochastic models of other devices. The operation of the tool is sketched in Fig. 5. It uses a standard simulator (such as SPICE or any other device-level simulator) to calculate the deterministic solution and the differential parameters at every point of interest. Using these data SiSMA is able to perform a statistical circuit simulation evaluating all the desired elements of the autocorrelation matrices , and for dc, transient, and ac analyses, respectively. It is, thus, possible for the designer to use these information during the circuit optimization to refine device sizing and placement, or to compare the relative benefits of different architectures. Moreover, the tool is also able to compute all the crosscorrelations between any electrical quantity and any stochastic source, for all the analyses it performs. This makes it possible for the designer to find out the devices that most affect

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a particular performance, so that design efforts can be addressed to the most critical section of the circuit. In order to be able to perform a statistical simulation, the simulator requires, in addition to a netlist description of the circuit written in the language of currently used simulators such as SPICE or Spectre, some supplementary information on the circuit geometries and on extra stochastic parameters describing the random current sources. The geometric information may be readily obtained by a layout view of the circuit available in standard CAD tools, and automatically adapted to SiSMA usage, or may be entered by the user should the layout not be available at the current design stage. The stochastic parameters are related to a specific technology, and may be easily extracted as pointed out in Section II. During the reading stage of the input code, SiSMA generates a symbolic description of the linearized circuit, in which every nonlinear element is substituted by a companion linear model. The parameters of such a model are derived either from the netlist itself or from the output of the conventional simulator. Besides, at the same stage the random sources are introduced as elements of the subcircuits defined in the linear model, and the geometric information and stochastic parameters needed to are gathered. compute Once this stage has been completed, the program checks if some deterministic constraints apply to the nodes of the circuit, as in the case of a deterministic signal source in which the node voltages are fully correlated, for instance. When this occurs, the resulting symbolic description is optimized so that the number of unknowns is reduced. At the end of the above steps, all the necessary parameters for the statistical simulation are available. These parameters, together with the output of the conventional simulator, enable SiSMA to solve either the stochastic linear differential equations describing the circuit during transient analysis, by means of a stochastic ordinary differential equations (SODE) solver, or the stochastic algebraic system describing the circuit during other analyses. The solvers implement numerical algorithms for solving (34), (42), and (49), namely the equations that describe stochastic dc, transient, and ac analyses, respectively.

TABLE I PARAMETERS VALUES FOR THE AUTOCORRELATION FUNCTION THE RANDOM CURRENT SOURCES

R

OF

Fig. 6. Schematic of the current-mode band-gap reference circuit.

VI. APPLICATION EXAMPLES Three examples of statistical circuit simulation as performed by the tool SiSMA are presented and discussed in this section. All these simulations make use of the model given by (6)–(7) for the autocorrelation function of the random current sources, with the fitting parameters listed in Table I. The device positions of the autocorrelation maneeded to evaluate the terms have been derived from the circuit layout designed with trix Cadence Virtuoso. A. Low Voltage CMOS Band-Gap Reference Circuit As a first example of statistical dc analysis, the current-mode band-gap reference circuit [31], shown in Fig. 6, has been analyzed at different temperatures. It is essentially made up of three matched current sources Mpa Mpb, and Mpc, two temperature-sensitive branches connected to nodes a and b, the operational amplifier shown in Fig. 7, and the startup circuit built with transistors M0s Mns Mps, and Mls.

Fig. 7.

Schematic of the op-amp employed in the band-gap reference circuit.

The operational amplifier uses two differential gain stages (upper portion of Fig. 7), and a biasing circuit (lower portion) specifically designed for low-voltage operation and temperature stability. The circuit has been designed so that the current–voltage (I–V) characteristics of the two temperature-sensitive branches intersect each other at a nominal current of about 4 A, making the temperature coefficient close to zero. Thus, disregarding tolerance effects on diodes and resistors, the precision of the reference voltage is related to the actual matching of the current sources and to the operation of the amplifier. Fig. 8 shows the results of a SiSMA simulation: the solid line is the deterministic solution with no random sources as obtained

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Fig. 8. Output voltage of the band-gap reference circuit, and its standard deviation, versus temperature. Lines are SiSMA simulations, diamonds are MC simulations.

Fig. 9. Relative standard deviation of the band-gap reference voltage versus temperature.

by Spectre, while the dashed lines represent visually the standard deviation around the nominal solution. In the same figure, dots show the result of an MC simulation; as you can see, both the mean value and the standard deviation are very close to the results predicted by SiSMA. The same result can be seen in Fig. 9, which shows the relative standard deviation of the voltage as a function of temperature. It is worth noting that each point of MC analysis has been obtained through 5000 Spectre simulations, with a simulation time three orders of magnitude greater than that required by SiSMA simulation.

In order to validate the linear approximation assumption for solving (22) and (23), the solution of such equations for this circuit has been derived as a function of the mismatch parameter . Fig. 10 shows the output voltage versus for three MOS transistors. As you can see, the behavior of the solution around the origin is almost linear, thus well justifying the linear assumption. B. CMOS Charge Pump Circuit The second circuit simulated with SiSMA is the CMOS charge pump shown in Fig. 11. The circuit has been chosen as

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Fig. 10. Output voltage at T = 80 C versus mismatch parameter  of selected MOSFETs of the band-gap reference circuit.

Fig. 11.

Schematic of the charge pump circuit.

an example of device mismatch affecting transient behavior. The charge pump is intended to be used in a phase-locked-loop (PLL), to charge and to discharge the capacitance C0 of a loop filter when driven by a phase detector (PD). The circuit is made up of a bias circuit, shown on the left, two current sources Mp1 and Mn1, four CMOS pass-transistor switches, a differential amplifier driven by the digital output of the PD, and a forcing circuit to set the dc solution, composed by Mdc, V0 Vp [32]. In order to evaluate the effect of device mismatch, the analysis has been restricted to the case of Up and Down signals with no phase difference. In this case, if the charging and discharging

currents supplied by Mp1 and Mn1, respectively, are of equal magnitude, provided the two transistors are perfectly matched, the voltage across C0 remains constant at its initial value. Fig. 12 shows the results of the simulation with an initial voltage of 1.65 V across C0. Continuous line represents the nominal simulation with no tolerance random sources. Although the transistors Mp1 and Mn1, as well as the differential couple Mnd and Mnu, are perfectly matched, the output voltage shows a dependence on input signals due to the input-output capacitive coupling. In the same figure the dashed lines above and below the continuous line are obtained by adding and subtracting at of the output each instant of time the standard deviation voltage, as obtained from statistical simulation with SiSMA. Additionally Fig. 13 reports the relative standard deviation of the output voltage as a function of time. As you can see, due to the mismatch, the voltage across the capacitor shows a variance that increases with time, since the circuit acts as an integrator on the current error. In the same figure, dots represent the result of an MC simulation. Fig. 14 shows the relative error between SiSMA and MC on a larger time scale. As a main result, SiSMA is able to predict the statistical behavior of the circuit with an initial error less than 20%, with a simulation time nearly two orders of magnitude lower than that required by MC analysis. The fact that the discrepancy decreases with time may be due to the strong nonlinear behavior which occurs near the startup of the pump, when the setup circuit is being disconnected. The linear assumption has been checked too. The output voltage as a function of , reported in Fig. 15, clearly shows an almost linear behavior around the origin. C. Capacitance Multiplier Circuit The last example is a circuit known as capacitance multiplier, a circuit commonly used to compensate amplifiers [33],

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Fig. 12.

Charge pump filtered output voltage (solid line), and its standard deviation (dashed lines above and below) as obtained by SiSMA as a function of time.

Fig. 13.

Relative standard deviation of charge-pump output voltage as a function of time.

in which an integrated capacitor is multiplied by a controlled factor, namely the gain of a current mirror. The circuit is shown in Fig. 16, and has been selected as an example of device mismatch affecting ac behavior, in particular, the magnitude of the has been taken into consideration. output voltage Fig. 17 shows the results of simulations. Continuous line represents the relative standard deviation with respect to the nominal solution as obtained by SiSMA. In the same figure, the dotted line shows the MC simulation results, that are very close to the results predicted by SiSMA simulation.

D. Accuracy and Speedup of SiSMA For the circuits discussed above the SiSMA simulations have been compared to MC analyses, to show the accuracy and speedup one can get from direct statistical simulation. With regard to accuracy, even though MC analysis ensures the best performance, the estimated error varies with the number of iterations and approaches to zero only when such a number tends to infinity. As a consequence the accuracy cannot be univocally determined, since, in principle, it would require infinite

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Fig. 14. Relative error between SiSMA-computed and MC-computed relative standard deviations of charge-pump output voltage as a function of time, synchronously subsampled at the middle of Up pulses.

Fig. 15.

Fig. 16.

Output voltage at t = 81 ns versus mismatch parameter  of selected MOSFETs of the charge pump circuit.

Schematic of the capacitance multiplier circuit.

simulations. Here, in order to give an unambiguous definition of accuracy, we refer, as a “true” solution, to an MC simulation

achieved with a number of iterations as large as to ensure the stability of solution. In all the simulations performed, 5000 iterations have sufficed for this purpose and the error so obtained has been taken as a reference. Fig. 18 depicts the convergence rate of MC analysis for the circuits previously described, in terms of the relative root mean square error (relative RMSE) of relative standard deviation as a function of the iteration number, where the solution corresponding to 5000 MC iterations has been taken as the reference for the evaluation of the error at each iteration. With regard to speedup performance, we assume that the time required by an MC analysis corresponds to a number of itera-

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Fig. 17.

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Relative standard deviation, in module, of the output voltage versus frequency for the capacitance multiplier.

Fig. 18. Convergence of MC analyses of the band-gap reference (solid line), charge pump (broken line), and capacitance multiplier (dotted line) as functions of the number of iterations: estimated relative RMSE of the relative standard deviation.

tions such that the solution is sufficiently stable. Fig. 18 shows that MC analysis converge to a stable solution, for each of the circuits analyzed, provided the number of iterations is greater than 3000. Thus, we assume conventionally the time required by MC analysis as that corresponding to 3000 iterations. Table II reports a summary of the performances of the SiSMA approach compared to the MC analysis. The timings, reported in the second and third column, have been measured on a Sun Ultra 80 workstation with two 450-MHz processors using the Cadence Spectre deterministic simulator. The speed gains of SiSMA versus MC, reported in the fourth column, are referred

TABLE II SiSMA VERSUS MC SPEEDS COMPARISON

to MC analyses performed with 3000 iterations. Finally, the fifth column reports the RMSE of the SiSMA simulation with respect to the 5000-iteration MC simulation used as a reference.

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As you can see, for the three examples analyzed, a considerable speed gain (of two or three orders of magnitude) is achieved by SiSMA simulator.

where the second-order terms

VII. CONCLUSION

(56)

Statistical simulation is a key point for high-performance IC designs to be successful, due to process tolerances that strongly affect devices behavior in today submicrometer technologies. Early approaches, i.e., MC simulation and the more efficient response surface methodology, estimate the statistical behavior of the circuit by a population of realizations. In this paper a “direct” approach to statistical simulation, based on solving the stochastic equations of the circuit, has been suggested. The tool SiSMA presented in this paper is designer-oriented, since it is able to perform non-MC dc, ac, and transient analyses quickly, and no specific expertise on statistical treatment of circuits is required to perform them. It only requires a stochastic model of the MOSFET drain current, which can be easily derived from measurements, and a standard simulator, such as SPICE or any other device-level simulator.

have been neglected. Let us define the node-to-datum voltage vector as so that by Kirchoff’s voltage law (KVL). From (50) it results , and equating the deterministic and the random parts, the following relationships hold (57) (58) The deterministic and the random components can be singled out from the (54) and (55) giving

(59) APPENDIX I DETAILED DERIVATION OF THE LINEARIZATION OF (22), (23) Let us assume that both the currents and voltages at each instant time are given by the superimposition of a deterministic term, the expected value, and a zero-mean random variable, i.e.,

(60) for the deterministic component, and

(50) (51) (61)

stands for the expectation . The independent where sources have not a random component, so we simply write (52) (53) We assume that the magnitude of the random terms and is much smaller when compared with the magnitude of the signals and . With this hypothesis, (22) and (23) can be approximated by first-order Taylor’s expansion around mean values and , giving rise to a system of linear equations

(62) for the random component, where (57) and (58) have been taken into account and indicating with and the derivatives of a vector with respect to its argument and to the time, respectively. As (59) and (60) represent the usual nonlinear differential equations obtained by MNA whose solution gives the deterministic component of vector , this problem is solved by conventional device-level simulators. Equations (61) and (62) represent a linear system of stochastic differential equations. Applying Schwarz’s theorem to the derivatives of capacitances and inductances we can change the order of products, and then substitute time derivatives for them, using the chain rule. The resulting system can, thus, be put in matrix form as (63) where

(54)

(64) (55)

with initial condition (65)

BIAGETTI et al.: SiSMA—TOOL FOR EFFICIENT ANALYSIS OF ANALOG CMOS INTEGRATED CIRCUITS AFFECTED BY DEVICE MISMATCH

APPENDIX II DETAILED DERIVATION OF THE AC ANALYSIS

205

The deterministic and the random components can be singled out from (72) and (73), giving

Linearizing (22) and (23) in the neighborhood of the sto, we obtain chastic dc solution

(74) (75) (66)

for the deterministic component and

(67) In (66) and (67) a dc and an ac stochastic equation can be singled out. The dc part is

(76)

(68)

(77)

(69) whose solution can be found by dc SiSMA analysis. The ac part, after introducing the phasorial representation (44) and (45) for voltages and currents will result in

for the random component. Equations (74) and (75) represent the usual algebraic linear equation for deterministic ac analysis which is solved by conventional device-level simulators. Equations (76) and (77) represent an algebraic stochastic linear system where (78)

(70)

is the vector of unknowns. The system can be solved carrying out an analysis similar to that developed in the dc case, and exchanging the order of the products in the terms with second order derivatives, again applying Schwarz’s theorem. The system can, thus, be put in matrix form as

(71) Using first-order Taylor’s expansion around the deterministic dc value we get

(79) where (80) (81) with

(72)

(73)

(82)

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Giorgio Biagetti received the Laurea degree in electronics engineering from the Università degli Studi di Ancona, Ancona, Italy, in 2000. He is currently working toward the Ph.D. degree in the Department of Electronics, Artificial Intelligence, and Telecommunications of the Università Politecnica delle Marche, Ancona, Italy. His research interests include statistical circuit simulation, analog integrated circuits design, and speech recognition.

Simone Orcioni received the Laurea and Ph.D degrees in electronics engineering from the Università degli Studi di Ancona, Ancona, Italy, in 1992 and 1995, respectively. From 1997 to 1999, he was a Postdoctoral Fellow at the Università degli Studi di Ancona, where in 2000 he became an Assistant Professor. He is currently with the Department of Electronics, Artificial Intelligence, and Telecommunications of the Università Politecnica delle Marche, Ancona. Since 1992 he has been working in statistical device modeling and simulation, parametric yield optimization, neural networks, fuzzy systems, and analog circuit design. His research interests also include RF and system level circuit design and nonlinear systems represented by Wiener–Volterra series.

Claudio Turchetti (M’87) received the Laurea degree in electronics engineering from the Università degli Studi di Ancona, Ancona, Italy, in 1979. He joined the Department of Electronics, Università degli Studi di Ancona in 1980. He is currently a full Professor of applied electronics and integrated circuits design and Head of the Department of Electronics, Artificial Intelligence, and Telecommunications at the Università Politecnica delle Marche, Ancona, Italy. He has been active in the areas of device modeling, circuits simulation at the device level and design of integrated circuits. His current research interests are also in analog neural networks and statistical analysis of integrated circuits for parametric yield optimization.

BIAGETTI et al.: SiSMA—TOOL FOR EFFICIENT ANALYSIS OF ANALOG CMOS INTEGRATED CIRCUITS AFFECTED BY DEVICE MISMATCH

Paolo Crippa (M’02) received the Laurea (summa cum laude) and Ph.D. degrees in electronics engineering from the Università degli Studi di Ancona, Italy, in 1994 and 1999, respectively. From 1994 to 1999, he was Research Fellow at the Department of Electronics, Università degli Studi di Ancona, where in 1999 he became a Research Assistant as a member of the technical staff. Recently he has joined the Department of Electronics, Artificial Intelligence, and Telecommunications of the Università Politecnica delle Marche, Ancona, Italy. His research interests include statistical device modeling and simulation, parametric yield optimization of integrated circuits affected by mismatch effects, mixedsignal and RF circuit design, and neural networks.

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Michele Alessandrini received the Laurea degree in electronics engineering from the Università degli Studi di Ancona, Ancona, Italy, in 2001. He is currently working toward the Ph.D. degree in the Department of Electronics, Artificial Intelligence, and Telecommunications at the Università Politecnica delle Marche, Ancona, Italy.