Unified Hardware Architecture for 128-bit Block Ciphers AES and ...

Unified Hardware Architecture for 128-bit Block Ciphers AES and Camellia A. Satoh and S. Morioka Tokyo Research Laboratory IBM Japan Ltd.

Contents Š Unified S-Box Š Unified Permutation Layer Š Unified Data Path Architecture Š ASIC Implementation Results Š Conclusion

Unified S-Box

AES S-Box Š Combinations of GF(28) inverter and affine transformations Š Inverter followed by affine transformation for encryption and inverter follows affine transformation for decryption InvSubBytes

SubBytes

x0 x1 x2 x3 x4 x5 x6 x7

y0 y1 y2 y3 y4 y5 y6 y7

GF(28 ) Inverter

Affine Transformation A 1  1 1  1  1 0  0 0 

0 0 0 1 1 1 1   a0   1      1 0 0 0 1 1 1   a1  1  1 1 0 0 0 1 1   a2   0     1 1 1 0 0 0 1   a3   0   ⊕  1 1 1 1 0 0 0   a4   0  1 1 1 1 1 0 0   a5  1      0 1 1 1 1 1 0   a6   1  0 0 1 1 1 1 1   a7   0 

x0 x1 x2 x3 x4 x5 x6 x7

GF(2 8) Inverter

Affine Transformation A-1 0  1 0  1  0 0  1 0 

0 1 0 0 1 0 1   a0 ⊕ 1   0 0 1 0 0 1 0   a1 ⊕ 1   1 0 0 1 0 0 1   a2    0 1 0 0 1 0 0   a3   1 0 1 0 0 1 0   a4  0 1 0 1 0 0 1   a5 ⊕ 1   0 0 1 0 1 0 0   a6 ⊕ 1  1 0 0 1 0 1 0   a7 

y0 y1 y2 y3 y4 y5 y6 y7

Camellia S-Box Š GF((24)2) inverter is placed between two affine transformations Š Four S-Boxes S1~S4 (I/O ordering is differed) are used Š Feistel-type cipher Camellia uses same S-Box in encryption and decryption

s1

x0 x1 x2 x3 x4 x5 x6 x7

y0 y1 y2 y3 y4 y5 y6 y7

GF((24)2) Inverter

Affine Transformation F 0  1 0  0  0 0  1 0 

1 0 0 0 1 0 0   a0 ⊕ 1   0 0 0 0 0 1 0   a1 ⊕ 1   0 1 0 1 0 0 1   a2    0 1 0 0 0 0 1   a3   0 0 1 0 0 1 0   a4  1 0 0 1 0 0 0   a5 ⊕ 1    0 0 0 0 0 0 1   a6  0 0 1 0 1 0 0   a7 ⊕ 1

Affine Transformation H 0  0 0  0  0 1  1 0 

1 0 0 1 1 0 0   a0   0      1 0 0 0 1 0 0   a1  1  0 0 1 0 0 1 0   a2  1     1 0 0 0 0 0 1   a3   0   ⊕   0 1 0 0 0 1 0   a 4  1  0 0 0 0 0 0 1   a5  1      0 0 0 1 0 0 0   a 6  1  0 1 0 0 1 0 0   a7   0 

s2 x 8 s1

>>1

s3 x 8 s1