'(IO
United States Patent [19] Hudson, Jr. et al. [54] DIGITAL REGISTERS‘WITH SERIAL ACCESSED MODE CONTROL 131T
F33615-84_C-1500, May 1985,
Michael L- Kalm, Spring Lake, both 0f Minn‘
'
_
Bhavsar, Self-Testing by Polynomial Division, Digest
of Papers-1981 Intl. Test Conf., IEEE, pp. 208-216.
Fasting, Circuit Module Implements Practical Self-T
_
[51] [52] [53]
esting, Electronics, vol. 88, No. 1557, May 19, 1982, pp.
Int. Cl.4 ........................................... .. G01R 31/28 U.S. Cl. ...................................... .. 371/25 Field of Search ............... .. 371/15, 25; 324/73 R,
324/73 AT
[56]
References Cited U S PATENT DOCUMENTS
1;; ,
Primary Examiner--Charles E. Atkinson Attorney, Agent, or Firm—W. T. Udseth
[57] ABSTRACT A recon?gurable digital register that can be serially loaded has an additional bit associated with the register which holds information indicative of a mode of opera
' ' ,
Konemann et al., Built-In Test for Complex Digital Integrated Circuits, IEEE Journal of Solid-State Cir cuits, vol. SC-15, No. 3, Jun. 1980, pp. 315-319.
[73] Asslgnw Honeywell Inc-i Mlnneapolls, Mmn[21] APP1-N°-= 89,381 [22]
Jul. 11, 1989
OTHER PUBLICATIONS Project Status Report VHSIC Phase 2, Contract No.
[75] Inventors: Charles L. Hudson, Jr., Plymouth; _
4,847,839
Patent Number: Date of Patent:
[11] [45]
tion of the register. The mode control bit is located such
gaeusele -------------------------- ercy
.............. ..
.
that it can be serially loaded along with the other bits. A pamc-ula?y useful embodlm-em ‘5 to 956 the mode con -
4,513,418 4/1985 Bardell, Jr. et a1.
371/25
-
-
_
4,519,078
5/1985
4,594,711
6/1986 Thatte .......... ..
371/25
trol blt to con?gure the register. as either a. test pattern . . generator 01: a §1gnamre analysls reglste‘ “1 suppo" of
4,601,034
7/1986 Sridhar ......... ..
371/25
mtegfated clrcu“ Self-test functlons
Komonytsky ....... ..
371/25
4,701,916 10/1987 Naven et a1. 371/15 4,703,484 10/ 1987 Rolfe et a1. ......................... .. 371/25
um ,9
um
NET 0 =°ll>—— gTEéL
um
um
‘(IO
nm
0N
061
DIN
CTRL 2
£20 SERIAL INE>———|_QG|Q
15 Claims, 3 Drawing Sheets
am ;— 21!
ll
l2
an ~ an
l3
an’
l4
l5
an '- arr
>- SUI
l6
l7
e111‘ BIT
l3
arr
—-E>sg'-?L
.
CTRL o 1 C1R|.._L LLK t>
/-( f
)3‘:C
23 j“1C
21
U MJT
U
v
V
DOUT DOUT
ICGlFlGl-RABLE
U
U
U
U
DOJT
DOUT
DOUT
NUT
REGISTER
NUT
US. Patent
Jul. 11,1989
Sheet 2 013
'- ____ —}—24
om |>__-l_ CTRL o
c>——l_ I
3'
4,847,839 '
33'
§25
I OUT
I
CTRL l o-——|—\
I
sm 1>—-|_‘
D Q
QN
CLK 32
,
l_______ CLK I}
?g Z
RECONFIGURABLE alfr-sL ICE
T Hg 5
SERIAL INPUT SIGNAL ANALYSIS REGISTER
DIN Ni)
LD- *1 _
Hg 6
DIN 2(i)
DIN 3“)
DIN 4(1)
X2 LD- >
F33615-84_C-1500, May 1985,
Michael L- Kalm, Spring Lake, both 0f Minn‘
'
_
Bhavsar, Self-Testing by Polynomial Division, Digest
of Papers-1981 Intl. Test Conf., IEEE, pp. 208-216.
Fasting, Circuit Module Implements Practical Self-T
_
[51] [52] [53]
esting, Electronics, vol. 88, No. 1557, May 19, 1982, pp.
Int. Cl.4 ........................................... .. G01R 31/28 U.S. Cl. ...................................... .. 371/25 Field of Search ............... .. 371/15, 25; 324/73 R,
324/73 AT
[56]
References Cited U S PATENT DOCUMENTS
1;; ,
Primary Examiner--Charles E. Atkinson Attorney, Agent, or Firm—W. T. Udseth
[57] ABSTRACT A recon?gurable digital register that can be serially loaded has an additional bit associated with the register which holds information indicative of a mode of opera
' ' ,
Konemann et al., Built-In Test for Complex Digital Integrated Circuits, IEEE Journal of Solid-State Cir cuits, vol. SC-15, No. 3, Jun. 1980, pp. 315-319.
[73] Asslgnw Honeywell Inc-i Mlnneapolls, Mmn[21] APP1-N°-= 89,381 [22]
Jul. 11, 1989
OTHER PUBLICATIONS Project Status Report VHSIC Phase 2, Contract No.
[75] Inventors: Charles L. Hudson, Jr., Plymouth; _
4,847,839
Patent Number: Date of Patent:
[11] [45]
tion of the register. The mode control bit is located such
gaeusele -------------------------- ercy
.............. ..
.
that it can be serially loaded along with the other bits. A pamc-ula?y useful embodlm-em ‘5 to 956 the mode con -
4,513,418 4/1985 Bardell, Jr. et a1.
371/25
-
-
_
4,519,078
5/1985
4,594,711
6/1986 Thatte .......... ..
371/25
trol blt to con?gure the register. as either a. test pattern . . generator 01: a §1gnamre analysls reglste‘ “1 suppo" of
4,601,034
7/1986 Sridhar ......... ..
371/25
mtegfated clrcu“ Self-test functlons
Komonytsky ....... ..
371/25
4,701,916 10/1987 Naven et a1. 371/15 4,703,484 10/ 1987 Rolfe et a1. ......................... .. 371/25
um ,9
um
NET 0 =°ll>—— gTEéL
um
um
‘(IO
nm
0N
061
DIN
CTRL 2
£20 SERIAL INE>———|_QG|Q
15 Claims, 3 Drawing Sheets
am ;— 21!
ll
l2
an ~ an
l3
an’
l4
l5
an '- arr
>- SUI
l6
l7
e111‘ BIT
l3
arr
—-E>sg'-?L
.
CTRL o 1 C1R|.._L LLK t>
/-( f
)3‘:C
23 j“1C
21
U MJT
U
v
V
DOUT DOUT
ICGlFlGl-RABLE
U
U
U
U
DOJT
DOUT
DOUT
NUT
REGISTER
NUT
US. Patent
Jul. 11,1989
Sheet 2 013
'- ____ —}—24
om |>__-l_ CTRL o
c>——l_ I
3'
4,847,839 '
33'
§25
I OUT
I
CTRL l o-——|—\
I
sm 1>—-|_‘
D Q
QN
CLK 32
,
l_______ CLK I}
?g Z
RECONFIGURABLE alfr-sL ICE
T Hg 5
SERIAL INPUT SIGNAL ANALYSIS REGISTER
DIN Ni)
LD- *1 _
Hg 6
DIN 2(i)
DIN 3“)
DIN 4(1)
X2 LD- >
