P-67: Chip on Glass Bonding Using StressedMetal Technology
P-67 / D. K. Fork
P-67: Chip on Glass Bonding Using StressedMetal™ Technology David K. Fork,* Eugene M. Chow, Christopher L. Chua, Thomas Hantschel,† Koenraad Van Schuylenbergh, Ty Jagerson, Lai Wong and Vicki Geluz Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304 USA Si chip
Abstract Chip-on-glass (COG) interconnections require finer pitch to handle denser displays with more integrated driver chips, particularly for mobile devices. We report recent developments utilizing tiny micro-machined springs to replace ACF (anisotropic conductive film). Liquid, ultraviolet light–cured adhesives permit the attachment of chips to the glass without heating. We fabricated and tested daisy chain test vehicles with 800 spring contacts on 20 µm pitch.
1. Introduction
via Fine pitch ClawConnect™ spring
Adhesive LCD backplane (glass)
Figure 1. COG packaging method using integrated springs and liquid adhesive.
In earlier reports, StressedMetal™ springs have been demonstrated in dense arrays of 6 µm pitch interconnects [1], optoelectronic modules [2], and in high quality factor RF coils on BiCMOS circuits [3]. Chip on glass interconnections require finer pitch to handle smaller and more numerous pixels, and the integration of more functionality on driver chips. For mobile devices in particular, the trend is to incorporate row and column drivers for multiple displays into a single chip. This can lead to very small chips with over 2000 signal lines. Another factor pushing to finer pitch is silicon die size reduction to reduce cost. This has led to efforts to reroute the off-chip interconnects from the periphery toward the interior of the chip in order to save wafer area [4]. In this paper we report on recent developments utilizing StressedMetal™ technology for chip on glass interconnection [5]. Our goal is a low-cost batch-fabricated compliant interconnect: a micro-machined spring that is wired to the driver chip’s contact pad. There are significant differences between StressedMetal™ and anisotropic conducting film (ACF) contacts. The interconnect’s z-compliance can be used to relax the flatness and tilt placement tolerance. Precise spring placement on the chip avoids the need for ACF particles. Liquid, ultraviolet light–cured adhesives permit the attachment of chips to the glass without heating. To test this package concept, we have assembled prototype parts and subjected them to thermal cycle and humidity testing.
2. Concept The idea behind spring-based chip-on-glass interconnects is illustrated in Figure 1. The springs are fabricated onto the silicon drivers as part of a back end wafer level process – essentially the springs are the last layer of metallization. Prior to assembly, the springs can be used for wafer-level or die-level test in order to ensure that components are assembled using known good die. We recently showed that a single spring contact with < 0.1 gm force can slide against a gold pad for over 10,000 cycles without contact intermittencies [6]. This suggests that the springs are suited for testing before assembly.
* †
[email protected]; (650) 812-4121 Currently at: IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
534 • SID 05 DIGEST
Figure 2. Schematic comparison of ACF and spring based interconnect structures. The chips are attached by flowing and curing an adhesive layer out between the chip and backplane. An advantage of this approach is the avoidance of shorting particles typical of ACF (Figure 2). A general rule of thumb for ACF tapes is that the pad size and spacing needs to be such that the gap between pads is about 4x the diameter of the particles in the ACF tape. The particles in use have sizes ranging down to 2 or 3 µm, implying that the pad-gap is currently around 8 to 12 µm. The primary limitation to the pad gap for spring based interconnects is the patterning resolution of the technology used to make the pads. As the particles in ACF tape become smaller, as is required for finer pitch, errors in the particle diameter become proportionately larger. The largest particles pose a problem in that they can prevent the smaller particles from making contact. In addition as particles are made smaller their effective compliance is reduced. The spring-based interconnects offer more compliance than is typically available with gold bumps and particles.
3. Design and Fabrication For this work, we fabricated daisy chain test vehicles on die measuring 10 mm by 3 mm with 800 spring contacts on a pitch of 20 µm. The design employed staggered arrays of 40 µm pitch springs with an effective pitch of 20 µm. The springs utilized
ISSN/0005-0966X/05/3601-0534-$1.00+.00 ISSN/0005-0966X/05/3601-0006-$1.00+.00 © 2005 SID
P-67 / D. K. Fork StressedMetal™
sacrificial layer
(A)
release mask
(B)
Over-plated metal
(C) Figure 3. Spring fabrication procedure. gold-to-gold pressure contacts at forces of < 0.1 gmf. Each spring is 14 µm wide, 5 µm thick and 180 µm long. The springs lift above the substrate surface by ~57 µm and have a tip height variation of ±5 µm from one end of a chip to the other. The design intent was to use the periphery of the chip, however, because these springs make contact with a low contact force, webelieve it is possible to distribute the springs throughout the chip. We fabricated the springs on 4” wafers of Corning 1737 glass instead of silicon in order to facilitate optical inspection. The thermal expansion behavior of 1737 glass is very close to that of silicon.
tively etched away around and beneath the springs, causing them to pop up from the substrate. Once the springs are released from the substrate, additional metal is plated over the springs to stiffen, thicken and passivate the springs (Figure 3C). Electroplated gold with a thickness on the order of 0.25 to 0.5 µm is the final layer applied to the outer surface of the spring. We note that this is considerably less gold than the typical thickness of 17 µm that is used to make the bumps for ACF interconnects. This suggests a possible cost reduction by utilizing the springs. Figure 3C shows a spring that is taking off in close proximity to its pad, however, the un-lifted portion of metal can in fact have fairly arbitrary routing and length, suggesting a means to route the springs toward the interior of the driver chip in order to squeeze more die onto a wafer. Once the spring fabrication is complete, a protective layer is spun onto the wafer, and the chips are separated on a wafer saw. The protective layer is then stripped away prior to assembly.
3. Assembly Images of the fabricated springs are shown in Figure 4. There are two arrays of staggered springs, each running along the long edge of the chip. Both arrays are captured in the side-view image. The tapered tip of each spring is visible. Each micro-machined tip is tapered to widen the alignment error tolerance. The sides and tips of the springs develop a rounded shape due to the over-plated metal added to the spring during the final steps of fabrication. The chips and substrates were assembled together using an aligner that looks down through the glass substrate while the parts are brought together with positioning stages. A small drop of Loctite 3355 adhesive is applied to the parts before they are brought together. The adhesive flows to fill the space between the parts and around the springs. Any excess adhesive flows out to the edges of the part and forms a meniscus. The adhesive is then cured in place using UV light from a mercury arc lamp delivered through an optical fiber. The completed part is shown in Figure 5. The assembly is done without intentional heating, and a UV tack on the aligner can be followed up with an additional UV light soak afterwards to further cure the adhesive.
Mating pads for the springs were fabricated on a separate glass substrate measuring 11 x 22 mm. This substrate has a series of large contact pads suitable for contacting with pogo pins in a test socket. The layout is arranged to permit measurements on chains of many springs in series, four-point measurements of spring pairs, and isolation tests of spring pairs (to test the dielectric strength of the adhesive). As illustrated in Figure 3A, the springs are fabricated by first placing a layer of conducting sacrificial metal (titanium) over the wafer passivation, including vias, and then patterning a layer of metal with a built-in stress gradient.
10 µm
For this work, the StressedMetal™ layer was applied by plating the metal through a photoresist mask in baths designed to produce stresses that trended increasingly tensile throughout the thickness. In earlier work, we utilized sputtering, however, in anticipation of cost requirements for this application, we adopted nickel plating as a potentially lower cost method. We note that plating is already the method of choice for producing the gold bumps used for COG. This may suggest that the process for StressedMetal™ could be readily incorporated. In a second masking step (Figure 3B) the sacrificial metal is selec-
Figure 4. SEM images of the staggered daisy chain.
SID 05 DIGEST • 535
Lift Height Decrease (%)
P-67 / D. K. Fork
40% 30% 20% 10% 0% -10% 0.0%
Figure 5. Photograph of an assembled test structure. We anticipate that with the proper UV delivery system, the time needed to fix the chip in place on a pick and place tool could be on the order of one to several seconds. The adhesive that we use can undergo additional curing with a thermal soak. These factors suggest that this method of interconnection may provide a means to increase the assembly throughput.
0.5%
1.0%
1.5%
2.0%
Peak Strain (%)
Figure 6. Lift height resiliency as a function of strain for arrays of springs annealed at 135 °C for 48 hours.
Another possibility is to hold the part in place temporarily, either mechanically or with a partial cure, before a functional test, and then complete the assembly with fully cured adhesives only after the part is verified, thereby allowing rework if necessary.
metal. Figure 6 shows a plot of the lift-height deformation as a function of the peak strain in the spring metal for arrays of springs annealed at 135 °C for 48 hours. The error bars reflect the cumulative lift-height measurement variation accrued by the before and after measurements. Only the last data point shows significant liftheight decrease. The data show that strains as large as 1.5% can be accommodated at 135 °C.
4. Testing
4.2 Electrical Characterization
We conducted tests on individual springs as well as arrays of springs to characterize their electrical and mechanical properties. Packages were testing using a battery of reliability tests. More detail regarding the testing will appear in a full paper[5].
4.1 Mechanical Characterization The mechanical tests on individual springs consisted of force vs. compression curves and yield point analysis. The springs were compressed with progressively increasing amplitude against a smooth silicon substrate. This allowed us to observe the spring constant and yield point of the spring. Over most of the working range of the cantilever, about 57 µm, the force responds linearly with compression. This is over one order more compliant than gold bumps used for ACF bonding. The force generated by each spring is about 0.01 gmf at a compression of 20 µm. Near the end of the compliant range, the springs stiffen, exhibiting a hard nonlinearity because the pivot point of the spring progresses closer to the tip, shortening the effective spring length. The yield point of the springs was characterized by observing when the spring no longer returned to its original lift height. From this information we were able to infer the yield point of the metal by estimating the peak strains which occur at the upper and lower surfaces of the spring. At room temperature this peak strain can exceed 1.5%. We also prepared heated compression tests on arrays of springs by placing the chips face down on a glass slide and setting a weight on the backside to compress the array. These mechanically loaded parts were then baked in an oven at temperatures of 85 °C and 135 °C for 48 hours. The lift-height of the springs was measured using a Nikon VMR programmable measurement system. By using a series of weights and measuring the lift-heights of the springs before and after baking we were able to observe the onset of plastic deformation and infer the yield point of the spring
536 • SID 05 DIGEST
Electrical tests on individual springs were carried out using a fourpoint probe structure that captured the combined resistance of the spring, the tip, the contact resistance, and the spreading resistance at the pad. The resistance decreases with increasing compression and flattens out after a compression of 20 µm to a value of about 0.5 Ω. It was not possible to directly measure the contact resistance. Estimates based on the spring dimensions and the sheet resistances of the gold pads used for the measurement suggest a contact resistance of 100-150 mΩ. This is well within the requirements for LCD applications.
4.3 Package Characterization Assembled parts were subjected to humidity soaks in an ESPEC SH-241 oven at 60 °C and 95% RH. After 500 hours, there was a slight average decrease in the 4-wire resistance on the order of 1.8%. Assembled parts were subjected to thermal cycling in a Sigma Systems M18 thermal cycling oven from 0 °C to 125 °C with a 45 min dwell. After 460 cycles there was an average decrease in the 4-wire resistance of 6.1%. During thermocycling tests, packages were also connected to a high speed event detector (AnaTech STD Event Detector) to determine if any electrical glitches due to intermittent contact occurred. None were detected, suggesting the pressure contact was stable during thermocycling.
5. Conclusions The StressedMetal™ spring technology offers an alternative to ACF film that can extend interconnection density to enable more functionality per driver chip and ultimately lower the cost and improve the performance of displays. The low contact force of the springs may enable a reduction of the silicon die area by routing the driver chip I/O over the active areas of the chip. This is a practice that is largely avoided today with ACF due to concerns of
P-67 / D. K. Fork damaging the chip with the high applied force during ACF bonding, which can typically be 100 grams per contact. The ability to assemble parts at room temperature with UV cure adhesives may offer an opportunity to increase the assembly throughput. The use of a thin and flexible bent cantilever interconnect in lieu of a solid gold bump may provide an opportunity to reduce cost by reducing the precious metals content of the package.
6. Acknowledgements We would like to thank Jackson Ho and Eric Peeters of the Palo Alto Research Center for many useful discussions.
7. References [1] D. L. Smith D. K. Fork, R. L. Thornton, A. Alimonda, C. L. Chua, C. Dunnrowicz, and J. Ho “Flip-Chip bonding on 6um pitch using thin film microspring technology,” Proc 48th Electronic Components and Technology Conf. (Seattle, Washington, May 1998), 325-329. [2] C. L. Chua, D. K. Fork, and T. Hantschel, “Densely Packed Optoelectronic Interconnect Using Micromachined Springs,” IEEE Photonics Technology Letters, 14(6), 846-848 (2002).
[3] K. Van Schuylenbergh, B. Griffiths, C.L. Chua, D.K. Fork, and J-P. Lu, “Low-noise Monolithic Oscillator with an Integrated Three-Dimensional Inductor,” Proc. ISSCC 2003, San Francisco, CA, USA, Feb 9-13, 2003 (paper 22.4), 392-393, 501. [4] C-S Lee, Y-H Kwon, S-Y Kang, S-J Kim, J-H Hwang, U-B Kang, S-Y Oh, “The development of redistribution bump processing for LCD driver IC packaging,” Proc. IMAPS, Long Beach, CA, USA, 2004 Nov 14-18. [5] E. M. Chow, C. L. Chua, T. Hantschel, K. Van Schuylenbergh, D. K. Fork, “Solder-free pressure contact microsprings in high-density flip-chip packages”, Proc 55th Electronic Components and Technology Conf. (Lake Buena Vista, Florida, May 2005), accepted for publication. [6] Chow, E. M., Klein, K., Fork, D. K., Hantschel, T., Chua, C. L., Wong, L., and Van Schuylenbergh, K., "Intermit-tency study of a stressed-metal micro-spring sliding electrical contact," Proc 53rd Electronic Components and Technology Conference, New Orleans, LA, USA, 2003, pp. 1714-1717.
SID 05 DIGEST • 537
P-67: Chip on Glass Bonding Using StressedMetal™ Technology David K. Fork,* Eugene M. Chow, Christopher L. Chua, Thomas Hantschel,† Koenraad Van Schuylenbergh, Ty Jagerson, Lai Wong and Vicki Geluz Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, CA 94304 USA Si chip
Abstract Chip-on-glass (COG) interconnections require finer pitch to handle denser displays with more integrated driver chips, particularly for mobile devices. We report recent developments utilizing tiny micro-machined springs to replace ACF (anisotropic conductive film). Liquid, ultraviolet light–cured adhesives permit the attachment of chips to the glass without heating. We fabricated and tested daisy chain test vehicles with 800 spring contacts on 20 µm pitch.
1. Introduction
via Fine pitch ClawConnect™ spring
Adhesive LCD backplane (glass)
Figure 1. COG packaging method using integrated springs and liquid adhesive.
In earlier reports, StressedMetal™ springs have been demonstrated in dense arrays of 6 µm pitch interconnects [1], optoelectronic modules [2], and in high quality factor RF coils on BiCMOS circuits [3]. Chip on glass interconnections require finer pitch to handle smaller and more numerous pixels, and the integration of more functionality on driver chips. For mobile devices in particular, the trend is to incorporate row and column drivers for multiple displays into a single chip. This can lead to very small chips with over 2000 signal lines. Another factor pushing to finer pitch is silicon die size reduction to reduce cost. This has led to efforts to reroute the off-chip interconnects from the periphery toward the interior of the chip in order to save wafer area [4]. In this paper we report on recent developments utilizing StressedMetal™ technology for chip on glass interconnection [5]. Our goal is a low-cost batch-fabricated compliant interconnect: a micro-machined spring that is wired to the driver chip’s contact pad. There are significant differences between StressedMetal™ and anisotropic conducting film (ACF) contacts. The interconnect’s z-compliance can be used to relax the flatness and tilt placement tolerance. Precise spring placement on the chip avoids the need for ACF particles. Liquid, ultraviolet light–cured adhesives permit the attachment of chips to the glass without heating. To test this package concept, we have assembled prototype parts and subjected them to thermal cycle and humidity testing.
2. Concept The idea behind spring-based chip-on-glass interconnects is illustrated in Figure 1. The springs are fabricated onto the silicon drivers as part of a back end wafer level process – essentially the springs are the last layer of metallization. Prior to assembly, the springs can be used for wafer-level or die-level test in order to ensure that components are assembled using known good die. We recently showed that a single spring contact with < 0.1 gm force can slide against a gold pad for over 10,000 cycles without contact intermittencies [6]. This suggests that the springs are suited for testing before assembly.
* †
[email protected]; (650) 812-4121 Currently at: IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
534 • SID 05 DIGEST
Figure 2. Schematic comparison of ACF and spring based interconnect structures. The chips are attached by flowing and curing an adhesive layer out between the chip and backplane. An advantage of this approach is the avoidance of shorting particles typical of ACF (Figure 2). A general rule of thumb for ACF tapes is that the pad size and spacing needs to be such that the gap between pads is about 4x the diameter of the particles in the ACF tape. The particles in use have sizes ranging down to 2 or 3 µm, implying that the pad-gap is currently around 8 to 12 µm. The primary limitation to the pad gap for spring based interconnects is the patterning resolution of the technology used to make the pads. As the particles in ACF tape become smaller, as is required for finer pitch, errors in the particle diameter become proportionately larger. The largest particles pose a problem in that they can prevent the smaller particles from making contact. In addition as particles are made smaller their effective compliance is reduced. The spring-based interconnects offer more compliance than is typically available with gold bumps and particles.
3. Design and Fabrication For this work, we fabricated daisy chain test vehicles on die measuring 10 mm by 3 mm with 800 spring contacts on a pitch of 20 µm. The design employed staggered arrays of 40 µm pitch springs with an effective pitch of 20 µm. The springs utilized
ISSN/0005-0966X/05/3601-0534-$1.00+.00 ISSN/0005-0966X/05/3601-0006-$1.00+.00 © 2005 SID
P-67 / D. K. Fork StressedMetal™
sacrificial layer
(A)
release mask
(B)
Over-plated metal
(C) Figure 3. Spring fabrication procedure. gold-to-gold pressure contacts at forces of < 0.1 gmf. Each spring is 14 µm wide, 5 µm thick and 180 µm long. The springs lift above the substrate surface by ~57 µm and have a tip height variation of ±5 µm from one end of a chip to the other. The design intent was to use the periphery of the chip, however, because these springs make contact with a low contact force, webelieve it is possible to distribute the springs throughout the chip. We fabricated the springs on 4” wafers of Corning 1737 glass instead of silicon in order to facilitate optical inspection. The thermal expansion behavior of 1737 glass is very close to that of silicon.
tively etched away around and beneath the springs, causing them to pop up from the substrate. Once the springs are released from the substrate, additional metal is plated over the springs to stiffen, thicken and passivate the springs (Figure 3C). Electroplated gold with a thickness on the order of 0.25 to 0.5 µm is the final layer applied to the outer surface of the spring. We note that this is considerably less gold than the typical thickness of 17 µm that is used to make the bumps for ACF interconnects. This suggests a possible cost reduction by utilizing the springs. Figure 3C shows a spring that is taking off in close proximity to its pad, however, the un-lifted portion of metal can in fact have fairly arbitrary routing and length, suggesting a means to route the springs toward the interior of the driver chip in order to squeeze more die onto a wafer. Once the spring fabrication is complete, a protective layer is spun onto the wafer, and the chips are separated on a wafer saw. The protective layer is then stripped away prior to assembly.
3. Assembly Images of the fabricated springs are shown in Figure 4. There are two arrays of staggered springs, each running along the long edge of the chip. Both arrays are captured in the side-view image. The tapered tip of each spring is visible. Each micro-machined tip is tapered to widen the alignment error tolerance. The sides and tips of the springs develop a rounded shape due to the over-plated metal added to the spring during the final steps of fabrication. The chips and substrates were assembled together using an aligner that looks down through the glass substrate while the parts are brought together with positioning stages. A small drop of Loctite 3355 adhesive is applied to the parts before they are brought together. The adhesive flows to fill the space between the parts and around the springs. Any excess adhesive flows out to the edges of the part and forms a meniscus. The adhesive is then cured in place using UV light from a mercury arc lamp delivered through an optical fiber. The completed part is shown in Figure 5. The assembly is done without intentional heating, and a UV tack on the aligner can be followed up with an additional UV light soak afterwards to further cure the adhesive.
Mating pads for the springs were fabricated on a separate glass substrate measuring 11 x 22 mm. This substrate has a series of large contact pads suitable for contacting with pogo pins in a test socket. The layout is arranged to permit measurements on chains of many springs in series, four-point measurements of spring pairs, and isolation tests of spring pairs (to test the dielectric strength of the adhesive). As illustrated in Figure 3A, the springs are fabricated by first placing a layer of conducting sacrificial metal (titanium) over the wafer passivation, including vias, and then patterning a layer of metal with a built-in stress gradient.
10 µm
For this work, the StressedMetal™ layer was applied by plating the metal through a photoresist mask in baths designed to produce stresses that trended increasingly tensile throughout the thickness. In earlier work, we utilized sputtering, however, in anticipation of cost requirements for this application, we adopted nickel plating as a potentially lower cost method. We note that plating is already the method of choice for producing the gold bumps used for COG. This may suggest that the process for StressedMetal™ could be readily incorporated. In a second masking step (Figure 3B) the sacrificial metal is selec-
Figure 4. SEM images of the staggered daisy chain.
SID 05 DIGEST • 535
Lift Height Decrease (%)
P-67 / D. K. Fork
40% 30% 20% 10% 0% -10% 0.0%
Figure 5. Photograph of an assembled test structure. We anticipate that with the proper UV delivery system, the time needed to fix the chip in place on a pick and place tool could be on the order of one to several seconds. The adhesive that we use can undergo additional curing with a thermal soak. These factors suggest that this method of interconnection may provide a means to increase the assembly throughput.
0.5%
1.0%
1.5%
2.0%
Peak Strain (%)
Figure 6. Lift height resiliency as a function of strain for arrays of springs annealed at 135 °C for 48 hours.
Another possibility is to hold the part in place temporarily, either mechanically or with a partial cure, before a functional test, and then complete the assembly with fully cured adhesives only after the part is verified, thereby allowing rework if necessary.
metal. Figure 6 shows a plot of the lift-height deformation as a function of the peak strain in the spring metal for arrays of springs annealed at 135 °C for 48 hours. The error bars reflect the cumulative lift-height measurement variation accrued by the before and after measurements. Only the last data point shows significant liftheight decrease. The data show that strains as large as 1.5% can be accommodated at 135 °C.
4. Testing
4.2 Electrical Characterization
We conducted tests on individual springs as well as arrays of springs to characterize their electrical and mechanical properties. Packages were testing using a battery of reliability tests. More detail regarding the testing will appear in a full paper[5].
4.1 Mechanical Characterization The mechanical tests on individual springs consisted of force vs. compression curves and yield point analysis. The springs were compressed with progressively increasing amplitude against a smooth silicon substrate. This allowed us to observe the spring constant and yield point of the spring. Over most of the working range of the cantilever, about 57 µm, the force responds linearly with compression. This is over one order more compliant than gold bumps used for ACF bonding. The force generated by each spring is about 0.01 gmf at a compression of 20 µm. Near the end of the compliant range, the springs stiffen, exhibiting a hard nonlinearity because the pivot point of the spring progresses closer to the tip, shortening the effective spring length. The yield point of the springs was characterized by observing when the spring no longer returned to its original lift height. From this information we were able to infer the yield point of the metal by estimating the peak strains which occur at the upper and lower surfaces of the spring. At room temperature this peak strain can exceed 1.5%. We also prepared heated compression tests on arrays of springs by placing the chips face down on a glass slide and setting a weight on the backside to compress the array. These mechanically loaded parts were then baked in an oven at temperatures of 85 °C and 135 °C for 48 hours. The lift-height of the springs was measured using a Nikon VMR programmable measurement system. By using a series of weights and measuring the lift-heights of the springs before and after baking we were able to observe the onset of plastic deformation and infer the yield point of the spring
536 • SID 05 DIGEST
Electrical tests on individual springs were carried out using a fourpoint probe structure that captured the combined resistance of the spring, the tip, the contact resistance, and the spreading resistance at the pad. The resistance decreases with increasing compression and flattens out after a compression of 20 µm to a value of about 0.5 Ω. It was not possible to directly measure the contact resistance. Estimates based on the spring dimensions and the sheet resistances of the gold pads used for the measurement suggest a contact resistance of 100-150 mΩ. This is well within the requirements for LCD applications.
4.3 Package Characterization Assembled parts were subjected to humidity soaks in an ESPEC SH-241 oven at 60 °C and 95% RH. After 500 hours, there was a slight average decrease in the 4-wire resistance on the order of 1.8%. Assembled parts were subjected to thermal cycling in a Sigma Systems M18 thermal cycling oven from 0 °C to 125 °C with a 45 min dwell. After 460 cycles there was an average decrease in the 4-wire resistance of 6.1%. During thermocycling tests, packages were also connected to a high speed event detector (AnaTech STD Event Detector) to determine if any electrical glitches due to intermittent contact occurred. None were detected, suggesting the pressure contact was stable during thermocycling.
5. Conclusions The StressedMetal™ spring technology offers an alternative to ACF film that can extend interconnection density to enable more functionality per driver chip and ultimately lower the cost and improve the performance of displays. The low contact force of the springs may enable a reduction of the silicon die area by routing the driver chip I/O over the active areas of the chip. This is a practice that is largely avoided today with ACF due to concerns of
P-67 / D. K. Fork damaging the chip with the high applied force during ACF bonding, which can typically be 100 grams per contact. The ability to assemble parts at room temperature with UV cure adhesives may offer an opportunity to increase the assembly throughput. The use of a thin and flexible bent cantilever interconnect in lieu of a solid gold bump may provide an opportunity to reduce cost by reducing the precious metals content of the package.
6. Acknowledgements We would like to thank Jackson Ho and Eric Peeters of the Palo Alto Research Center for many useful discussions.
7. References [1] D. L. Smith D. K. Fork, R. L. Thornton, A. Alimonda, C. L. Chua, C. Dunnrowicz, and J. Ho “Flip-Chip bonding on 6um pitch using thin film microspring technology,” Proc 48th Electronic Components and Technology Conf. (Seattle, Washington, May 1998), 325-329. [2] C. L. Chua, D. K. Fork, and T. Hantschel, “Densely Packed Optoelectronic Interconnect Using Micromachined Springs,” IEEE Photonics Technology Letters, 14(6), 846-848 (2002).
[3] K. Van Schuylenbergh, B. Griffiths, C.L. Chua, D.K. Fork, and J-P. Lu, “Low-noise Monolithic Oscillator with an Integrated Three-Dimensional Inductor,” Proc. ISSCC 2003, San Francisco, CA, USA, Feb 9-13, 2003 (paper 22.4), 392-393, 501. [4] C-S Lee, Y-H Kwon, S-Y Kang, S-J Kim, J-H Hwang, U-B Kang, S-Y Oh, “The development of redistribution bump processing for LCD driver IC packaging,” Proc. IMAPS, Long Beach, CA, USA, 2004 Nov 14-18. [5] E. M. Chow, C. L. Chua, T. Hantschel, K. Van Schuylenbergh, D. K. Fork, “Solder-free pressure contact microsprings in high-density flip-chip packages”, Proc 55th Electronic Components and Technology Conf. (Lake Buena Vista, Florida, May 2005), accepted for publication. [6] Chow, E. M., Klein, K., Fork, D. K., Hantschel, T., Chua, C. L., Wong, L., and Van Schuylenbergh, K., "Intermit-tency study of a stressed-metal micro-spring sliding electrical contact," Proc 53rd Electronic Components and Technology Conference, New Orleans, LA, USA, 2003, pp. 1714-1717.
SID 05 DIGEST • 537
