Phase-Shifted Full Bridge DC-DC Converter with Energy ... - CiteSeerX
Phase-Shifted Full Bridge DC-DC Converter with Energy Recovery Clamp and Reduced Circulating Current Milan Ilic
Dragan Maksimovic
Colorado Power Electronics Center ECE Department University of Colorado at Boulder, USA maksimov @ colorado. edu
Advanced Energy 1625 Sharp Point Drive Fort Collins, CO 80525 milan. ilic@ aei. com Abstract - This paper introduces a full bridge converter with reduced circulating current and a reduction of the switch conduction and turn-off losses achieved by an energy recovery secondary clamp circuit. The proposed clamp circuit allows the converter to operate with wide input or output voltage range with minimum voltage stress across the output diodes. The paper describes an experimental 25 kW (1500 V, 16.7 A) full bridge converter operating at 32 kHz switching frequency. Losses and efficiency of the experimental prototype compare favorably against the standard full bridge and previously proposed zerovoltage/zero-current switching configurations.
stacked faster diodes. To address over-voltages and severe parasitic ringing in the secondary side, voltage sharing and voltage clamping circuits (snubbers) are required. However, in high power, high voltage applications, losses in standard dissipative snubbers can be very significant. To address the first problem, zero-voltage, zero-current switching (ZVZCS) PSFB DC-DC converters using auxiliary circuits have been presented [4-10]. One efficient circuit that achieves ZVZCS with a relatively simple auxiliary circuit on the secondary side is shown in Fig 1 [5]. The snubber circuit, which consists of only two diodes (Ds1 and DS2) and one capacitor (Cs), provides ZVZCS, transfers energy from the transformer leakage inductance to the output capacitor, and significantly reduces the voltage across the output bridge. For example, the voltage across the diode bridge, VBR, in the circuit shown in Fig. 1 is clamped to:
I. INTRODUCTION
The phase-shifted full bridge (PSFB) DC-DC converter has been proposed to reduce component stresses and switching losses compared to the traditional hard-switching pulse-widthmodulated (PWM) bridge converter [1-3]. However, PSFB has two disadvantages in high power and high voltage applications: 1) Because of the phase-shifted PWM control, a circulating current, which is the sum of the reflected output current (n*I0) and the transformer primary magnetizing current, flows through the transformer and switching devices during freewheeling intervals. As a result, the switch and transformer RMS current stresses are higher compared to the conventional hard-switching PWM full-bridge converter. 2) High output voltage requires the use of slow diodes or
VBR 2nVIN V°, =
where VIN is the primary DC bus voltage, n is the transformer turns ratio (1:n) and V0 is the output voltage. We note that the voltage stress (1) could be very high in high voltage applications with wide ranges of input or output voltages. In general, the use of simple auxiliary circuits to reduce the circulating current may result in severe parasitic ringing and over-voltage stresses on the secondary side, especially when the input and/or the output voltage change in a wide range. An energy recovery clamp has been proposed in [11] to address
L D
Db3 1D5
34~aec
DD-1
S
Si
C,I
SotfFCC
I1.nfD
D, :
,c
S.
D4I)
Q
|[
DIMSi
Figure 1. Phase-shifted full bridge DC-DC converter with a simple auxiliary circuit for ZVZCS [5].
1-4244-0714-1/07/$20.00 C 2007 IEEE.
(1)
969
the second problem. By eliminating dissipative resistive clamp components, this scheme improves the overall converter efficiency over a relatively wide range of duty cycles (from 0.5 to 1), but requires a separate circuit to address the circulating current in the primary side. In addition, this circuit limits the output bridge voltage to the output voltage: (2) VBR = VO In this paper we propose an improved PSFB DC-DC converter using only a modified energy recovery clamp circuit attached at the secondary side of the transformer, as shown in Fig 2. The proposed circuit has stacked output windings to reduce voltage stress across the output diodes. Also, using a minimal number of parts and no additional active switches, the maximum diode voltage is clamped to the output voltage without imposing limitations on the operating range of duty cycles. The same clamping circuit can be applied to the known ZVZCS solutions [4-10] in order to reduce the diode bridge voltage, which is beneficial in high voltage applications, and to reduce the primary circulating current, which is particularly important in applications with wide input and/or output voltage changes. Section II describes the PSFB DC-DC circuit with the proposed energy recovery snubber and its operating waveforms. An extension to ZVZCS operation is presented in Section III. Section IV presents experimental waveforms and efficiency measurements on a 1500 V/25 kW converter prototype with the proposed energy recovery snubber.
considered in this paper, the input voltage is obtained from a three phase rectified voltage (342 Vac to 528 Vac), the output DC voltage is 1500 V, the output power is up to 25 kW, and the IGBTs are switched at 32 kHz. A. Energy Recovery Snubberfor the Output Diode Bridge The PSFB converter voltage stress on the output diodes is a
major concern in high voltage applications. One approach to
clamp the diode peak voltage, proposed in [11], is to split the secondary winding into two windings, use two rectified bridges and then stack the outputs. An advantage of this approach is that each bridge needs to handle only one half of the operating voltage (around 1500 V at 528 Vac input and a duty cycle close to 0.5). The reduced voltage simplifies implementation of the snubber circuits. A dissipative snubber such as an RC circuit across the diodes can be used, but at the expense of reduced efficiency. Energy recovery ("non-dissipative") diode/capacitor snubbers [5-8] allow the voltage to ring above the secondary voltage. The solution proposed in [5] claims the minimum voltage across the output diode bridge. In our design example, the minimum voltage across the diode bridge would be [5]:
Vsec min = 2
The latest generation of fast high-voltage, high-current IGBTs allows hard switching at up to about 20 kHz. Soft switching configurations, such as PSFB can operate at 30 to 40 kHz in high power, high voltage applications. In the application
fDDo L
34 ae sQL!
S4 n
Si
D _5
1)4 D6
L,
_
I
(
d
.o
D
Cf )
2250V
C~
I n
_
L
=
2
(3)
From (3) it is clear that a practical implementation of the diode bridge would require a minimum of two 1200V diodes in series together with an appropriate voltage sharing circuit, which also needs to handle the difference in diode recovery currents. In this paper we propose a new non-dissipative snubber shown in Fig. 2. If inductors Ls are shorted, then diodes DI5 and D16 clamp the peak bridge voltage to the output voltage (1500 V), similar to the circuit described in [11]. As a result, 1700 V diodes can be used (with acceptable switching losses
II. PHASE-SHIFTED FULL BRIDGE DC-DC CONVERTER WITH ENERGY RECOVERY CLAMPING CIRCUIT
19X IDD
out
n * Vin max
DD
7Q
V
SI
Lo
SI DI
IBR
I
0C
I4
Figure 2. Phase-shifted full bridge DC-DC converter with the proposed energy recovery clamping circuit
970
4
V-
a) Turn on transition Prior to t = 0, switches SI and S4 are on and the output inductor current circulates through the secondary diode bridges. At t = 0 switch S4 turns off and switch S3 turns on. As a result, positive voltage VIN is applied across the transformer primary. This changes the direction of the primary current, recovers the diode bridges, and generates the positive voltage VSEC on the secondary side. A resonant circuit is formed including transformer leakage inductance LL and the snubber capacitance Cs. The snubber capacitor voltage, vc,(t), can be found as: (1- cos(cos t)) + V0 cos(cos t) + Vcs (t) V=E SEC
'D1 16 -------
IIL-
.1
_.f
1ii
+0sin(cot) ±RL fs
+I
(4)
RC c
while the leakage inductor current, iLL(t), can be calculated as:
0
t t
Ts2
I
t
ti t4
LLL (t)
Is
Ts!
C
V0 ) LL
sin(ow)t)+I R cos(w)t). s s
At t = 0 the leakage current is: i (0)
Figure 3. Typical waveforms for PSFB with proposed nondissipative clamping circuit
=
(5)
IL + I . This interval
ends at t1 when the current iLL(t) reaches ILO and diode D16 stops conducting; t1 can be calculated from (5). By replacing t1 into (4) the maximum voltage across snubber capacitors Cs is obtained as Vc, max = vc, (t,) This voltage is also the maximum voltage across the output diode bridge.
at 32 kHz switching frequency). If the secondary voltage is greater than the output voltage (or D 0.5), then most of the output current flows through diodes D15 and D16, which is not acceptable. In order to eliminate this problem, the circuit is modified by adding snubber inductance Ls and capacitance Cs. Now diodes D15 and D16 deliver energy to snubber capacitor Cs, which gets discharged through snubber inductor Ls during the free-wheeling period. Typical waveforms in the proposed circuit are shown in Fig. 3 for D=0.48, which is the minimum duty cycle in our application. During one switching period, the circuit goes through six different stages, which are listed as (a) through (f). Variables used in the equations below are: - VIN, VO - input dc bus voltage (primary bus voltage) and output voltage, respectively - n - transformer turns ratio (1:n primary to secondary) =
-
IL +(VSEC
b) On state (SI and S3 are on) After t = tl, switches SI and S3 are still on and the energy from the leakage inductance, caused by the output diode recovery current, has been transferred to the snubber capacitors. During this interval the energy has been transferred from primary side to the output, which is the standard mode of operation for the phase shifted bridge topology. In addition, during this interval energy from the snubber capacitor is delivered to the output capacitors through the snubber inductors. At t1 the snubber capacitor is discharged through the snubber inductor. If a large snubber inductance is used, then the inductor current is approximately DC, as shown in Fig 3. Equation (5) gives the charging snubber capacitor current. The average value of this current is the inductor snubber current: t 2 tJL
VSEC - secondary voltage (VSEC = nVIN )
LL - transformer leakage inductance measured from the secondary side - Cs -snubber capacitor - cos - resonant frequency, cs = 1 LL CS - IR - output diode bridge peak reverse recovery current - ILo - output inductor current (assumed to be constant in this analysis) - Ip - transformer primary current
-
I
(td
(6)
The output inductor current is reduced by the snubber inductor current in (6):
ILo = IOUT ILS
971
(7)
not significantly affect the primary circulating current and the associated conduction losses.
The primary current at the end of this interval (initiated when transistor S3 turns off) can be calculated as: (8) IP (t2) = 2nILO
C. Simulation results A 1500 V/25 kW power supply based on the proposed PSFB converter shown in Fig. 2 has been simulated in Saber®. The switching frequency is 32 kHz and the component values are: LL=8 gH and Cs=0.22 RF, LS=200 gH, CO=440 RF, Lo=2 mH, n=2. The output bridge is built with Semikron's SKKD60F diodes (rated at 60A and 1700V). The simulation model includes a Saber output diode model to account for the diode reverse recovery.
c) Passive state (SI and S4 are on) After t = t2, switches SI and S4 are on, the output inductor current circulates through the output diode bridges, and the primary cuffent circulates through switches SI and S4. This is the same mode of operation as for the standard PSFB. The primary current stays essentially the same since the conduction losses are very low. The snubber capacitors are still delivering energy to the output through the snubber inductors. This subinterval ends when switch SI turns off and switch S2 turns on.
2kV-
VBR
d) to f) states The states (d) to (f) are the same as the states (a) to (c), except that the roles of the switches SI, S4 are played by the switches S2 and S3, and vice versa. The circuit behavior during the next half switching period is symmetrical.
VL 40A 0
B. Operation at Various Duty Cycles For D 0.5, we have VSEC VO so that (4) and (5) can be simplified. From (4), t1 = 'z /2xso, and the maximum diode bridge voltage can be found as: =
-IOA. ILS
=
VCS
max
= VO +IR
LL
0
(9)
Cs
SEC
IN
II
t (!Ous/div)
IRLL ,
v
SEC
-V
0
IRLL nV -V IN
II-
Figure 4. Simulation results for the proposed PSFB: Vin=730V, D=0.48 RN)
V
0
1 ()V
which is still significantly lower than in the ZCS circuits described in [4-10]. Also, in this case a part of the output power is transferred through the snubber circuit. Hence the output inductor (Lo) current and the primary current are lower at t2 compared to the standard PSFB. As a result, the primary circulating current is lower and the turn off losses are lower, which can be a significant advantage. In the case D > 0.5, the snubber capacitor is charged up by the energy stored in the leakage inductor. Since the secondary voltage is lower than the output voltage, the snubber current through D16 (or D15) decreases linearly and t1 can be calculated as: 1i
X
00
As an example, in our experimental prototype the reverse recovery cuffent is IR = 12 A, and the maximum bridge maximum voltage is only 35 V above the output voltage. For D 0.5. For D < 0.5 additional snubber capacitor and inductor are required, as shown in Fig 2. Typical waveforms in the proposed circuit are shown in Fig. 7 for Vin=600 V. During one half of the switching period, the circuit goes through six different stages, which are listed as (a) through (f). Variables used in the equations are the same as in Section II.
so lt e
cos(co-t))+
2 (
(13)
(12)
4340 V
1(i
v SEC
S
Sh
RL
FzS C D
Figure 6. PSB DC-DC converter with the ZVZCT [5] and energy recovery clamping circuit
973
switch SI turns off (now under zero current condition) and switch S2 turns on (under zero current condition). This ends the first half cycle.
voltage. c) Stage t2 to t3 At t = t2, the leakage inductor energy is completely transferred to the output through diode D15. The clamping circuit does not affect circuit operation further. During this interval the output current flows through the secondary windings and output inductors. The output diode bridge voltage is equal to the secondary voltage. This interval ends when switch S3 turns of and switch S4 turns on.
g) to m) stages The stages (g) to (m) are the same as the stages (a) to (f), except that the roles of the switches S1, S4 are played by the switches S2 and S3, and vice versa. Circuit behavior during the next half switching period is symmetrical and therefore similar to the behavior observed during subintervals (a) to (f).
d) Stage t3 to t4
B. Simulation Results
At t = t3, switches SI and S4 are on and the secondary voltage starts decreasing. The output inductor current starts transitioning from the secondary winding (leakage inductance) to the snubber capacitors (as described in [5]). Since the secondary voltage is still high, this creates a negative voltage across the primary winding and the primary current starts decreasing. This interval ends when the primary current drops
The simulation model for the circuit of Fig. 6 is based on the same parameters as in Section II: the switching frequency is 32 kHz and the component values are: LL=8 gH and CS=0.066 gF, CO=440 gF, Lo=2 mH, n=2. The output diode bridge is built again with Semikron's SKKD60F diodes (rated at 60A, and 1700V).
to zero.
2kV
e) Stage t4 to t5 After t = t4, the primary current is zero and the output inductor current flows through the snubber capacitor. This is approximately constant current that linearly decreases the snubber capacitor voltage. This interval ends when the voltage across the snubber capacitor drops to zero.
..
x
0 0f,
..
.
.
..
.
..
.....
.
.
..
.
300A ....................
0
f) Stage t5 to t6 At t = t5 the snubber capacitor is discharged to zero and the output inductor current is switched from the snubber capacitor to the output diode bridges. The primary and secondary voltages are zero during this interval. This interval ends when
IF.. .....=...............
I50A
.
..
.
..
.
.
..
,s... .
.
..
..
..
..
.
.
A
...........
IkVE
I
NCS
0
IC
2kV
....
.............
,V(2
,
,
,
%
.N,.
........
....
I
N
,
.........
.
..
..........
*
1
5
I..........I ................ 1%,
0
PI
.
...........................................
................
.
4
.
50A I
.
t
(4uwdiv)
Figure 8. Simulation results for the PSFB of Fig. 6.
Simulation results for D>0.5 (D=0.65, for Vin=650 Vdc) shown in Fig 8. Without the clamp circuit (D15 and D16) the maximum output diode bridge would be 1800 V. With the proposed clamping circuit, the maximum voltage is limited to 1500 V, which allows using 1700 V diodes and considerably simplifies the output diode bridge design. are
VB ~R
nV
w
0
t
tL)
t3 t4
tI
To
Figure 7. Typical waveforms for PSFB with ZVZCS and the energy recovery clamping circuit
974
schemes to decrease the voltage across the output diode bridge at a small expense of 2 additional diodes for D > 0.5. The paper describes an experimental 25 kW (1500 V, 16.7 A) PSFB converter which, operating at 32 kHz, achieves efficiency of 95 %. The output stage design, which is based on stacked dual outputs, requires very few components: ten 1700 V diodes, two small snubber capacitors (1000 Vdc/6 Arms), and two small snubber inductors (200 gH/6 Arms). Losses, voltage across the diode bridges, cost, and efficiency of the experimental prototype compare favorably against previously proposed schemes.
IV. EXPERIMENTAL RESULTS
The PSFB converter with the energy recovery clamping circuit shown in Fig. 2 has been used to construct an experimental 1500 V/25 kW power supply. The switching frequency is 32 kHz and the component values are: Powerex fast IGBTs (CM150DU-24NFH), Semikron fast 1700 V SKKD60F diodes, LL=8 gH and Cs=0.22 gF, LS=200 gH, Co=440 gF, Lo=2 mH, n=2. For the circuit analysis the dc bus voltage was varied over the range from 450 Vdc to 620 Vdc (corresponding to the rectified three phase 380 Vac line -10 % to the rectified three phase 480 Vac line + 10 %). For D < 0.5, simulation results are shown in Fig 4. Experimental waveforms are shown in Fig 9. A very good match between predicted, simulated, and experimental results can be observed. About 15 % of the total output current is delivered by proposed snubber (see snubber inductor current in Fig 9), which, in turns, reduces the primary circulating current by about 15 %. Measured efficiency at 528 Vac is close to 95 % at full load. Loss analysis shows that the proposed circuit on the secondary side (dual bridge conduction and recovery losses for the 1700 V diodes used in this design) contributes to losses of about 1.7 %. The IGBT losses are measured to be around 2.2 %
REFERENCES [1]
[2]
[3]
[4]
[5] i..........
[6]
CH1- Snubber Inductor Current 2A/div CH2- Snubber Capacitr Current 5ANdiv
i CH3- Snubber Capacitor Voltage
[7]
500VIdiv
[8] [9] [10]
[11]
Figure 9. Waveforms in the experimental prototype for D=0.48
V. CONCLUSIONS
This paper introduces a new energy recovery ("nondissipative") snubber for the phase-shifted full bridge dc-dc converter for high voltage, high power applications. The circuit can be operated by itself over a wide range of duty cycles, and with reduced primary circulating current (for D < 0.5). This circuit can be also added to known ZVZCS
975
J. A. Sabate, V. Vlatkovic, R. B. Ridley, F. C. Lee, and B. H. Cho, "Design considerations for high-voltage high-powerfill-bridge zerovoltage-switched PWM converter, " IEEE APEC Rec. 1990, pp. 275284. R. Redl, N. 0. Sokal, and L. Balogh, "A novel soft switchingfill bridge de/de converter: analysis, design considerations, and experimental results at 1.5KW, 100KHz, " IEEE PESC Rec. 1990, pp. 162-172. Dhaval B. Dalal, "A 500KHz Multi-Output Converter with Zero
Voltage Switching," APEC, 1990, pp.265-274 E.S. Kim, K.Y. Joe, M.H. Kye, Y.H. Kim, B.D. Yoon, "An Improved Soft Switching PWM FB DC/DC Converter for Reducing Conduction Losses, " IEEE Transaction on Power Electronics, Vol. 14,No.2, March, l999,pp.258-264 J.G.Cho; J.W.Baek; C.Y.Jeong; G.H.Rim," Novel Zero- Voltage and Zero-Current-Switching (ZVZCS) Full Bridge PWM Converter Using A Simple Auxiliary Circuit, ". IEEE Transaction on IA, Vol 35, Issue 1, Jan. -Feb. 1999 Page(s): 15 - 20. G. Hua, E. X. Yang, Y. Jiang, and F. C. Lee, "Novel zero-currenttransition PWM converters, " IEEE PESC Rec. 1993, pp. 538-544. J. G. Cho, J. Sabate, G. Hua, and F. C. Lee, "Zero voltage and zero current switching full bridge PWM converter for high power applications," IEEE PESC Rec. 1994, pp. 102-108. J. G. Cho, G. H. Rim, and F. C. Lee, "Zero voltage and zero current switching full bridge PWM converter secondary active clamp, " IEEE PESC Rec. 1996, pp. pp. 657-663. E. S. Kim, K. Y. Cho, et. Al., "An improved soft switching PWM FB dc/dc converterfor reducing conduction loss, " IEEE PESC Rec. 1996, pp.pp. 651- 57. Jung G. Cho, et. al., "Zero voltage and zero current switching full bridge PWM converter using transformer auxiliary winding, " IEEE PESC 1997 Rec., pp 227- 232. A. Bendre, S. Norris, D. Divan, I. Wallace, R. W. Gascoigne, "New High Power DC-DC Converter With Loss Limited Switching and Lossless Secondary Clamp" IEEE Transaction on Power Electronics, Vol. 18, no. 4, July 2003, pp 1020-1027.
Dragan Maksimovic
Colorado Power Electronics Center ECE Department University of Colorado at Boulder, USA maksimov @ colorado. edu
Advanced Energy 1625 Sharp Point Drive Fort Collins, CO 80525 milan. ilic@ aei. com Abstract - This paper introduces a full bridge converter with reduced circulating current and a reduction of the switch conduction and turn-off losses achieved by an energy recovery secondary clamp circuit. The proposed clamp circuit allows the converter to operate with wide input or output voltage range with minimum voltage stress across the output diodes. The paper describes an experimental 25 kW (1500 V, 16.7 A) full bridge converter operating at 32 kHz switching frequency. Losses and efficiency of the experimental prototype compare favorably against the standard full bridge and previously proposed zerovoltage/zero-current switching configurations.
stacked faster diodes. To address over-voltages and severe parasitic ringing in the secondary side, voltage sharing and voltage clamping circuits (snubbers) are required. However, in high power, high voltage applications, losses in standard dissipative snubbers can be very significant. To address the first problem, zero-voltage, zero-current switching (ZVZCS) PSFB DC-DC converters using auxiliary circuits have been presented [4-10]. One efficient circuit that achieves ZVZCS with a relatively simple auxiliary circuit on the secondary side is shown in Fig 1 [5]. The snubber circuit, which consists of only two diodes (Ds1 and DS2) and one capacitor (Cs), provides ZVZCS, transfers energy from the transformer leakage inductance to the output capacitor, and significantly reduces the voltage across the output bridge. For example, the voltage across the diode bridge, VBR, in the circuit shown in Fig. 1 is clamped to:
I. INTRODUCTION
The phase-shifted full bridge (PSFB) DC-DC converter has been proposed to reduce component stresses and switching losses compared to the traditional hard-switching pulse-widthmodulated (PWM) bridge converter [1-3]. However, PSFB has two disadvantages in high power and high voltage applications: 1) Because of the phase-shifted PWM control, a circulating current, which is the sum of the reflected output current (n*I0) and the transformer primary magnetizing current, flows through the transformer and switching devices during freewheeling intervals. As a result, the switch and transformer RMS current stresses are higher compared to the conventional hard-switching PWM full-bridge converter. 2) High output voltage requires the use of slow diodes or
VBR 2nVIN V°, =
where VIN is the primary DC bus voltage, n is the transformer turns ratio (1:n) and V0 is the output voltage. We note that the voltage stress (1) could be very high in high voltage applications with wide ranges of input or output voltages. In general, the use of simple auxiliary circuits to reduce the circulating current may result in severe parasitic ringing and over-voltage stresses on the secondary side, especially when the input and/or the output voltage change in a wide range. An energy recovery clamp has been proposed in [11] to address
L D
Db3 1D5
34~aec
DD-1
S
Si
C,I
SotfFCC
I1.nfD
D, :
,c
S.
D4I)
Q
|[
DIMSi
Figure 1. Phase-shifted full bridge DC-DC converter with a simple auxiliary circuit for ZVZCS [5].
1-4244-0714-1/07/$20.00 C 2007 IEEE.
(1)
969
the second problem. By eliminating dissipative resistive clamp components, this scheme improves the overall converter efficiency over a relatively wide range of duty cycles (from 0.5 to 1), but requires a separate circuit to address the circulating current in the primary side. In addition, this circuit limits the output bridge voltage to the output voltage: (2) VBR = VO In this paper we propose an improved PSFB DC-DC converter using only a modified energy recovery clamp circuit attached at the secondary side of the transformer, as shown in Fig 2. The proposed circuit has stacked output windings to reduce voltage stress across the output diodes. Also, using a minimal number of parts and no additional active switches, the maximum diode voltage is clamped to the output voltage without imposing limitations on the operating range of duty cycles. The same clamping circuit can be applied to the known ZVZCS solutions [4-10] in order to reduce the diode bridge voltage, which is beneficial in high voltage applications, and to reduce the primary circulating current, which is particularly important in applications with wide input and/or output voltage changes. Section II describes the PSFB DC-DC circuit with the proposed energy recovery snubber and its operating waveforms. An extension to ZVZCS operation is presented in Section III. Section IV presents experimental waveforms and efficiency measurements on a 1500 V/25 kW converter prototype with the proposed energy recovery snubber.
considered in this paper, the input voltage is obtained from a three phase rectified voltage (342 Vac to 528 Vac), the output DC voltage is 1500 V, the output power is up to 25 kW, and the IGBTs are switched at 32 kHz. A. Energy Recovery Snubberfor the Output Diode Bridge The PSFB converter voltage stress on the output diodes is a
major concern in high voltage applications. One approach to
clamp the diode peak voltage, proposed in [11], is to split the secondary winding into two windings, use two rectified bridges and then stack the outputs. An advantage of this approach is that each bridge needs to handle only one half of the operating voltage (around 1500 V at 528 Vac input and a duty cycle close to 0.5). The reduced voltage simplifies implementation of the snubber circuits. A dissipative snubber such as an RC circuit across the diodes can be used, but at the expense of reduced efficiency. Energy recovery ("non-dissipative") diode/capacitor snubbers [5-8] allow the voltage to ring above the secondary voltage. The solution proposed in [5] claims the minimum voltage across the output diode bridge. In our design example, the minimum voltage across the diode bridge would be [5]:
Vsec min = 2
The latest generation of fast high-voltage, high-current IGBTs allows hard switching at up to about 20 kHz. Soft switching configurations, such as PSFB can operate at 30 to 40 kHz in high power, high voltage applications. In the application
fDDo L
34 ae sQL!
S4 n
Si
D _5
1)4 D6
L,
_
I
(
d
.o
D
Cf )
2250V
C~
I n
_
L
=
2
(3)
From (3) it is clear that a practical implementation of the diode bridge would require a minimum of two 1200V diodes in series together with an appropriate voltage sharing circuit, which also needs to handle the difference in diode recovery currents. In this paper we propose a new non-dissipative snubber shown in Fig. 2. If inductors Ls are shorted, then diodes DI5 and D16 clamp the peak bridge voltage to the output voltage (1500 V), similar to the circuit described in [11]. As a result, 1700 V diodes can be used (with acceptable switching losses
II. PHASE-SHIFTED FULL BRIDGE DC-DC CONVERTER WITH ENERGY RECOVERY CLAMPING CIRCUIT
19X IDD
out
n * Vin max
DD
7Q
V
SI
Lo
SI DI
IBR
I
0C
I4
Figure 2. Phase-shifted full bridge DC-DC converter with the proposed energy recovery clamping circuit
970
4
V-
a) Turn on transition Prior to t = 0, switches SI and S4 are on and the output inductor current circulates through the secondary diode bridges. At t = 0 switch S4 turns off and switch S3 turns on. As a result, positive voltage VIN is applied across the transformer primary. This changes the direction of the primary current, recovers the diode bridges, and generates the positive voltage VSEC on the secondary side. A resonant circuit is formed including transformer leakage inductance LL and the snubber capacitance Cs. The snubber capacitor voltage, vc,(t), can be found as: (1- cos(cos t)) + V0 cos(cos t) + Vcs (t) V=E SEC
'D1 16 -------
IIL-
.1
_.f
1ii
+0sin(cot) ±RL fs
+I
(4)
RC c
while the leakage inductor current, iLL(t), can be calculated as:
0
t t
Ts2
I
t
ti t4
LLL (t)
Is
Ts!
C
V0 ) LL
sin(ow)t)+I R cos(w)t). s s
At t = 0 the leakage current is: i (0)
Figure 3. Typical waveforms for PSFB with proposed nondissipative clamping circuit
=
(5)
IL + I . This interval
ends at t1 when the current iLL(t) reaches ILO and diode D16 stops conducting; t1 can be calculated from (5). By replacing t1 into (4) the maximum voltage across snubber capacitors Cs is obtained as Vc, max = vc, (t,) This voltage is also the maximum voltage across the output diode bridge.
at 32 kHz switching frequency). If the secondary voltage is greater than the output voltage (or D 0.5), then most of the output current flows through diodes D15 and D16, which is not acceptable. In order to eliminate this problem, the circuit is modified by adding snubber inductance Ls and capacitance Cs. Now diodes D15 and D16 deliver energy to snubber capacitor Cs, which gets discharged through snubber inductor Ls during the free-wheeling period. Typical waveforms in the proposed circuit are shown in Fig. 3 for D=0.48, which is the minimum duty cycle in our application. During one switching period, the circuit goes through six different stages, which are listed as (a) through (f). Variables used in the equations below are: - VIN, VO - input dc bus voltage (primary bus voltage) and output voltage, respectively - n - transformer turns ratio (1:n primary to secondary) =
-
IL +(VSEC
b) On state (SI and S3 are on) After t = tl, switches SI and S3 are still on and the energy from the leakage inductance, caused by the output diode recovery current, has been transferred to the snubber capacitors. During this interval the energy has been transferred from primary side to the output, which is the standard mode of operation for the phase shifted bridge topology. In addition, during this interval energy from the snubber capacitor is delivered to the output capacitors through the snubber inductors. At t1 the snubber capacitor is discharged through the snubber inductor. If a large snubber inductance is used, then the inductor current is approximately DC, as shown in Fig 3. Equation (5) gives the charging snubber capacitor current. The average value of this current is the inductor snubber current: t 2 tJL
VSEC - secondary voltage (VSEC = nVIN )
LL - transformer leakage inductance measured from the secondary side - Cs -snubber capacitor - cos - resonant frequency, cs = 1 LL CS - IR - output diode bridge peak reverse recovery current - ILo - output inductor current (assumed to be constant in this analysis) - Ip - transformer primary current
-
I
(td
(6)
The output inductor current is reduced by the snubber inductor current in (6):
ILo = IOUT ILS
971
(7)
not significantly affect the primary circulating current and the associated conduction losses.
The primary current at the end of this interval (initiated when transistor S3 turns off) can be calculated as: (8) IP (t2) = 2nILO
C. Simulation results A 1500 V/25 kW power supply based on the proposed PSFB converter shown in Fig. 2 has been simulated in Saber®. The switching frequency is 32 kHz and the component values are: LL=8 gH and Cs=0.22 RF, LS=200 gH, CO=440 RF, Lo=2 mH, n=2. The output bridge is built with Semikron's SKKD60F diodes (rated at 60A and 1700V). The simulation model includes a Saber output diode model to account for the diode reverse recovery.
c) Passive state (SI and S4 are on) After t = t2, switches SI and S4 are on, the output inductor current circulates through the output diode bridges, and the primary cuffent circulates through switches SI and S4. This is the same mode of operation as for the standard PSFB. The primary current stays essentially the same since the conduction losses are very low. The snubber capacitors are still delivering energy to the output through the snubber inductors. This subinterval ends when switch SI turns off and switch S2 turns on.
2kV-
VBR
d) to f) states The states (d) to (f) are the same as the states (a) to (c), except that the roles of the switches SI, S4 are played by the switches S2 and S3, and vice versa. The circuit behavior during the next half switching period is symmetrical.
VL 40A 0
B. Operation at Various Duty Cycles For D 0.5, we have VSEC VO so that (4) and (5) can be simplified. From (4), t1 = 'z /2xso, and the maximum diode bridge voltage can be found as: =
-IOA. ILS
=
VCS
max
= VO +IR
LL
0
(9)
Cs
SEC
IN
II
t (!Ous/div)
IRLL ,
v
SEC
-V
0
IRLL nV -V IN
II-
Figure 4. Simulation results for the proposed PSFB: Vin=730V, D=0.48 RN)
V
0
1 ()V
which is still significantly lower than in the ZCS circuits described in [4-10]. Also, in this case a part of the output power is transferred through the snubber circuit. Hence the output inductor (Lo) current and the primary current are lower at t2 compared to the standard PSFB. As a result, the primary circulating current is lower and the turn off losses are lower, which can be a significant advantage. In the case D > 0.5, the snubber capacitor is charged up by the energy stored in the leakage inductor. Since the secondary voltage is lower than the output voltage, the snubber current through D16 (or D15) decreases linearly and t1 can be calculated as: 1i
X
00
As an example, in our experimental prototype the reverse recovery cuffent is IR = 12 A, and the maximum bridge maximum voltage is only 35 V above the output voltage. For D 0.5. For D < 0.5 additional snubber capacitor and inductor are required, as shown in Fig 2. Typical waveforms in the proposed circuit are shown in Fig. 7 for Vin=600 V. During one half of the switching period, the circuit goes through six different stages, which are listed as (a) through (f). Variables used in the equations are the same as in Section II.
so lt e
cos(co-t))+
2 (
(13)
(12)
4340 V
1(i
v SEC
S
Sh
RL
FzS C D
Figure 6. PSB DC-DC converter with the ZVZCT [5] and energy recovery clamping circuit
973
switch SI turns off (now under zero current condition) and switch S2 turns on (under zero current condition). This ends the first half cycle.
voltage. c) Stage t2 to t3 At t = t2, the leakage inductor energy is completely transferred to the output through diode D15. The clamping circuit does not affect circuit operation further. During this interval the output current flows through the secondary windings and output inductors. The output diode bridge voltage is equal to the secondary voltage. This interval ends when switch S3 turns of and switch S4 turns on.
g) to m) stages The stages (g) to (m) are the same as the stages (a) to (f), except that the roles of the switches S1, S4 are played by the switches S2 and S3, and vice versa. Circuit behavior during the next half switching period is symmetrical and therefore similar to the behavior observed during subintervals (a) to (f).
d) Stage t3 to t4
B. Simulation Results
At t = t3, switches SI and S4 are on and the secondary voltage starts decreasing. The output inductor current starts transitioning from the secondary winding (leakage inductance) to the snubber capacitors (as described in [5]). Since the secondary voltage is still high, this creates a negative voltage across the primary winding and the primary current starts decreasing. This interval ends when the primary current drops
The simulation model for the circuit of Fig. 6 is based on the same parameters as in Section II: the switching frequency is 32 kHz and the component values are: LL=8 gH and CS=0.066 gF, CO=440 gF, Lo=2 mH, n=2. The output diode bridge is built again with Semikron's SKKD60F diodes (rated at 60A, and 1700V).
to zero.
2kV
e) Stage t4 to t5 After t = t4, the primary current is zero and the output inductor current flows through the snubber capacitor. This is approximately constant current that linearly decreases the snubber capacitor voltage. This interval ends when the voltage across the snubber capacitor drops to zero.
..
x
0 0f,
..
.
.
..
.
..
.....
.
.
..
.
300A ....................
0
f) Stage t5 to t6 At t = t5 the snubber capacitor is discharged to zero and the output inductor current is switched from the snubber capacitor to the output diode bridges. The primary and secondary voltages are zero during this interval. This interval ends when
IF.. .....=...............
I50A
.
..
.
..
.
.
..
,s... .
.
..
..
..
..
.
.
A
...........
IkVE
I
NCS
0
IC
2kV
....
.............
,V(2
,
,
,
%
.N,.
........
....
I
N
,
.........
.
..
..........
*
1
5
I..........I ................ 1%,
0
PI
.
...........................................
................
.
4
.
50A I
.
t
(4uwdiv)
Figure 8. Simulation results for the PSFB of Fig. 6.
Simulation results for D>0.5 (D=0.65, for Vin=650 Vdc) shown in Fig 8. Without the clamp circuit (D15 and D16) the maximum output diode bridge would be 1800 V. With the proposed clamping circuit, the maximum voltage is limited to 1500 V, which allows using 1700 V diodes and considerably simplifies the output diode bridge design. are
VB ~R
nV
w
0
t
tL)
t3 t4
tI
To
Figure 7. Typical waveforms for PSFB with ZVZCS and the energy recovery clamping circuit
974
schemes to decrease the voltage across the output diode bridge at a small expense of 2 additional diodes for D > 0.5. The paper describes an experimental 25 kW (1500 V, 16.7 A) PSFB converter which, operating at 32 kHz, achieves efficiency of 95 %. The output stage design, which is based on stacked dual outputs, requires very few components: ten 1700 V diodes, two small snubber capacitors (1000 Vdc/6 Arms), and two small snubber inductors (200 gH/6 Arms). Losses, voltage across the diode bridges, cost, and efficiency of the experimental prototype compare favorably against previously proposed schemes.
IV. EXPERIMENTAL RESULTS
The PSFB converter with the energy recovery clamping circuit shown in Fig. 2 has been used to construct an experimental 1500 V/25 kW power supply. The switching frequency is 32 kHz and the component values are: Powerex fast IGBTs (CM150DU-24NFH), Semikron fast 1700 V SKKD60F diodes, LL=8 gH and Cs=0.22 gF, LS=200 gH, Co=440 gF, Lo=2 mH, n=2. For the circuit analysis the dc bus voltage was varied over the range from 450 Vdc to 620 Vdc (corresponding to the rectified three phase 380 Vac line -10 % to the rectified three phase 480 Vac line + 10 %). For D < 0.5, simulation results are shown in Fig 4. Experimental waveforms are shown in Fig 9. A very good match between predicted, simulated, and experimental results can be observed. About 15 % of the total output current is delivered by proposed snubber (see snubber inductor current in Fig 9), which, in turns, reduces the primary circulating current by about 15 %. Measured efficiency at 528 Vac is close to 95 % at full load. Loss analysis shows that the proposed circuit on the secondary side (dual bridge conduction and recovery losses for the 1700 V diodes used in this design) contributes to losses of about 1.7 %. The IGBT losses are measured to be around 2.2 %
REFERENCES [1]
[2]
[3]
[4]
[5] i..........
[6]
CH1- Snubber Inductor Current 2A/div CH2- Snubber Capacitr Current 5ANdiv
i CH3- Snubber Capacitor Voltage
[7]
500VIdiv
[8] [9] [10]
[11]
Figure 9. Waveforms in the experimental prototype for D=0.48
V. CONCLUSIONS
This paper introduces a new energy recovery ("nondissipative") snubber for the phase-shifted full bridge dc-dc converter for high voltage, high power applications. The circuit can be operated by itself over a wide range of duty cycles, and with reduced primary circulating current (for D < 0.5). This circuit can be also added to known ZVZCS
975
J. A. Sabate, V. Vlatkovic, R. B. Ridley, F. C. Lee, and B. H. Cho, "Design considerations for high-voltage high-powerfill-bridge zerovoltage-switched PWM converter, " IEEE APEC Rec. 1990, pp. 275284. R. Redl, N. 0. Sokal, and L. Balogh, "A novel soft switchingfill bridge de/de converter: analysis, design considerations, and experimental results at 1.5KW, 100KHz, " IEEE PESC Rec. 1990, pp. 162-172. Dhaval B. Dalal, "A 500KHz Multi-Output Converter with Zero
Voltage Switching," APEC, 1990, pp.265-274 E.S. Kim, K.Y. Joe, M.H. Kye, Y.H. Kim, B.D. Yoon, "An Improved Soft Switching PWM FB DC/DC Converter for Reducing Conduction Losses, " IEEE Transaction on Power Electronics, Vol. 14,No.2, March, l999,pp.258-264 J.G.Cho; J.W.Baek; C.Y.Jeong; G.H.Rim," Novel Zero- Voltage and Zero-Current-Switching (ZVZCS) Full Bridge PWM Converter Using A Simple Auxiliary Circuit, ". IEEE Transaction on IA, Vol 35, Issue 1, Jan. -Feb. 1999 Page(s): 15 - 20. G. Hua, E. X. Yang, Y. Jiang, and F. C. Lee, "Novel zero-currenttransition PWM converters, " IEEE PESC Rec. 1993, pp. 538-544. J. G. Cho, J. Sabate, G. Hua, and F. C. Lee, "Zero voltage and zero current switching full bridge PWM converter for high power applications," IEEE PESC Rec. 1994, pp. 102-108. J. G. Cho, G. H. Rim, and F. C. Lee, "Zero voltage and zero current switching full bridge PWM converter secondary active clamp, " IEEE PESC Rec. 1996, pp. pp. 657-663. E. S. Kim, K. Y. Cho, et. Al., "An improved soft switching PWM FB dc/dc converterfor reducing conduction loss, " IEEE PESC Rec. 1996, pp.pp. 651- 57. Jung G. Cho, et. al., "Zero voltage and zero current switching full bridge PWM converter using transformer auxiliary winding, " IEEE PESC 1997 Rec., pp 227- 232. A. Bendre, S. Norris, D. Divan, I. Wallace, R. W. Gascoigne, "New High Power DC-DC Converter With Loss Limited Switching and Lossless Secondary Clamp" IEEE Transaction on Power Electronics, Vol. 18, no. 4, July 2003, pp 1020-1027.
