Point of sale (POS) terminal security system
US006646565B1
(12)
(54)
United States Patent
(10) Patent N0.:
Fu et al.
(45) Date of Patent:
POINT OF SALE (POS) TERMINAL
5,938,472 A
*
8/1999 Yuen et a1. ............... .. 439/509
6,065,679 A
*
5/2000 Levie et al. ......... .. 235/462.47
(75) Inventors: Shuzhen Fu, Roseville, CA (US);
David C. Hanley, Granite Bay, CA (US); Raymond A. DeBruin, Auburn, CA (US); Jack R. Grenfell, Rocklin, CA (Us)
(73) Assignee: Hewlett-Packard Development Company’ L‘P" Houston’ TX (Us) *
N t.
_
S b.
0 Ice‘
tt
d.
1 .
th t
Nov. 11, 2003
5,675,319 A * 10/1997 Rivenberg et a1. ........ .. 340/550
SECURITY SYSTEM
( )
US 6,646,565 B1
ut letc. O artly dlsg almecri’. : dermé)
FOREIGN PATENT DOCUMENTS 0924592 A2 6/1999 WO 99/40501 12/1999 OTHER PUBLICATIONS
EP W0
VeriFOne, Inc” Everest Plus, 2 pages VeriFone, Inc., Yahoo! Finance, “VeriFone Introduces Ever f th.
E‘SGIIC lisi’éb‘gnbs 25‘? gags e ‘m er
est Plus, a NeW and Improved POS Solution for Multi—Lane
Merchants”, http://biZ.yahoo.com/bW/000117/nyiverifoni llliIIl, Feb. 8, 2000, 2 pages. * cited by examiner
(21)
Appl. N0.: 09/586,678 _
(22) Flledi
_ _ Primary Examiner—Ben] amin C. Lee
Jun- 1, 2000
Assistant Examiner—Son Tang
(51)
Int. Cl.7 .............................................. .. G08B 21/00
(52)
US. Cl.
................................... .. 340/687; 340/568.7
(58) Field of Search ............................ .. 340/687, 686.1,
(57)
ABSTRACT _
_
_
_
_
sefzumy System _fOr_ electron“: Clrcults _(e'g'_ electmmc
340/571 5721 5724 5734 590 550.
circuits contained Within a secure POS terminal) is provided
235/384, 385: 380; %05/18:64, 5687, 5681:
that is both more tamper resistant, and tamper'respon'siv'e
5682, 5684, 638, 639, 652, 649; 361/600,
and'less expensive than the prior art epoxy potting. ThlS is
748
achieved by inserting an electrical connector betWeen a ?rst and a second circuit board contained Within a case of the
(56)
References Cited
POS terminal, The ?rst and the second circuit boards are any
US. PATENT DOCUMENTS
limited to, rigid circuit boards, ?exible circuit boards,
type of circuit board known in the art, including both not 3,882,323 A *
5/1975 Smolker ................... .. 307/202
3,982,320 A * 9/1976 Bucho? et aL RE31,114 E
tor no longer provides an electrical connection betWeen the
* 12/1982 Berg ......................... .. 339/17
?rst and the Second clrclllt boards, mggerlng a tamper
4,593,384 A 6/1986 Kleijne 4,811,288 A * 3/1989 Kleijne et a1. 4,849,927 A
*
47860351 A : 4382752 A
Printed Circuit b°aFdS> “0 If the, Case is opePed the Connec'
29/630
7/1989 V0S_ ------------ -
8/1989 Wemgart ~~~~~~~~ ~~
* 11/1989
2
Lmdman et a1‘ ' ' ' ' '
365/52 364/900 713/194 ' ' ' " 380/25
gigilegjfstrilet a1‘ """" " 713/194
5,298,884 A
*
3/1994 Gilmore et a1. .... ..
5,627,520 A
*
5/1997 Grubbs et a1. ............ .. 340/572
detection circuit. In some embodiments of the invention, a ?exible conductive ?lm is Wrapped around the circuit boards and the connector. If a tamperer attempts to penetrate the case of the POS terminal to disable the tamper detection circuit, the circuit on the ?exible security ?lm is interrupted,
in turn triggering the tamper detection circuit.
340/573
26 Claims, 13 Drawing Sheets
U.S. Patent
Nov. 11,2003
Sheet 1 0f 13
US 6,646,565 B1
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7
Q3
/ cm?
ow?
mEifoHEn2;
U.S. Patent
Nov. 11,2003
Sheet 2 0f 13
US 6,646,565 B1
220
Fig. 2A
U.S. Patent
Nov. 11,2003
Sheet 3 0f 13
US 6,646,565 B1
200
270 A
260 A
\ \ \ \\\ \\"
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KY
A.)
\\ \ \\\\\\\ \\\\\ \
/////M \
\§\\Q§§\\\\§\\\\\\\\\\ \\\\\\\\ \\\\ 250
Fig. 2B
\\
2\
U.S. Patent
NOV. 11 2003
Sheet 7 6f 13
335
Fig. 5A
US 6,646,565 B1
U.S. Patent
Nov. 11 2003
Sheet 8 0f 13
Fig. 5B
U.S. Patent
Nov. 11 2003
Sheet 9 0f 13
U.S. Patent
Nov. 11,2003
Sheet 12 0f 13
Fig. 5F
US 6,646,565 B1
U.S. Patent
Nov. 11,2003
Sheet 13 0f 13
US 6,646,565 B1
600
/ Y
Monitor security
/
fence module circuit
Yes
i Erase IPP RAM
Fig. 6
630
US 6,646,565 B1 1
2
POINT OF SALE (POS) TERMINAL
nection betWeen the ?rst and the second circuit boards, triggering a tamper detection circuit.
SECURITY SYSTEM
In some embodiments of the invention, a ?exible con
ductive ?lm is Wrapped around the circuit boards and the BACKGROUND OF THE INVENTION
connector. If a tamperer attempts to drill through the case of
the POS terminal to disable the tamper detection circuit, the circuit on the ?exible security ?lm is interrupted, in turn
1. Field of the Invention
The present invention relates generally to security sys tems and, more speci?cally, to security systems for elec tronic circuits.
triggering the tamper detection circuit. As a result, the secure POS terminal of the present 10
2. Related Art Point of sale (POS) terminals alloW customers to make
payments using a variety of payment instruments such as credit cards, debit cards, smart cards, ATM cards, etc. To ensure that the payment information transmitted from the
terminals. By eliminating the potting process, in fact, the
15
POS terminals to a payment center is not intercepted, this
information is typically encrypted and secured through other means (e.g., digital authentication) during transmissions.
FIG. 1 is a cross-section of a prior art POS terminal. FIG. 2A shoWs a POS terminal, in accordance to an
HoWever, con?dential payment information entered by
embodiment of the present invention.
25
a single module. A cross-section of a typical prior art potted POS terminal 100 is shoWn in FIG. 1. Potted POS terminal 100 includes a top case 110, a bottom case 120, keys 130 and security
components 140. The circuitry Within POS terminal 100 is
FIG. 2B is a cross-section of the POS terminal of FIG. 2A. FIG. 3A is a diagram illustrating the components of a security fence module, in accordance With an embodiment of the invention. FIG. 3B is a diagram of an assembled security fence module of FIG. 3A. FIGS. 4A and 4B are a block diagram of the circuitry Within the POS terminal of FIG. 2.
FIGS. 5A—5F illustrate the process of assembling security
enclosed Within a PCB 160 and potted in an epoxy com
pound 150. Security components 140 are connected to and detect any interruption in PCB 160. In an attempt to drill through PCB 160, the PCB circuit Would be interrupted and a detection circuit Would trigger a security response (e.g. erasing any con?dential information stored in the circuitry
cost of manufacturing the terminal is reduced and there is no need for a special ventilation system. In addition, the cir cuitry Within the terminal can be accessed for repair and maintenance purposes. BRIEF DESCRIPTION OF THE DRAWINGS
the user into the POS terminal could still be intercepted by tampering With the POS terminal. To curb such interception and any tampering of the keypad and processor, processors and other circuitry in the POS terminal are typically embed ded in material such as epoxy resin Which is potted to the
keypad, thereby integrating the keypad and the circuits into
invention overcomes the limitations of prior art potted
fence module of FIG. 3A.
FIG. 6 is a ?oW diagram of the operation of the tamper detect circuit of FIG. 4A. 35
DETAILED DESCRIPTION OF THE INVENTION
of POS terminal 100). While these security measures are suf?cient to deter some
A secure POS terminal 200, in accordance With an
tamperers, they could still be circumvented (eg by opening
embodiment of the invention, is shoWn in FIG. 2A. Secure POS terminal 200 includes a keypad 210, a card reader 220
the POS terminals and using appropriate chemical sub stances to remove the potting material).
and a display 230. To perform a payment transaction, a user of secure POS terminal 200 slides a card through card reader authoriZed and unauthoriZed access to the circuitry Within 220. The transaction details are then displayed to the user on the POS terminal. For example, once a circuit is potted it can 45 display 230. The user can then enter additional information
In addition, epoxy potting is expensive and prevents both
no longer be accessed for repair and maintenance purposes. This has the undesirable effect of increasing repair and
regarding the transaction, such as a security veri?cation code or a PIN number via keypad 210. The information entered by the user is encrypted and transmitted through a secure
replacement costs and, at least potentially, of reducing manufacturing yields. Furthermore, the epoxy potting pro
communication channel to a bank or other transaction clear
cess is both lengthy and generates fumes that must be
inghouse. Once the transaction is approved, the user is
removed by a special ventilation system.
noti?ed via display 230.
As a result, there is a need for a less expensive, more secure technique for preventing unauthoriZed access to the
A cross-section of secure POS terminal 200 is shoWn in
circuitry Within a POS terminal. SUMMARY OF THE INVENTION
55
FIG. 2B. The circuitry that receives, stores and processes con?dential information Within POS terminal 200 is encased Within security fence module 250. If security fence module
250 is penetrated, a security response is triggered deleting
The system and method of the present invention provide a security system for electronic circuits (eg the electronic
any con?dential information contained Within secure POS terminal 200. In addition, PCBs 260A and 260B are con
circuits Within a secure POS terminal) that is both more
structed With an inner serpentine trace layer and auxiliary security components 270A and 270B, Which are functional
tamper resistant and less expensive than the prior art epoxy potting. This is achieved by inserting an electrical connector
components of secure POS terminal 200, are positioned to
betWeen a ?rst and a second circuit board contained Within a case of the POS terminal. The ?rst and the second circuit
boards are any type of circuit board knoWn in the art,
including but not limited to, rigid circuit boards, ?exible circuit boards, printed circuit boards, etc. If the case is opened the connectors no longer provide an electrical con
65
provide a complete enclosure to security fence module 250 (eg on top and on the bottom of security fence module 250). Those skilled in the art realiZe that arrangements other than the ones described herein could be employed. For instance, if security fence module 250 Were positioned in a vertical dimension, PCBs 260A and 260B could be positioned on the
US 6,646,565 B1 3
4
left and the right of security fence module 250, again to provide a complete enclosure.
circuit 460, internal pinpad circuit 490 and the interface betWeen processor 480 and keyboard 470 provided by keypad connector 320.
FIGS. 3A and 3B are diagrams illustrating a security fence module 300, in accordance With an embodiment of the
In some embodiments of the invention, processor 480 is a Motorola 68302 processor running at 15 MHZ. The Motorola 68302 processor is a 32-bit processor With inter
invention. As shoWn in FIG. 3A, security fence module 300 includes a security shell 330, a connector holder 335, a
rupt controller, 1152 bytes of on-chip dual ported RAM, a
security ?lm 340, a security ?lm connector 310 and a keypad connector 320. FIG. 3B illustrates hoW the components of FIG. 3A are assembled to form security fence module 300.
DMA controller, 3 serial ports, a communications co-processor, 2 parallel ports, 3 timers, an address decoder and bus interface circuitry. The 68032 processor further
First, security ?lm 340 is Wrapped around security shell 330 in such a manner than one end of security ?lm 340 is placed on an interior surface of security shell 330. Connector holder
supports a 24-bit address bus and a selectable 8- or 16-bit
335 is then inserted in security shell 330. Security ?lm connector 310 is inserted in connector holder 335 and is held
in contact With security ?lm 340 by a clamping action of connector holder 335 being inserted into the shell. Similarly,
15
data bus. In some embodiments, the 8-bit data bus mode is selected. In some embodiments, internal pinpad circuit 490 includes an 8 MhZ clock and a Mitsubishi 38207 processor
With 16 k bytes MASK ROM, 512 bytes RAM, and 2 k bytes
keypad connector 320 is inserted Within a holder built into
EPROM. When the tamper detection circuit 460 detects an
security shell 330.
attempt to tamper With the circuitry Within POS terminal 200, internal pinpad circuit 490 is disconnected from the poWer supply via FET and shorted to ground via tWo additional redundant FET circuits. When this happens, the internal RAM of internal pinpad circuit 490 is erased. As shoWn in FIGS. 4A and 4B, POS terminal 200 further
FIGS. 4A and 4B is a block diagram of the circuitry 400 Within secure POS terminal 200. Circuitry 400 includes a
system board 410 and a display board 420. A tamper detect circuit 460 is provided in part on system board 410 and in part on display board 420. When security ?lm connector 310 is placed betWeen pads 450A and 450B on system board 410
includes a 3 track magnetic card reader, a vacuum ?uores cent display that can display 2 roWs of 16 characters each, Where each character is made up by a 5x7 dot matriX, a serial to parallel converter, a 256k>
(12)
(54)
United States Patent
(10) Patent N0.:
Fu et al.
(45) Date of Patent:
POINT OF SALE (POS) TERMINAL
5,938,472 A
*
8/1999 Yuen et a1. ............... .. 439/509
6,065,679 A
*
5/2000 Levie et al. ......... .. 235/462.47
(75) Inventors: Shuzhen Fu, Roseville, CA (US);
David C. Hanley, Granite Bay, CA (US); Raymond A. DeBruin, Auburn, CA (US); Jack R. Grenfell, Rocklin, CA (Us)
(73) Assignee: Hewlett-Packard Development Company’ L‘P" Houston’ TX (Us) *
N t.
_
S b.
0 Ice‘
tt
d.
1 .
th t
Nov. 11, 2003
5,675,319 A * 10/1997 Rivenberg et a1. ........ .. 340/550
SECURITY SYSTEM
( )
US 6,646,565 B1
ut letc. O artly dlsg almecri’. : dermé)
FOREIGN PATENT DOCUMENTS 0924592 A2 6/1999 WO 99/40501 12/1999 OTHER PUBLICATIONS
EP W0
VeriFOne, Inc” Everest Plus, 2 pages VeriFone, Inc., Yahoo! Finance, “VeriFone Introduces Ever f th.
E‘SGIIC lisi’éb‘gnbs 25‘? gags e ‘m er
est Plus, a NeW and Improved POS Solution for Multi—Lane
Merchants”, http://biZ.yahoo.com/bW/000117/nyiverifoni llliIIl, Feb. 8, 2000, 2 pages. * cited by examiner
(21)
Appl. N0.: 09/586,678 _
(22) Flledi
_ _ Primary Examiner—Ben] amin C. Lee
Jun- 1, 2000
Assistant Examiner—Son Tang
(51)
Int. Cl.7 .............................................. .. G08B 21/00
(52)
US. Cl.
................................... .. 340/687; 340/568.7
(58) Field of Search ............................ .. 340/687, 686.1,
(57)
ABSTRACT _
_
_
_
_
sefzumy System _fOr_ electron“: Clrcults _(e'g'_ electmmc
340/571 5721 5724 5734 590 550.
circuits contained Within a secure POS terminal) is provided
235/384, 385: 380; %05/18:64, 5687, 5681:
that is both more tamper resistant, and tamper'respon'siv'e
5682, 5684, 638, 639, 652, 649; 361/600,
and'less expensive than the prior art epoxy potting. ThlS is
748
achieved by inserting an electrical connector betWeen a ?rst and a second circuit board contained Within a case of the
(56)
References Cited
POS terminal, The ?rst and the second circuit boards are any
US. PATENT DOCUMENTS
limited to, rigid circuit boards, ?exible circuit boards,
type of circuit board known in the art, including both not 3,882,323 A *
5/1975 Smolker ................... .. 307/202
3,982,320 A * 9/1976 Bucho? et aL RE31,114 E
tor no longer provides an electrical connection betWeen the
* 12/1982 Berg ......................... .. 339/17
?rst and the Second clrclllt boards, mggerlng a tamper
4,593,384 A 6/1986 Kleijne 4,811,288 A * 3/1989 Kleijne et a1. 4,849,927 A
*
47860351 A : 4382752 A
Printed Circuit b°aFdS> “0 If the, Case is opePed the Connec'
29/630
7/1989 V0S_ ------------ -
8/1989 Wemgart ~~~~~~~~ ~~
* 11/1989
2
Lmdman et a1‘ ' ' ' ' '
365/52 364/900 713/194 ' ' ' " 380/25
gigilegjfstrilet a1‘ """" " 713/194
5,298,884 A
*
3/1994 Gilmore et a1. .... ..
5,627,520 A
*
5/1997 Grubbs et a1. ............ .. 340/572
detection circuit. In some embodiments of the invention, a ?exible conductive ?lm is Wrapped around the circuit boards and the connector. If a tamperer attempts to penetrate the case of the POS terminal to disable the tamper detection circuit, the circuit on the ?exible security ?lm is interrupted,
in turn triggering the tamper detection circuit.
340/573
26 Claims, 13 Drawing Sheets
U.S. Patent
Nov. 11,2003
Sheet 1 0f 13
US 6,646,565 B1
w ow?
/// om?
// o:
N
§w
7
Q3
/ cm?
ow?
mEifoHEn2;
U.S. Patent
Nov. 11,2003
Sheet 2 0f 13
US 6,646,565 B1
220
Fig. 2A
U.S. Patent
Nov. 11,2003
Sheet 3 0f 13
US 6,646,565 B1
200
270 A
260 A
\ \ \ \\\ \\"
>
KY
A.)
\\ \ \\\\\\\ \\\\\ \
/////M \
\§\\Q§§\\\\§\\\\\\\\\\ \\\\\\\\ \\\\ 250
Fig. 2B
\\
2\
U.S. Patent
NOV. 11 2003
Sheet 7 6f 13
335
Fig. 5A
US 6,646,565 B1
U.S. Patent
Nov. 11 2003
Sheet 8 0f 13
Fig. 5B
U.S. Patent
Nov. 11 2003
Sheet 9 0f 13
U.S. Patent
Nov. 11,2003
Sheet 12 0f 13
Fig. 5F
US 6,646,565 B1
U.S. Patent
Nov. 11,2003
Sheet 13 0f 13
US 6,646,565 B1
600
/ Y
Monitor security
/
fence module circuit
Yes
i Erase IPP RAM
Fig. 6
630
US 6,646,565 B1 1
2
POINT OF SALE (POS) TERMINAL
nection betWeen the ?rst and the second circuit boards, triggering a tamper detection circuit.
SECURITY SYSTEM
In some embodiments of the invention, a ?exible con
ductive ?lm is Wrapped around the circuit boards and the BACKGROUND OF THE INVENTION
connector. If a tamperer attempts to drill through the case of
the POS terminal to disable the tamper detection circuit, the circuit on the ?exible security ?lm is interrupted, in turn
1. Field of the Invention
The present invention relates generally to security sys tems and, more speci?cally, to security systems for elec tronic circuits.
triggering the tamper detection circuit. As a result, the secure POS terminal of the present 10
2. Related Art Point of sale (POS) terminals alloW customers to make
payments using a variety of payment instruments such as credit cards, debit cards, smart cards, ATM cards, etc. To ensure that the payment information transmitted from the
terminals. By eliminating the potting process, in fact, the
15
POS terminals to a payment center is not intercepted, this
information is typically encrypted and secured through other means (e.g., digital authentication) during transmissions.
FIG. 1 is a cross-section of a prior art POS terminal. FIG. 2A shoWs a POS terminal, in accordance to an
HoWever, con?dential payment information entered by
embodiment of the present invention.
25
a single module. A cross-section of a typical prior art potted POS terminal 100 is shoWn in FIG. 1. Potted POS terminal 100 includes a top case 110, a bottom case 120, keys 130 and security
components 140. The circuitry Within POS terminal 100 is
FIG. 2B is a cross-section of the POS terminal of FIG. 2A. FIG. 3A is a diagram illustrating the components of a security fence module, in accordance With an embodiment of the invention. FIG. 3B is a diagram of an assembled security fence module of FIG. 3A. FIGS. 4A and 4B are a block diagram of the circuitry Within the POS terminal of FIG. 2.
FIGS. 5A—5F illustrate the process of assembling security
enclosed Within a PCB 160 and potted in an epoxy com
pound 150. Security components 140 are connected to and detect any interruption in PCB 160. In an attempt to drill through PCB 160, the PCB circuit Would be interrupted and a detection circuit Would trigger a security response (e.g. erasing any con?dential information stored in the circuitry
cost of manufacturing the terminal is reduced and there is no need for a special ventilation system. In addition, the cir cuitry Within the terminal can be accessed for repair and maintenance purposes. BRIEF DESCRIPTION OF THE DRAWINGS
the user into the POS terminal could still be intercepted by tampering With the POS terminal. To curb such interception and any tampering of the keypad and processor, processors and other circuitry in the POS terminal are typically embed ded in material such as epoxy resin Which is potted to the
keypad, thereby integrating the keypad and the circuits into
invention overcomes the limitations of prior art potted
fence module of FIG. 3A.
FIG. 6 is a ?oW diagram of the operation of the tamper detect circuit of FIG. 4A. 35
DETAILED DESCRIPTION OF THE INVENTION
of POS terminal 100). While these security measures are suf?cient to deter some
A secure POS terminal 200, in accordance With an
tamperers, they could still be circumvented (eg by opening
embodiment of the invention, is shoWn in FIG. 2A. Secure POS terminal 200 includes a keypad 210, a card reader 220
the POS terminals and using appropriate chemical sub stances to remove the potting material).
and a display 230. To perform a payment transaction, a user of secure POS terminal 200 slides a card through card reader authoriZed and unauthoriZed access to the circuitry Within 220. The transaction details are then displayed to the user on the POS terminal. For example, once a circuit is potted it can 45 display 230. The user can then enter additional information
In addition, epoxy potting is expensive and prevents both
no longer be accessed for repair and maintenance purposes. This has the undesirable effect of increasing repair and
regarding the transaction, such as a security veri?cation code or a PIN number via keypad 210. The information entered by the user is encrypted and transmitted through a secure
replacement costs and, at least potentially, of reducing manufacturing yields. Furthermore, the epoxy potting pro
communication channel to a bank or other transaction clear
cess is both lengthy and generates fumes that must be
inghouse. Once the transaction is approved, the user is
removed by a special ventilation system.
noti?ed via display 230.
As a result, there is a need for a less expensive, more secure technique for preventing unauthoriZed access to the
A cross-section of secure POS terminal 200 is shoWn in
circuitry Within a POS terminal. SUMMARY OF THE INVENTION
55
FIG. 2B. The circuitry that receives, stores and processes con?dential information Within POS terminal 200 is encased Within security fence module 250. If security fence module
250 is penetrated, a security response is triggered deleting
The system and method of the present invention provide a security system for electronic circuits (eg the electronic
any con?dential information contained Within secure POS terminal 200. In addition, PCBs 260A and 260B are con
circuits Within a secure POS terminal) that is both more
structed With an inner serpentine trace layer and auxiliary security components 270A and 270B, Which are functional
tamper resistant and less expensive than the prior art epoxy potting. This is achieved by inserting an electrical connector
components of secure POS terminal 200, are positioned to
betWeen a ?rst and a second circuit board contained Within a case of the POS terminal. The ?rst and the second circuit
boards are any type of circuit board knoWn in the art,
including but not limited to, rigid circuit boards, ?exible circuit boards, printed circuit boards, etc. If the case is opened the connectors no longer provide an electrical con
65
provide a complete enclosure to security fence module 250 (eg on top and on the bottom of security fence module 250). Those skilled in the art realiZe that arrangements other than the ones described herein could be employed. For instance, if security fence module 250 Were positioned in a vertical dimension, PCBs 260A and 260B could be positioned on the
US 6,646,565 B1 3
4
left and the right of security fence module 250, again to provide a complete enclosure.
circuit 460, internal pinpad circuit 490 and the interface betWeen processor 480 and keyboard 470 provided by keypad connector 320.
FIGS. 3A and 3B are diagrams illustrating a security fence module 300, in accordance With an embodiment of the
In some embodiments of the invention, processor 480 is a Motorola 68302 processor running at 15 MHZ. The Motorola 68302 processor is a 32-bit processor With inter
invention. As shoWn in FIG. 3A, security fence module 300 includes a security shell 330, a connector holder 335, a
rupt controller, 1152 bytes of on-chip dual ported RAM, a
security ?lm 340, a security ?lm connector 310 and a keypad connector 320. FIG. 3B illustrates hoW the components of FIG. 3A are assembled to form security fence module 300.
DMA controller, 3 serial ports, a communications co-processor, 2 parallel ports, 3 timers, an address decoder and bus interface circuitry. The 68032 processor further
First, security ?lm 340 is Wrapped around security shell 330 in such a manner than one end of security ?lm 340 is placed on an interior surface of security shell 330. Connector holder
supports a 24-bit address bus and a selectable 8- or 16-bit
335 is then inserted in security shell 330. Security ?lm connector 310 is inserted in connector holder 335 and is held
in contact With security ?lm 340 by a clamping action of connector holder 335 being inserted into the shell. Similarly,
15
data bus. In some embodiments, the 8-bit data bus mode is selected. In some embodiments, internal pinpad circuit 490 includes an 8 MhZ clock and a Mitsubishi 38207 processor
With 16 k bytes MASK ROM, 512 bytes RAM, and 2 k bytes
keypad connector 320 is inserted Within a holder built into
EPROM. When the tamper detection circuit 460 detects an
security shell 330.
attempt to tamper With the circuitry Within POS terminal 200, internal pinpad circuit 490 is disconnected from the poWer supply via FET and shorted to ground via tWo additional redundant FET circuits. When this happens, the internal RAM of internal pinpad circuit 490 is erased. As shoWn in FIGS. 4A and 4B, POS terminal 200 further
FIGS. 4A and 4B is a block diagram of the circuitry 400 Within secure POS terminal 200. Circuitry 400 includes a
system board 410 and a display board 420. A tamper detect circuit 460 is provided in part on system board 410 and in part on display board 420. When security ?lm connector 310 is placed betWeen pads 450A and 450B on system board 410
includes a 3 track magnetic card reader, a vacuum ?uores cent display that can display 2 roWs of 16 characters each, Where each character is made up by a 5x7 dot matriX, a serial to parallel converter, a 256k>
