Push-Pull Class- Power Amplifier for Low ... - Semantic Scholar
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 59, NO. 9, SEPTEMBER 2012
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Push-Pull ClassPower Amplifier for Low Harmonic-Contents and High Output-Power Applications Xiuqin Wei, Student Member, IEEE, Shingo Kuroiwa, Tomoharu Nagashima, Student Member, IEEE, Marian K. Kazimierczuk, Fellow, IEEE, and Hiroo Sekiya, Senior Member, IEEE
power Abstract—This paper introduces a push-pull classamplifier for achieving low harmonic contents and high output power. By applying the push-pull configuration of the classpower amplifier, the proposed amplifier achieves an extremely lower total harmonic distortion (THD) and about four times power higher output power than the conventional single classamplifier. Design curves of the proposed amplifiers for satisfying the classZVS/ZDVS/ZCS/ZDCS conditions are given. A design example is shown along with the PSpice-simulation and experimental waveforms for 1-MHz amplifier, considering the MOSFET drain-to-source nonlinear parasitic capacitances, MOSFET switch-on resistances, and equivalent series resistance of the inductors. The waveforms from the PSpice simulation and circuit experiment satisfied all the switching conditions, which has shown the accuracy of the design curves given in this paper power and validated the effectiveness of the push-pull classamplifier. ZVS/ZDVS/ZCS/ZDCS conditions, Index Terms—Classoutput power, push-pull classpower amplifier, total harmonic distortion (THD).
I. INTRODUCTION
T
HE classpower amplifier [1]–[4] is an improved version of the class-E power amplifier [5]–[14]. In the classpower amplifier, there is no jump at both switch-voltage and switch-current waveforms by adding the auxiliary circuit. For achieving jumpless switch-voltage and switch-current waveforms in the main circuit, the zero-voltage switching (ZVS) and zero-derivative-voltage switching (ZDVS) conditions at the turn-on instant and the zero-current switching (ZCS) and zero-derivative-current switching Manuscript received July 26, 2011; revised November 10, 2011; accepted December 23, 2011. Date of publication February 10, 2012; date of current version August 24, 2012. This work was supported by the Scholarship Foundation and Grant-in-Aid for scientific research (No. 23760253) of JSPS, Support Center for Advanced Telecommunications Technology Research, and the Telecommunications Advancement Foundation, Japan. This paper was recommended by Associate Editor T.-J. Liang. X. Wei is with the Department of Electronics Engineering and Computer Science, Fukuoka University, Fukuoka 814-0180, Japan (e-mail: [email protected]). T. Nagashima, H. Sekiya, and S. Kuroiwa are with the Graduate School of Advanced Integration Science, Chiba University, Chiba 263-8522, Japan (e-mail: [email protected]; [email protected]; kuroiwa@ faculty.chiba-u.jp). M. K. Kazimierczuk is with the Department of Electrical Engineering, Wright State University, Dayton, OH 45435-0001 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TCSI.2012.2185301
(ZDCS) conditions at the turn-off instant should be satisfied. power Because of these switching conditions, the classamplifier achieves higher power-conversion efficiency than the class-E power amplifier. In particular, this operation is attractive when the transistor has a long turn-off switching time. By allowing the slow switching of the switching devices, the driving power can be reduced and low-cost switching devices can be used for circuit implementations [1], [2]. Therefore, the classpower amplifier achieves high power-conversion efficiency at high frequencies with low cost by adding the auxiliary circuit. The conventional single classpower amplifier is, however, driven asymmetrically. Therefore, the harmonic contents appear in the power amplifier output waveforms, which results in high total harmonic distortion (THD) of the output voltage and current waveforms. In some applications, a very low THD is required. For achieving the low harmonic contents, it is very important to design correctly the impedance matching network. In the practical designs, however, any filtering method may lead to large power dissipation in the matching network [7]. In this paper, a push-pull configuration is applied for the classpower amplifiers. By applying the push-pull configuration, the THD is reduced significantly and the design of the impedance matching network becomes less critical. The auxiliary circuit contributes two factors, which are jumpless switch-voltage and switch-current waveforms and high output power. The output power of the proposed push-pull amplifier is power about four times higher than that of the single classamplifier. Additionally, the proposed amplifier also satisfies the classZVS/ZDVS/ZCS/ZDCS conditions. Therefore, the proposed amplifier can also achieve high power-conversion efficiency at high frequencies and slow switching devices are allowed compared with the push-pull class-E amplifier [7]. From the above features, it is stated that the push-pull classpower amplifier is suitable for low THD and high output-power applications, for example, for RF power supply. In this paper, power amplifiers are design curves of the push-pull classshown. For the designs of the proposed amplifier, the design algorithm in [8] is applied. By using this design algorithm, it is possible to obtain accurate design values, which satisfy the switching conditions at the main circuits and the ZVS classcondition at the auxiliary circuits. It is also possible to consider the nonlinear effects of the MOSFET drain-to-source parasitic capacitances, which cannot be ignored at high frequencies, MOSFET on-resistances, and equivalent series resistances of
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the inductors. It is seen from the PSpice simulation and the experimental results that the numerical calculations agreed with the simulation and experimental waveforms quantitatively, which validated the accuracy of the design curves shown in this paper and the effectiveness of the proposed amplifier. II. CIRCUIT DESCRIPTION AND PRINCIPLE OPERATION Fig. 1(a) shows a circuit topology of the proposed classpower amplifier. In the proposed power amplifier, two identical classpower amplifiers [1]–[4] are connected in parallel at the output filter and the push-pull configuration is achieved. Each classpower amplifier has a main circuit and an auxiliary circuit. The output current of the main circuit has a fundamental frequency and that of the auxiliary circuit has a biharmonic frequency. Both the main and auxiliary circuits have similar topologies to the class-E power amplifier [5]–[14]. Each circuit is composed of dc-supply voltage source , dc-feed inductance , MOSFET as a switching device , shunt capacitance , and series resonant filter . The shunt capacitance is the MOSFET nonlinear parasitic capacitance and the external capacitance , which are connected in parallel as shown in Fig. 1(b). In the above component expressions, means the main and auxiliary circuits. In addition, is the amplifier number for the parallel connection. The series resonant filters of the main circuits and the auxiliary circuits are tuned to the fundamental and biharmonic frequency of the output voltage, respectively. Fig. 1(b) shows an equivalent circuit of the proposed classpower amplifier. In this figure, is the equivalent resistance of the switching devices as shown in Fig. 1(c). In this paper, is expressed as (1) is the on-resistance of the MOSFETs and is the where on-resistance of the antiparallel diode included in the MOSFET devices. Additionally, , , and in Fig. 1(b) are the equivalent series resistances (ESRs) of the inductors , , and , respectively. Fig. 2 shows example waveforms in the proposed power amplifier when the switch-on duty ratios and are 0.5. In this figure, represents the angular time and is the operating frequency of the main circuit. For the proposed classpower amplifier, the switch is driven by the input voltage as shown in Fig. 2 and turns on and off alternately. When the switch is in the off-state, the sum of the currents through the dc-feed inductance of the main circuit, the resonant filter of the main circuit, and the resonant filter of the auxiliary circuit in the amplifier flows through the shunt capacitance . The current through produces the switch voltage of the main circuit . In this interval, the current through the switch resistance is almost zero because of . At the switch-turn-on instant of the main circuits, the switch voltage satisfies the ZVS/ZDVS conditions. Due to these switching conditions, there is no jump at the switch-voltage and switch-current waveforms
Fig. 1. Proposed classpower amplifier (a) Circuit topology (b) Equivalent circuit (c) Equivalent model of the MOSFET.
at turn-on instant. When the switch is in on-state, the voltage across the switch is almost zero. Therefore, the current flows through the switching device. At the switch-turn-off instant, both the ZCS and ZDCS conditions are achieved. From these switching conditions, there is also no jump at the switch-current and switch-voltage waveforms at the turn-off instant. This smooth turn-off switching can be achieved by injecting the biharmonic current from the auxiliary circuits. As a result, there is no jump in both the switch-voltage and switch-current waveforms. Here we consider that a step change appears on the current waveform in the class-E amplifier at the turn-off instant as shown in Fig. 3. From this figure, denotes the drain-current fall time. During the drain-current falling, the voltage and the current appear in the switch simultaneously. Therefore, the power losses occur in this interval [9], [10]. If is large, the power losses at the turn-off instant cannot be ignored. To minimize , it is effective to use a fast-switching MOSFET or to increase the amplitude of the input voltage. The former, however, pays high-cost to realize the amplifier. The latter suffers from the power-added-efficiency reduction [2]. Therefore, the slow-switching devices are allowed and the cost reduction is possible compared with the switching devices having jumps of the switch-voltage and switch-current waveforms, which is a feature of the classpower amplifier [1], [2]. In [4], it was
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TABLE I SWITCHING PATTERNS IN THE PROPOSED AMPLIFIER
push-pull configuration also needs a complex driver circuit. Additionally, the proposed amplifier includes floating load as shown in Fig. 1(a). For realizing the single-ended amplifier, a transformer is necessary. The transformer, however, extends the circuit size and may be a factor of power loss. III. DESIGN PROCEDURE
Fig. 2. Example waveforms of the proposed class.
power amplifier for
In this section, the design procedure for the proposed amplifier is explained. The design method is based on the design procedure in [8]. By applying this numerical design procedure, it is possible to obtain the accurate design values easily for achieving multiple design restrictions. Additionally, it is also possible to consider the nonlinear effect of the MOSFET drain-to-source capacitances, MOSFET switch-on resistances, and equivalent series resistances (ESRs) of inductors and capacitors. Therefore, the design method presented in [8] is very suitable for the proposed amplifier designs. Assumptions In this paper, the proposed amplifier is analyzed and designed with the following assumptions: 1) The switching devices have the equivalent resistance given in (1) and the MOSFET drain-to-source nonlinear parasitic capacitance as shown in Fig. 1(c). Generally, the nonlinear characteristic of the MOSFET drain-to-source capacitance is expressed as [2], [12]–[14]
Fig. 3. Waveforms of the class-E amplifier with the drain current fall time
.
claimed that the auxiliary circuit has a function for increasing output power. Because of the push-pull configuration of the proposed amplifier, the waveforms of one amplifier are identical to those of the other amplifier with phase-shift of . The proposed amplifier can deliver the output voltage about twice as high as that of the single classpower amplifier when the load resistance value is fixed. The auxiliary circuits contribute not only to the jumpless switch-voltage and switch-current waveforms but also to high output power. Additionally, the symmetry of the push-pull operations cancels even-harmonic contents. Therefore, THD can be reduced significantly. As a result, the proposed amplifier can achieve high power-conversion efficiency, low THD, and high output power at high frequencies with slowswitching devices. These features comply with the requirements of high-frequency and high-power applications, for example, RF transmitters or RF power supplies. There are, however, some drawbacks of the push-pull classpower amplifier. The circuit size becomes large because the push-pull configuration needs two amplifiers. The
(2)
2)
3) 4)
5)
is the built-in potential, which typically ranges where from 0.5 to 0.9 V for silicon devices, is the switch voltage, and is the capacitance at . When the MOSFETs are selected, the parasitic capacitance parameters are fixed. The ESRs of all the inductors are considered. The ESRs of all the capacitors, however, are ignored since they are much smaller than ESRs of the inductors. All the passive elements except the MOSFET parasitic capacitances work as linear elements. The shunt capacitances are composed of the MOSFET drain-to-source nonlinear parasitic capacitance and the linear external capacitance . The switches , , and turn off at . The switching frequency of the auxiliary circuit is twice as high as that of the main circuit. In addition, both the switch-on duty ratios and are 0.5. Therefore, the switching patterns are given in Table I.
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A. Parameters
C. Design Conditions
In this paper, following parameters are defined for the amplifier designs. 1. : The operating frequency. In this paper, is valid following the assumption (e). 2. : The resonant frequency. 3. : The ratio of the resonant frequency to the operating frequency. 4. : The ratio of the resonant capacitances to the external capacitances. : The ratio of the resonant inductance to the 5. dc-feed inductance. 6. : The ratio of the capacitance at the zero switch voltage to the external capacitance. 7. : The loaded quality factor.
For considering the switching conditions, the amplifier operation should be in the steady state. The steady-state conditions of the amplifier are (5) and . which is the boundary conditions between The classZVS/ZDVS/ZCS/ZDCS conditions of the main switches are mandatory to achieve high power-conversion efficiency at high frequencies with slow-switching devices. Because of the symmetry operation of the push-pull configuration, we can consider the switching conditions only for . When satisfies all the switching conditions, also satisfies the switching conditions. The class-E ZVS/ZDVS conditions at the switch turn-on instant [5] are
B. Circuit Equations for We consider the operations in the range of the proposed amplifier designs. By using the parameters defined above, we obtain
(6) The ZCS/ZDCS conditions at the switch turn-off instant are (7) When four switching conditions can be achieved simultaneously, there is no jump on both switch-voltage and switch-current waveforms and high power-conversion efficiency at high frequencies is achieved. Additionally, the ZVS condition of the auxiliary circuits is given as a switching condition at for high power-conversion efficiency [2]. (8)
for
and (3)
When we define
(3) can be rewritten as (4) where
and Both two auxiliary circuits turn on twice at during . If the ZVS condition in (8) is achieved, the ZVS condition can be also satisfied at due to the antiparallel diode [2]. From the above conditions, we recognize that the proposed amplifier designs reduce to solve the algebraic (5), (6), (7), and (8). In these equations, there are 19 algebraic equations and 14 unknown initial values. Therefore, five parameters can be set as the design parameters from . In this paper, the parameters , , , , and are selected as unknown parameters and the other parameters are given as design specifications. In order to obtain the values of the unknown parameters, the Newton’s method is applied to solve the algebraic equations. It is possible to derive the algebraic-equation solutions numerically because the circuit equations are obtained in (3). The algorithm of the Newton’s method was presented in [8] in detail. In addition, the Runge–Kutta method is used to solve the circuit equations in (3). IV. DESIGN CURVES In this section, design curves of the proposed power amplifier are shown using the design procedure in the previous section.
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is a root-mean-square value of the normalwhere ized output current and can be given by (10) and are the peak values of voltages and currents at the MOSFETs, which can be expressed as (11)
(12) and
Fig. 4. Design curves as functions of in the single classamplifier and amplifier (a) Design curves of and (b) Design the push-pull classand (c) Design curves of . curves of
For the derivations of design curves, all the ESRs of the inductors, parasitic capacitances of the MOSFETs, on-resistance of the MOSFETs, and on-resistance of the antiparallel diode are zero for calculating the design curves. By ignoring them, it is possible to obtain normalized design curves. In this situation, the design specifications of the push-pull classpower amplifier are given as follows: , , and . Fig. 4 shows the design parameters as functions of . It is seen from Fig. 4 that all the parameters of the proposed amplifier vary steeply for and those of the single classamplifier vary for For high , the output current is almost pure sinusoidal waveform regardless of . Therefore, design parameters are almost constant for high . For low , however, the output current has harmonic distortion and output current waveform varies as decreases. Therefore, the parameters for satisfying the low switching conditions also vary as shown in Fig. 4. Because of the push-pull operation, the harmonic contents are significantly reduced compared with the single classamplifier. Therefore, the break point of the proposed amplifier is smaller than that of the single classamplifier. V. OUTPUT POWER AND THD Fig. 5 shows the normalized output power, peak value of both the switch voltages and the switch currents, and for and 2 as functions of , where is the number of the amplifier, namely, for the single amplifier and for the push-pull amplifier. The normalized output powers can be obtained as (9)
(13) It is seen from Fig. 5(a) that the normalized output power in the proposed classamplifier is about four times as high as that in the single classamplifier for any , which is because the push-pull configuration applied in the proposed amplifier. It is seen from Fig. 5(b) that the peak values of the normalized switch voltages both in the main circuits and the auxiliary circuits for the proposed amplifier are a little lower than those for the single amplifier. However, it is also seen from Fig. 5(c) that the peak values of the normalized switch currents both in the main circuits and the auxiliary circuits for the proposed amplifier are about twice as high as those for the single amplifier. As a result, the power output capabilities of the main and auxiliary circuit MOSFETs in the proposed amplifier are almost the same as those in the single classamplifier as shown in Fig. 5(d). Fig. 6 shows the THD as a function of , which is defined as
(14) and are root-mean-square where values of the -th harmonic and those of the fundamental frequency component in the normalized output current , respectively. It is seen from Fig. 6 that the THD of the proposed amplifier increases rapidly as decreases for though that of the single amplifier increases with the decrease in for , which agrees with the discussions for the design curves in Fig. 4. It is also seen that the THD of the proposed amplifier is always much lower than that of the single classpower amplifier. This is because the push-pull configuration cancels the even harmonic contents. Therefore, the proposed amplifier is considerable efficient for the applications of low THD and high output power.
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Fig. 5. Characteristics as functions of in the single class(b) Normalized maximum switch voltages tions of
Fig. 6. THDs as functions of
amplifier and the push-pull classamplifier (a) Normalized output powers (c) Normalized maximum switch currents (d)
as func.
.
VI. EXPERIMENTAL VERIFICATION A. Experiment for the Proposed Amplifier In this paper, we carried out PSpice simulations and circuit experiments. In the circuit experiments, the driver circuit was built as shown in Fig. 7. We built a driver circuit by a dualchannel function generator Tektronix AFG3252, which generates two kinds of arbitral signals with a fixed phase shift, and some NOT logic circuits. First, the design specifications were given as follows: dc-supply voltage of the main circuit , dc-supply voltage of the auxiliary circuit , operating frequency MHz, load resistance , and loaded quality factor . We chose IRF530 MOSFETs as the switching devices. In this paper, the parameters of the IRF530 MOSFET are obtained from the PSpice MOSFET models as given in Table II. The parameter , , and are identical to , , and in the MOSFET models, respectively. Therefore, from Table II, , , and were obtained. Additionally, was obtained from the datasheet and was measured by the LCR meter of HP4284A. The other specifications were
Fig. 7. Driver circuit.
the same as the previous section. From , , and , and mH were obtained. Therefore, we made inductors prior to the numerical calculations for solving the design equations. By using HP4284A, , , and were measured, which were also used in the design calculation. In the design calculation, the other ESR values were zero because the inductor values would be obtained after the design calculation. By using the design procedure in Section III, the design values were obtained as given in Table III. This table also gives the measured element values for the circuit experiment. Fig. 8 shows the waveforms from numerical calculation, PSpice simulation, and circuit experiment. The Tektronix TDS3014B oscilloscope was used for the experiment-waveform measurements and the current waveforms were measured
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TABLE II PSPICE MODEL OF IRF530 MOSFET
TABLE III ELEMENT VALUES OF THE PROPOSED POWER AMPLIFIER
by using the Tektronix TCP202 current probe. It is seen from Fig. 8 that both the PSpice and experimental waveforms satisfied the classZVS/ZDVS/ZCS/ZDCS conditions in the main circuits and the ZVS condition in auxiliary circuits completely. From these satisfactions, the validity of the design procedure and design curves shown in Fig. 4 was confirmed. Table IV gives the measured values of the circuit experiment. In this table, the dc-supply voltages and the direct currents were obtained from the digital multimeter of Iwatsu VOAC7532. The dc-supply power of the main circuit and that of the auxiliary circuit are (15) where (16) In addition, the output-voltage was measured by the digital multimeter of Agilent 3458A. The power gain is
Fig. 8. Waveforms of the proposed amplifier (a) Numerical waveforms (b) PSpice-simulation waveforms (c) Experimental waveforms.
and the power-added efficiency
is obtained from
(17) (18)
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TABLE IV RESULTS OF THE PROPOSED POWER AMPLIFIER
Fig. 9. Single class-
where are the gate-driving powers as shown in Figs. 1(a) and 7. It is seen from Tables III and IV that the experimental measurements agreed with the numerical calculations quantitatively, which also validated the design procedure in this paper. In the circuit experiment, the measured THD and power-conversion efficiency were 5.0% and 93.0% at 24.4 W and 1 MHz output. The measured THD was a little higher than the numerical one. This is because the experimental components include tolerances and experimental waveforms have unpredictable noises. Additionally, the phase shift between and is not strictly because the driving signal has a processing delay through a NOT logic as shown in Fig. 7. The above factors break the complete symmetry between two amplifiers. Therefore, the measured THD was a little higher than the numerical THD. The measured output power and the measured power-conversion efficiency were a little lower than those of numerical calculations. This is because the ESRs of and were not considered in the numerical calculations. Additionally, the switch on-resistance and the body-diode on-resistance for the numerical calculations have a little difference compared with the experimental components in the strict sense. B. Comparison of Push-Pull and Single Amplifiers For a comparison with the push-pull classamplifier, we also carried out the circuit experiment of the single classamplifier as shown in Fig. 9. For fair comparisons, the design specifications of the single classamplifier are the same as those of the push-pull amplifier. Following the design procedure in [2], the design values were obtained as given in Table V. Fig. 10 shows the waveforms obtained from numerical calculations, PSpice simulations, and circuit experiments. The experimental waveforms agreed with the numerical and simulation ones quantitatively. Table VI gives the measurement results along with the numerical calculations. It is seen from Table VI that the measurement results showed the quantitative agreements with the numerical calculations. Strictly, the measured THD was a little higher than the numerical one. In addition, the measured output power and power-conversion efficiency were a little lower than the numerical ones. These
power amplifier.
Fig. 10. Waveforms of the single classamplifier (a) Numerical waveforms (b) PSpice-simulation waveforms (c) Experimental waveforms.
results were similar to the results in Table IV. It is seen from Tables IV and VI that the measured THD in the push-pull classamplifier was 30% of the single-amplifier THD. Additionally, the output power of the push-pull classpower amplifier was 4.04 times as high as that of the single amplifier. It can be stated from both the numerical and experimental results that the proposed power amplifier is relatively effective to reduce the harmonic contents and obtain high output power. C. Maximum Operating Frequency The maximum operating frequency is important information for amplifier designs. Generally, the shunt capacitance decreases as the operating frequency increases. The shunt capacitance, however, cannot be zero because of the MOSFET drain-to-source parasitic capacitance. Therefore, the maximum operating frequency can be obtained by calculating the operating frequency for zero external linear shunt capacitance [12], [13]. In the proposed amplifier, the shunt capacitance in the
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TABLE V ELEMENT VALUES OF THE SINGLE CLASS-
AMPLIFIER
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and power-conversion efficiency were 5.0% and 93.0% at 24.4 W and 1 MHz output. It was claimed that the slow-switching MOSFET can be allowed because of the classZVS/ZDVS/ZCS/ZDCS conditions in [1], [2], and this paper. It is, however, difficult to quantitative evaluations how slow switching devices are allowed in the classamplifier, which is an important and interesting topic to be addressed in the future, REFERENCES
TABLE VI RESULTS OF THE SINGLE CLASS-
AMPLIFIER
auxiliary circuit is always lower than the main circuit because the output frequency of the auxiliary circuits is higher than that of the main circuits. Therefore, the maximum operating in (3) frequency can be obtained by substituting , , , , and as unknown parameters and selecting for solving the algebraic equations. If IRF530 MOSFETs are used for the switching elements, the maximum frequency is 6.077 MHz. VII. CONCLUSION power amThis paper has introduced the push-pull classplifier. The proposed amplifier achieves the extremely low total harmonic distortion (THD) and four times the output power of the single classpower amplifier. The design curves of the proposed classpower amplifier for achieving the ZVS/ ZDVS/ZCS/ZDCS conditions in the main circuit and the ZVS condition in the auxiliary circuit are given. A design example along with the PSpice-simulation and experimental waveforms showed the validity and accuracy of the design curves shown in this paper and the effectiveness of the proposed classpower amplifier. In the circuit experiment, the measured THD
switching-mode [1] A. Telegdy, B. Molnár, and N. O. Sokal, “Classtuned power amplifier-high efficiency with slow-switching transistor,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 6, pp. 1662–1676, Jun. 2003. [2] R. Miyahara, H. Sekiya, and M. K. Kazimierczuk, “Novel design procedure of classpower amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 12, pp. 3607–3616, Dec. 2010. [3] R. Miyahara and H. Sekiya, “Design of classpower amplifier with one input signal,” in Proc. Energy Conversion Congr. Exp. (ECCE 09), Sep. 2009, pp. 3859–3864. [4] A. AlMuhaisen, P. Wright, J. Lees, P. J. Tasker, S. C. Cripps, and J. Benedikt, “Novel wide band high-efficiency active harmonic injection power amplifier concept,” in Proc. 2010 IEEE MTT-S Int. Microw. Symp. Dig., Anaheim, CA, May 2010, pp. 664–667. [5] N. O. Sokal and A. D. Sokal, “Class E—a new class of high-efficiency tuned single-ended switching power amplifiers,” IEEE J. Solid-State Circuits, vol. SC-10, no. 3, pp. 168–176, Jun. 1975. [6] F. H. Raab, “Effects of circuit variations on the class-E tuned power amplifier,” IEEE J. Solid-State Circuits, vol. SC-13, no. 2, pp. 239–247, Apr. 1978. [7] S.-C. Wong and C. K. Tse, “Design of symmetrical class E power amplifiers for very low harmonic-content applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 8, pp. 1684–1690, Aug. 2005. [8] H. Sekiya, T. Ezawa, and Y. Tanji, “Design procedure for class-E switching circuits allowing implicit circuit equations,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 55, no. 11, pp. 3688–3696, Nov. 2008. [9] M. K. Kazimierczuk and K. Puczko, “Effects of the collector current fall time on the class E tuned power amplifier,” IEEE J. Solid-State Circuits., vol. SC-18, no. 9, pp. 181–193, Apr. 1983. [10] S. H. Tu and C. Toumazou, “Effect of the loaded quality factor on power efficiency for CMOS class-E RF tuned power amplifiers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 46, no. 5, pp. 628–634, May 1999. [11] M. K. Kazimierczuk, RF Power Amplifiers. New York, NY: Wiley, 2008. [12] T. Suetsugu and M. K. Kazimierczuk, “Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear shunt capacitances,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 7, pp. 1261–1268, Jul. 2004. [13] A. Mediano, P. M. Gaudo, and C. K. Bernal, “Design of class E amplifier with nonlinear and linear shunt capacitances for any duty cycle,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 3, pp. 484–492, Mar. 2007. [14] X. Wei, H. Sekiya, S. Kuroiwa, T. Suetsugu, and M. K. Kazimierczuk, “Design of class-E power amplifier with MOSFET linear gate-to-drain and nonlinear drain-to-source capacitances,” IEEE Trans. Circuits Syst. I, vol. 58, no. 10, pp. 2556–2565, Oct. 2011.
Xiuqin Wei (S’10) was born in Fujian, China, on December 7, 1983. She received the B.E. degree from Fuzhou University, China, in 2005 and the Ph.D. degree from Chiba University, Japan, in 2012. Since April 2012, she has been with Fukuoka University and now she is an Assistant Professor at Department of Electronics Engineering and Computer Science. Her research interests include high frequency power amplifier.
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Shingo Kuroiwa received the B.E., M.E. and D.E. degrees in electro-communications from the University of Electro Communications, Tokyo, Japan, in 1986, 1988, and 2000, respectively. From 1988 to 2001, he was a researcher at the KDD R&D Laboratories. From 2001 to 2007, he was an Associate Professor of Institute of Technology and Science at the University of Tokushima, Japan. Since 2007, he has been with Chiba University, Japan, where he is currently a Professor of Graduate School of Advanced Integration Science. His current research interests include speech recognition, speaker recognition, signal processing, and information retrieval. Prof. Kuroiwa is a member of the ISCA, IEICE, IPSJ, and ASJ.
Tomoharu Nagashima (S’11) was born in Saitama, Japan, on February 4, 1989. He received the B.E. degree from the Department of Information and Image Sciences, Chiba University, Chiba, Japan, in 2011. He is currently working toward the M.E. degree at Chiba University. His current research interest is in high-frequency high-efficiency tuned power amplifiers.
Marian K. Kazimierczuk (M’91–SM’91–F’04) received the M.S., Ph.D., and D.Sci. degrees in electronics engineering from the Department of Electronics, Technical University of Warsaw, Warsaw, Poland, in 1971, 1978, and 1984, respectively. He was a Teaching and Research Assistant from 1972 to 1978 and Assistant Professor from 1978 to 1984 with the Department of Electronics, Institute of Radio Electronics, Technical University of Warsaw, Poland. In 1984, he was a Project Engineer for De-
sign Automation, Inc., Lexington, MA. In 1984–1985, he was a Visiting Professor with the Department of Electrical Engineering, Virginia Polytechnic Institute and State University, VA. Since 1985, he has been with the Department of Electrical Engineering, Wright State University, Dayton, OH, where he is currently a Professor. His research interests are in high-frequency high-efficiency switching-mode tuned power amplifiers, resonant and PWM dc/dc power converters, dc/ac inverters, high-frequency rectifiers, electronic ballasts, ,modeling and control of converters, high-frequency magnetics, power semiconductor devices. Prof. Kazimierczuk received the IEEE Harrell V. Noble Award for his contributions to the fields of aerospace, industrial, and power electronics, in 1991. He was and is an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS and served as an Associate Editor for the Journal of Circuits, Systems, and Computers. He was a member of the Superconductivity Committee of the IEEE Power Electronics Society. He was a chair of the CAS Technical Committee of Power Systems and Power Electronics Circuits in 2001–2002. He is a member of Tau Beta Pi.
Hiroo Sekiya (S’97–M’01–SM’11) was born in Tokyo, Japan, on July 5, 1973. He received the B.E., M.E., and Ph. D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 1996, 1998, and 2001 respectively. Since April 2001, he has been with Chiba University and now he is an Assistant Professor at Graduate School of Advanced Integration Science, Chiba University, Chiba, Japan. From Feb. 2008 to Feb. 2010, he was with Electrical Engineering, Wright State University, Ohio, USA as a visiting scholar. His research interests include high-frequency high-efficiency tuned power amplifiers, resonant dc/dc power converters, dc/ac inverters, and digital signal processing for wireless communication. Dr. Sekiya is a member of the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan, Information Processing Society of Japan (IPSJ), and Research Institute of Signal Processing (RISP), Japan.
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Push-Pull ClassPower Amplifier for Low Harmonic-Contents and High Output-Power Applications Xiuqin Wei, Student Member, IEEE, Shingo Kuroiwa, Tomoharu Nagashima, Student Member, IEEE, Marian K. Kazimierczuk, Fellow, IEEE, and Hiroo Sekiya, Senior Member, IEEE
power Abstract—This paper introduces a push-pull classamplifier for achieving low harmonic contents and high output power. By applying the push-pull configuration of the classpower amplifier, the proposed amplifier achieves an extremely lower total harmonic distortion (THD) and about four times power higher output power than the conventional single classamplifier. Design curves of the proposed amplifiers for satisfying the classZVS/ZDVS/ZCS/ZDCS conditions are given. A design example is shown along with the PSpice-simulation and experimental waveforms for 1-MHz amplifier, considering the MOSFET drain-to-source nonlinear parasitic capacitances, MOSFET switch-on resistances, and equivalent series resistance of the inductors. The waveforms from the PSpice simulation and circuit experiment satisfied all the switching conditions, which has shown the accuracy of the design curves given in this paper power and validated the effectiveness of the push-pull classamplifier. ZVS/ZDVS/ZCS/ZDCS conditions, Index Terms—Classoutput power, push-pull classpower amplifier, total harmonic distortion (THD).
I. INTRODUCTION
T
HE classpower amplifier [1]–[4] is an improved version of the class-E power amplifier [5]–[14]. In the classpower amplifier, there is no jump at both switch-voltage and switch-current waveforms by adding the auxiliary circuit. For achieving jumpless switch-voltage and switch-current waveforms in the main circuit, the zero-voltage switching (ZVS) and zero-derivative-voltage switching (ZDVS) conditions at the turn-on instant and the zero-current switching (ZCS) and zero-derivative-current switching Manuscript received July 26, 2011; revised November 10, 2011; accepted December 23, 2011. Date of publication February 10, 2012; date of current version August 24, 2012. This work was supported by the Scholarship Foundation and Grant-in-Aid for scientific research (No. 23760253) of JSPS, Support Center for Advanced Telecommunications Technology Research, and the Telecommunications Advancement Foundation, Japan. This paper was recommended by Associate Editor T.-J. Liang. X. Wei is with the Department of Electronics Engineering and Computer Science, Fukuoka University, Fukuoka 814-0180, Japan (e-mail: [email protected]). T. Nagashima, H. Sekiya, and S. Kuroiwa are with the Graduate School of Advanced Integration Science, Chiba University, Chiba 263-8522, Japan (e-mail: [email protected]; [email protected]; kuroiwa@ faculty.chiba-u.jp). M. K. Kazimierczuk is with the Department of Electrical Engineering, Wright State University, Dayton, OH 45435-0001 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TCSI.2012.2185301
(ZDCS) conditions at the turn-off instant should be satisfied. power Because of these switching conditions, the classamplifier achieves higher power-conversion efficiency than the class-E power amplifier. In particular, this operation is attractive when the transistor has a long turn-off switching time. By allowing the slow switching of the switching devices, the driving power can be reduced and low-cost switching devices can be used for circuit implementations [1], [2]. Therefore, the classpower amplifier achieves high power-conversion efficiency at high frequencies with low cost by adding the auxiliary circuit. The conventional single classpower amplifier is, however, driven asymmetrically. Therefore, the harmonic contents appear in the power amplifier output waveforms, which results in high total harmonic distortion (THD) of the output voltage and current waveforms. In some applications, a very low THD is required. For achieving the low harmonic contents, it is very important to design correctly the impedance matching network. In the practical designs, however, any filtering method may lead to large power dissipation in the matching network [7]. In this paper, a push-pull configuration is applied for the classpower amplifiers. By applying the push-pull configuration, the THD is reduced significantly and the design of the impedance matching network becomes less critical. The auxiliary circuit contributes two factors, which are jumpless switch-voltage and switch-current waveforms and high output power. The output power of the proposed push-pull amplifier is power about four times higher than that of the single classamplifier. Additionally, the proposed amplifier also satisfies the classZVS/ZDVS/ZCS/ZDCS conditions. Therefore, the proposed amplifier can also achieve high power-conversion efficiency at high frequencies and slow switching devices are allowed compared with the push-pull class-E amplifier [7]. From the above features, it is stated that the push-pull classpower amplifier is suitable for low THD and high output-power applications, for example, for RF power supply. In this paper, power amplifiers are design curves of the push-pull classshown. For the designs of the proposed amplifier, the design algorithm in [8] is applied. By using this design algorithm, it is possible to obtain accurate design values, which satisfy the switching conditions at the main circuits and the ZVS classcondition at the auxiliary circuits. It is also possible to consider the nonlinear effects of the MOSFET drain-to-source parasitic capacitances, which cannot be ignored at high frequencies, MOSFET on-resistances, and equivalent series resistances of
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the inductors. It is seen from the PSpice simulation and the experimental results that the numerical calculations agreed with the simulation and experimental waveforms quantitatively, which validated the accuracy of the design curves shown in this paper and the effectiveness of the proposed amplifier. II. CIRCUIT DESCRIPTION AND PRINCIPLE OPERATION Fig. 1(a) shows a circuit topology of the proposed classpower amplifier. In the proposed power amplifier, two identical classpower amplifiers [1]–[4] are connected in parallel at the output filter and the push-pull configuration is achieved. Each classpower amplifier has a main circuit and an auxiliary circuit. The output current of the main circuit has a fundamental frequency and that of the auxiliary circuit has a biharmonic frequency. Both the main and auxiliary circuits have similar topologies to the class-E power amplifier [5]–[14]. Each circuit is composed of dc-supply voltage source , dc-feed inductance , MOSFET as a switching device , shunt capacitance , and series resonant filter . The shunt capacitance is the MOSFET nonlinear parasitic capacitance and the external capacitance , which are connected in parallel as shown in Fig. 1(b). In the above component expressions, means the main and auxiliary circuits. In addition, is the amplifier number for the parallel connection. The series resonant filters of the main circuits and the auxiliary circuits are tuned to the fundamental and biharmonic frequency of the output voltage, respectively. Fig. 1(b) shows an equivalent circuit of the proposed classpower amplifier. In this figure, is the equivalent resistance of the switching devices as shown in Fig. 1(c). In this paper, is expressed as (1) is the on-resistance of the MOSFETs and is the where on-resistance of the antiparallel diode included in the MOSFET devices. Additionally, , , and in Fig. 1(b) are the equivalent series resistances (ESRs) of the inductors , , and , respectively. Fig. 2 shows example waveforms in the proposed power amplifier when the switch-on duty ratios and are 0.5. In this figure, represents the angular time and is the operating frequency of the main circuit. For the proposed classpower amplifier, the switch is driven by the input voltage as shown in Fig. 2 and turns on and off alternately. When the switch is in the off-state, the sum of the currents through the dc-feed inductance of the main circuit, the resonant filter of the main circuit, and the resonant filter of the auxiliary circuit in the amplifier flows through the shunt capacitance . The current through produces the switch voltage of the main circuit . In this interval, the current through the switch resistance is almost zero because of . At the switch-turn-on instant of the main circuits, the switch voltage satisfies the ZVS/ZDVS conditions. Due to these switching conditions, there is no jump at the switch-voltage and switch-current waveforms
Fig. 1. Proposed classpower amplifier (a) Circuit topology (b) Equivalent circuit (c) Equivalent model of the MOSFET.
at turn-on instant. When the switch is in on-state, the voltage across the switch is almost zero. Therefore, the current flows through the switching device. At the switch-turn-off instant, both the ZCS and ZDCS conditions are achieved. From these switching conditions, there is also no jump at the switch-current and switch-voltage waveforms at the turn-off instant. This smooth turn-off switching can be achieved by injecting the biharmonic current from the auxiliary circuits. As a result, there is no jump in both the switch-voltage and switch-current waveforms. Here we consider that a step change appears on the current waveform in the class-E amplifier at the turn-off instant as shown in Fig. 3. From this figure, denotes the drain-current fall time. During the drain-current falling, the voltage and the current appear in the switch simultaneously. Therefore, the power losses occur in this interval [9], [10]. If is large, the power losses at the turn-off instant cannot be ignored. To minimize , it is effective to use a fast-switching MOSFET or to increase the amplitude of the input voltage. The former, however, pays high-cost to realize the amplifier. The latter suffers from the power-added-efficiency reduction [2]. Therefore, the slow-switching devices are allowed and the cost reduction is possible compared with the switching devices having jumps of the switch-voltage and switch-current waveforms, which is a feature of the classpower amplifier [1], [2]. In [4], it was
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TABLE I SWITCHING PATTERNS IN THE PROPOSED AMPLIFIER
push-pull configuration also needs a complex driver circuit. Additionally, the proposed amplifier includes floating load as shown in Fig. 1(a). For realizing the single-ended amplifier, a transformer is necessary. The transformer, however, extends the circuit size and may be a factor of power loss. III. DESIGN PROCEDURE
Fig. 2. Example waveforms of the proposed class.
power amplifier for
In this section, the design procedure for the proposed amplifier is explained. The design method is based on the design procedure in [8]. By applying this numerical design procedure, it is possible to obtain the accurate design values easily for achieving multiple design restrictions. Additionally, it is also possible to consider the nonlinear effect of the MOSFET drain-to-source capacitances, MOSFET switch-on resistances, and equivalent series resistances (ESRs) of inductors and capacitors. Therefore, the design method presented in [8] is very suitable for the proposed amplifier designs. Assumptions In this paper, the proposed amplifier is analyzed and designed with the following assumptions: 1) The switching devices have the equivalent resistance given in (1) and the MOSFET drain-to-source nonlinear parasitic capacitance as shown in Fig. 1(c). Generally, the nonlinear characteristic of the MOSFET drain-to-source capacitance is expressed as [2], [12]–[14]
Fig. 3. Waveforms of the class-E amplifier with the drain current fall time
.
claimed that the auxiliary circuit has a function for increasing output power. Because of the push-pull configuration of the proposed amplifier, the waveforms of one amplifier are identical to those of the other amplifier with phase-shift of . The proposed amplifier can deliver the output voltage about twice as high as that of the single classpower amplifier when the load resistance value is fixed. The auxiliary circuits contribute not only to the jumpless switch-voltage and switch-current waveforms but also to high output power. Additionally, the symmetry of the push-pull operations cancels even-harmonic contents. Therefore, THD can be reduced significantly. As a result, the proposed amplifier can achieve high power-conversion efficiency, low THD, and high output power at high frequencies with slowswitching devices. These features comply with the requirements of high-frequency and high-power applications, for example, RF transmitters or RF power supplies. There are, however, some drawbacks of the push-pull classpower amplifier. The circuit size becomes large because the push-pull configuration needs two amplifiers. The
(2)
2)
3) 4)
5)
is the built-in potential, which typically ranges where from 0.5 to 0.9 V for silicon devices, is the switch voltage, and is the capacitance at . When the MOSFETs are selected, the parasitic capacitance parameters are fixed. The ESRs of all the inductors are considered. The ESRs of all the capacitors, however, are ignored since they are much smaller than ESRs of the inductors. All the passive elements except the MOSFET parasitic capacitances work as linear elements. The shunt capacitances are composed of the MOSFET drain-to-source nonlinear parasitic capacitance and the linear external capacitance . The switches , , and turn off at . The switching frequency of the auxiliary circuit is twice as high as that of the main circuit. In addition, both the switch-on duty ratios and are 0.5. Therefore, the switching patterns are given in Table I.
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A. Parameters
C. Design Conditions
In this paper, following parameters are defined for the amplifier designs. 1. : The operating frequency. In this paper, is valid following the assumption (e). 2. : The resonant frequency. 3. : The ratio of the resonant frequency to the operating frequency. 4. : The ratio of the resonant capacitances to the external capacitances. : The ratio of the resonant inductance to the 5. dc-feed inductance. 6. : The ratio of the capacitance at the zero switch voltage to the external capacitance. 7. : The loaded quality factor.
For considering the switching conditions, the amplifier operation should be in the steady state. The steady-state conditions of the amplifier are (5) and . which is the boundary conditions between The classZVS/ZDVS/ZCS/ZDCS conditions of the main switches are mandatory to achieve high power-conversion efficiency at high frequencies with slow-switching devices. Because of the symmetry operation of the push-pull configuration, we can consider the switching conditions only for . When satisfies all the switching conditions, also satisfies the switching conditions. The class-E ZVS/ZDVS conditions at the switch turn-on instant [5] are
B. Circuit Equations for We consider the operations in the range of the proposed amplifier designs. By using the parameters defined above, we obtain
(6) The ZCS/ZDCS conditions at the switch turn-off instant are (7) When four switching conditions can be achieved simultaneously, there is no jump on both switch-voltage and switch-current waveforms and high power-conversion efficiency at high frequencies is achieved. Additionally, the ZVS condition of the auxiliary circuits is given as a switching condition at for high power-conversion efficiency [2]. (8)
for
and (3)
When we define
(3) can be rewritten as (4) where
and Both two auxiliary circuits turn on twice at during . If the ZVS condition in (8) is achieved, the ZVS condition can be also satisfied at due to the antiparallel diode [2]. From the above conditions, we recognize that the proposed amplifier designs reduce to solve the algebraic (5), (6), (7), and (8). In these equations, there are 19 algebraic equations and 14 unknown initial values. Therefore, five parameters can be set as the design parameters from . In this paper, the parameters , , , , and are selected as unknown parameters and the other parameters are given as design specifications. In order to obtain the values of the unknown parameters, the Newton’s method is applied to solve the algebraic equations. It is possible to derive the algebraic-equation solutions numerically because the circuit equations are obtained in (3). The algorithm of the Newton’s method was presented in [8] in detail. In addition, the Runge–Kutta method is used to solve the circuit equations in (3). IV. DESIGN CURVES In this section, design curves of the proposed power amplifier are shown using the design procedure in the previous section.
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is a root-mean-square value of the normalwhere ized output current and can be given by (10) and are the peak values of voltages and currents at the MOSFETs, which can be expressed as (11)
(12) and
Fig. 4. Design curves as functions of in the single classamplifier and amplifier (a) Design curves of and (b) Design the push-pull classand (c) Design curves of . curves of
For the derivations of design curves, all the ESRs of the inductors, parasitic capacitances of the MOSFETs, on-resistance of the MOSFETs, and on-resistance of the antiparallel diode are zero for calculating the design curves. By ignoring them, it is possible to obtain normalized design curves. In this situation, the design specifications of the push-pull classpower amplifier are given as follows: , , and . Fig. 4 shows the design parameters as functions of . It is seen from Fig. 4 that all the parameters of the proposed amplifier vary steeply for and those of the single classamplifier vary for For high , the output current is almost pure sinusoidal waveform regardless of . Therefore, design parameters are almost constant for high . For low , however, the output current has harmonic distortion and output current waveform varies as decreases. Therefore, the parameters for satisfying the low switching conditions also vary as shown in Fig. 4. Because of the push-pull operation, the harmonic contents are significantly reduced compared with the single classamplifier. Therefore, the break point of the proposed amplifier is smaller than that of the single classamplifier. V. OUTPUT POWER AND THD Fig. 5 shows the normalized output power, peak value of both the switch voltages and the switch currents, and for and 2 as functions of , where is the number of the amplifier, namely, for the single amplifier and for the push-pull amplifier. The normalized output powers can be obtained as (9)
(13) It is seen from Fig. 5(a) that the normalized output power in the proposed classamplifier is about four times as high as that in the single classamplifier for any , which is because the push-pull configuration applied in the proposed amplifier. It is seen from Fig. 5(b) that the peak values of the normalized switch voltages both in the main circuits and the auxiliary circuits for the proposed amplifier are a little lower than those for the single amplifier. However, it is also seen from Fig. 5(c) that the peak values of the normalized switch currents both in the main circuits and the auxiliary circuits for the proposed amplifier are about twice as high as those for the single amplifier. As a result, the power output capabilities of the main and auxiliary circuit MOSFETs in the proposed amplifier are almost the same as those in the single classamplifier as shown in Fig. 5(d). Fig. 6 shows the THD as a function of , which is defined as
(14) and are root-mean-square where values of the -th harmonic and those of the fundamental frequency component in the normalized output current , respectively. It is seen from Fig. 6 that the THD of the proposed amplifier increases rapidly as decreases for though that of the single amplifier increases with the decrease in for , which agrees with the discussions for the design curves in Fig. 4. It is also seen that the THD of the proposed amplifier is always much lower than that of the single classpower amplifier. This is because the push-pull configuration cancels the even harmonic contents. Therefore, the proposed amplifier is considerable efficient for the applications of low THD and high output power.
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Fig. 5. Characteristics as functions of in the single class(b) Normalized maximum switch voltages tions of
Fig. 6. THDs as functions of
amplifier and the push-pull classamplifier (a) Normalized output powers (c) Normalized maximum switch currents (d)
as func.
.
VI. EXPERIMENTAL VERIFICATION A. Experiment for the Proposed Amplifier In this paper, we carried out PSpice simulations and circuit experiments. In the circuit experiments, the driver circuit was built as shown in Fig. 7. We built a driver circuit by a dualchannel function generator Tektronix AFG3252, which generates two kinds of arbitral signals with a fixed phase shift, and some NOT logic circuits. First, the design specifications were given as follows: dc-supply voltage of the main circuit , dc-supply voltage of the auxiliary circuit , operating frequency MHz, load resistance , and loaded quality factor . We chose IRF530 MOSFETs as the switching devices. In this paper, the parameters of the IRF530 MOSFET are obtained from the PSpice MOSFET models as given in Table II. The parameter , , and are identical to , , and in the MOSFET models, respectively. Therefore, from Table II, , , and were obtained. Additionally, was obtained from the datasheet and was measured by the LCR meter of HP4284A. The other specifications were
Fig. 7. Driver circuit.
the same as the previous section. From , , and , and mH were obtained. Therefore, we made inductors prior to the numerical calculations for solving the design equations. By using HP4284A, , , and were measured, which were also used in the design calculation. In the design calculation, the other ESR values were zero because the inductor values would be obtained after the design calculation. By using the design procedure in Section III, the design values were obtained as given in Table III. This table also gives the measured element values for the circuit experiment. Fig. 8 shows the waveforms from numerical calculation, PSpice simulation, and circuit experiment. The Tektronix TDS3014B oscilloscope was used for the experiment-waveform measurements and the current waveforms were measured
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TABLE II PSPICE MODEL OF IRF530 MOSFET
TABLE III ELEMENT VALUES OF THE PROPOSED POWER AMPLIFIER
by using the Tektronix TCP202 current probe. It is seen from Fig. 8 that both the PSpice and experimental waveforms satisfied the classZVS/ZDVS/ZCS/ZDCS conditions in the main circuits and the ZVS condition in auxiliary circuits completely. From these satisfactions, the validity of the design procedure and design curves shown in Fig. 4 was confirmed. Table IV gives the measured values of the circuit experiment. In this table, the dc-supply voltages and the direct currents were obtained from the digital multimeter of Iwatsu VOAC7532. The dc-supply power of the main circuit and that of the auxiliary circuit are (15) where (16) In addition, the output-voltage was measured by the digital multimeter of Agilent 3458A. The power gain is
Fig. 8. Waveforms of the proposed amplifier (a) Numerical waveforms (b) PSpice-simulation waveforms (c) Experimental waveforms.
and the power-added efficiency
is obtained from
(17) (18)
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TABLE IV RESULTS OF THE PROPOSED POWER AMPLIFIER
Fig. 9. Single class-
where are the gate-driving powers as shown in Figs. 1(a) and 7. It is seen from Tables III and IV that the experimental measurements agreed with the numerical calculations quantitatively, which also validated the design procedure in this paper. In the circuit experiment, the measured THD and power-conversion efficiency were 5.0% and 93.0% at 24.4 W and 1 MHz output. The measured THD was a little higher than the numerical one. This is because the experimental components include tolerances and experimental waveforms have unpredictable noises. Additionally, the phase shift between and is not strictly because the driving signal has a processing delay through a NOT logic as shown in Fig. 7. The above factors break the complete symmetry between two amplifiers. Therefore, the measured THD was a little higher than the numerical THD. The measured output power and the measured power-conversion efficiency were a little lower than those of numerical calculations. This is because the ESRs of and were not considered in the numerical calculations. Additionally, the switch on-resistance and the body-diode on-resistance for the numerical calculations have a little difference compared with the experimental components in the strict sense. B. Comparison of Push-Pull and Single Amplifiers For a comparison with the push-pull classamplifier, we also carried out the circuit experiment of the single classamplifier as shown in Fig. 9. For fair comparisons, the design specifications of the single classamplifier are the same as those of the push-pull amplifier. Following the design procedure in [2], the design values were obtained as given in Table V. Fig. 10 shows the waveforms obtained from numerical calculations, PSpice simulations, and circuit experiments. The experimental waveforms agreed with the numerical and simulation ones quantitatively. Table VI gives the measurement results along with the numerical calculations. It is seen from Table VI that the measurement results showed the quantitative agreements with the numerical calculations. Strictly, the measured THD was a little higher than the numerical one. In addition, the measured output power and power-conversion efficiency were a little lower than the numerical ones. These
power amplifier.
Fig. 10. Waveforms of the single classamplifier (a) Numerical waveforms (b) PSpice-simulation waveforms (c) Experimental waveforms.
results were similar to the results in Table IV. It is seen from Tables IV and VI that the measured THD in the push-pull classamplifier was 30% of the single-amplifier THD. Additionally, the output power of the push-pull classpower amplifier was 4.04 times as high as that of the single amplifier. It can be stated from both the numerical and experimental results that the proposed power amplifier is relatively effective to reduce the harmonic contents and obtain high output power. C. Maximum Operating Frequency The maximum operating frequency is important information for amplifier designs. Generally, the shunt capacitance decreases as the operating frequency increases. The shunt capacitance, however, cannot be zero because of the MOSFET drain-to-source parasitic capacitance. Therefore, the maximum operating frequency can be obtained by calculating the operating frequency for zero external linear shunt capacitance [12], [13]. In the proposed amplifier, the shunt capacitance in the
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and power-conversion efficiency were 5.0% and 93.0% at 24.4 W and 1 MHz output. It was claimed that the slow-switching MOSFET can be allowed because of the classZVS/ZDVS/ZCS/ZDCS conditions in [1], [2], and this paper. It is, however, difficult to quantitative evaluations how slow switching devices are allowed in the classamplifier, which is an important and interesting topic to be addressed in the future, REFERENCES
TABLE VI RESULTS OF THE SINGLE CLASS-
AMPLIFIER
auxiliary circuit is always lower than the main circuit because the output frequency of the auxiliary circuits is higher than that of the main circuits. Therefore, the maximum operating in (3) frequency can be obtained by substituting , , , , and as unknown parameters and selecting for solving the algebraic equations. If IRF530 MOSFETs are used for the switching elements, the maximum frequency is 6.077 MHz. VII. CONCLUSION power amThis paper has introduced the push-pull classplifier. The proposed amplifier achieves the extremely low total harmonic distortion (THD) and four times the output power of the single classpower amplifier. The design curves of the proposed classpower amplifier for achieving the ZVS/ ZDVS/ZCS/ZDCS conditions in the main circuit and the ZVS condition in the auxiliary circuit are given. A design example along with the PSpice-simulation and experimental waveforms showed the validity and accuracy of the design curves shown in this paper and the effectiveness of the proposed classpower amplifier. In the circuit experiment, the measured THD
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Xiuqin Wei (S’10) was born in Fujian, China, on December 7, 1983. She received the B.E. degree from Fuzhou University, China, in 2005 and the Ph.D. degree from Chiba University, Japan, in 2012. Since April 2012, she has been with Fukuoka University and now she is an Assistant Professor at Department of Electronics Engineering and Computer Science. Her research interests include high frequency power amplifier.
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Shingo Kuroiwa received the B.E., M.E. and D.E. degrees in electro-communications from the University of Electro Communications, Tokyo, Japan, in 1986, 1988, and 2000, respectively. From 1988 to 2001, he was a researcher at the KDD R&D Laboratories. From 2001 to 2007, he was an Associate Professor of Institute of Technology and Science at the University of Tokushima, Japan. Since 2007, he has been with Chiba University, Japan, where he is currently a Professor of Graduate School of Advanced Integration Science. His current research interests include speech recognition, speaker recognition, signal processing, and information retrieval. Prof. Kuroiwa is a member of the ISCA, IEICE, IPSJ, and ASJ.
Tomoharu Nagashima (S’11) was born in Saitama, Japan, on February 4, 1989. He received the B.E. degree from the Department of Information and Image Sciences, Chiba University, Chiba, Japan, in 2011. He is currently working toward the M.E. degree at Chiba University. His current research interest is in high-frequency high-efficiency tuned power amplifiers.
Marian K. Kazimierczuk (M’91–SM’91–F’04) received the M.S., Ph.D., and D.Sci. degrees in electronics engineering from the Department of Electronics, Technical University of Warsaw, Warsaw, Poland, in 1971, 1978, and 1984, respectively. He was a Teaching and Research Assistant from 1972 to 1978 and Assistant Professor from 1978 to 1984 with the Department of Electronics, Institute of Radio Electronics, Technical University of Warsaw, Poland. In 1984, he was a Project Engineer for De-
sign Automation, Inc., Lexington, MA. In 1984–1985, he was a Visiting Professor with the Department of Electrical Engineering, Virginia Polytechnic Institute and State University, VA. Since 1985, he has been with the Department of Electrical Engineering, Wright State University, Dayton, OH, where he is currently a Professor. His research interests are in high-frequency high-efficiency switching-mode tuned power amplifiers, resonant and PWM dc/dc power converters, dc/ac inverters, high-frequency rectifiers, electronic ballasts, ,modeling and control of converters, high-frequency magnetics, power semiconductor devices. Prof. Kazimierczuk received the IEEE Harrell V. Noble Award for his contributions to the fields of aerospace, industrial, and power electronics, in 1991. He was and is an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS and served as an Associate Editor for the Journal of Circuits, Systems, and Computers. He was a member of the Superconductivity Committee of the IEEE Power Electronics Society. He was a chair of the CAS Technical Committee of Power Systems and Power Electronics Circuits in 2001–2002. He is a member of Tau Beta Pi.
Hiroo Sekiya (S’97–M’01–SM’11) was born in Tokyo, Japan, on July 5, 1973. He received the B.E., M.E., and Ph. D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 1996, 1998, and 2001 respectively. Since April 2001, he has been with Chiba University and now he is an Assistant Professor at Graduate School of Advanced Integration Science, Chiba University, Chiba, Japan. From Feb. 2008 to Feb. 2010, he was with Electrical Engineering, Wright State University, Ohio, USA as a visiting scholar. His research interests include high-frequency high-efficiency tuned power amplifiers, resonant dc/dc power converters, dc/ac inverters, and digital signal processing for wireless communication. Dr. Sekiya is a member of the Institute of Electronics, Information and Communication Engineers (IEICE) of Japan, Information Processing Society of Japan (IPSJ), and Research Institute of Signal Processing (RISP), Japan.
