Capacitance-to-Digital Converter Based on Power ...
Capacitance-to-Digital Converter Based on Power Detection Mauricio Velazquez Lopez, Yong-Chang Choi, and Hyung-Joun Yoo
Keywords- capacitance-to-digital converter, capacitive sensor, power detection
I.
INTRODUCTION
The usage of capacitive sensors has increased due to their size, reliability, and low power consumption. A capacitance-todigital converter (CDC) directly transforms a change in capacitance into a corresponding digital word. CDCs must be low power circuits. Furthermore, the small variations in capacitance values often require the CDCs to have high resolution. Most applications fall between a few hundred femmto-farads and 1 nF [1]. Hence, CDCs also require a significantly wide capacitance range. Recent works propose a sigma-delta structure based on operational amplifiers [1], which are power hungry elements and usually suffer from limited capacitance range. Other works use pulse width modulation [2], which depends upon very complex time measurement and control circuits. CDCs also focus on ADC techniques such as successive approximation [3] or double ramp conversion [4] which can also suffer from a limited capacitance range. High-resolution CDCs have either high power consumption or a restrictive capacitance range. To overcome these limitations a power detection based CDC with wide capacitance range and high resolution is presented in this work. II.
CAPACITANCE MEASUREMENT USING POWER DETECTION
R Ctot
(a)
(b)
ΔP ∝ ΔC f2 f0 Frequency (Hz) (c)
Fig. 1 (a) Variable LPF (b) LPF frequency response and input tone (c) Power reduction caused by the change in cut-off frequency.
Ctot = C0 + ΔC.
(1)
This CDC is based on the detection of power fluctuations in a fundamental tone introduced at the input of the system; these power fluctuations are caused by a variable low-pass filter (LPF) containing the capacitive element to be interfaced, Fig. 1 (a). Fig. 1 (b) shows the frequency response of a first-order LPF with cut-off frequency f1, assuming ΔC is zero, along with a fundamental tone at f0. As the capacitance ΔC changes, the cut-off frequency of the LPF shifts and becomes f2. This shift causes the LPF to decrease the power of the fundamental tone by ΔP which is proportional to the original variation ΔC, Fig. 1 (c). If the distance between f1 and f2 is one decade then ΔP = 20 dB and ΔC = 9 C0. The reduction in power can be detected by means of a power detector whose typical linear-in-dB characteristic is shown in Fig. 2 (a). The slope m considerably influences the sensitivity of the system since it determines the change in output voltage ΔV generated for a corresponding variation in power ΔP. In order to increase the system’s adaptability a multistage power detector (MPD), Fig. 2 (b), was implemented based on [5]. Switching the number of active stages on the power detector selects the desired slope. A steeper slope will increase the sensitivity of the system at the cost of a smaller input capacitive range. The MPD output voltage can then conveyed to an analogto-digital converter (ADC) that will generate a digital word corresponding to the change in capacitance ΔC. III.
A capacitive sensor can be seen as the coupling of a constant capacitance C0 and a variable capacitance ΔC representing the physical variable that is measured. Therefore, in agreement with previous works such as [1], the total capacitance Ctot can be expressed as
f1 f0 Frequency (Hz)
Magnitude (dB)
Abstract— High resolution capacitance-to-digital converters (CDC) usually have severe capacitance range limitations or high power consumption. This paper presents a power detection based 16-bit CDC with a maximum capacitance range superior to 1 nF and a capacitance resolution as small as 0.27 fF. This work’s multi-stage power detector provides the CDC with three different sensitivity rates making it highly versatile. An on-chip low-pass filter was added to prove the method’s reliability for on-chip applications. The circuit was designed using a 0.25-μm CMOS technology, operates at a single 2.5-V supply, and consumes less than 1.86 mW.
Magnitude (dB)
The Department of Electrical Engineering and the Mobile Sensor and IT Convergence Center Korea Advanced Institute of Science and Technology 373-1 Guseong-dong, Daejeon, Republic of Korea [email protected], [email protected], [email protected]
CAPACITANCE TO DIGITAL CONVERTER
Fig. 3 shows the proposed CDC. A fundamental tone is introduced at the AC input of the circuit into the corresponding LPF. Fluctuations in power generated by the change in capacitance on the LPF are turned into voltage by the MPD. That voltage is then digitalized by an ideal 16-bit ADC. An onchip LPF based on a super-source-follower (SSF) biquadratic
This work was supported by IC Design Education Center (IDEC)
-page number-
ISOCC 2015
TABLE II. COMPARISON TABLE
TABLE I. POWER DETECTION BASED CDC CHARACTERISTICS m6
m4 Working frequecy (kHz) Dynamic range (dB) at 1MHz
80~1500
Slope (mV/dB)
Output Voltage (mV)
S S F
40
58.6
74
30.4
22.5
17.7
Capacitance range (pF) Capacitance resolution (fF)
Capacitance range ΔC (pF) Capacitance resolution (fF) Power consumption (mW)
1.5~6 0.07 Output Voltage (mV)
M P D
This work
m8
m = ΔV/ΔP
ΔV ΔP Input Power (dBm)
m6
m6
m8
−
−
−
−
18 C0
26.3 C0
33.3 C0
520
6.8
6
400
0.27 C0
0.4 C0
0.5 C0
0.03
0.20
23.4
6.1
Keywords- capacitance-to-digital converter, capacitive sensor, power detection
I.
INTRODUCTION
The usage of capacitive sensors has increased due to their size, reliability, and low power consumption. A capacitance-todigital converter (CDC) directly transforms a change in capacitance into a corresponding digital word. CDCs must be low power circuits. Furthermore, the small variations in capacitance values often require the CDCs to have high resolution. Most applications fall between a few hundred femmto-farads and 1 nF [1]. Hence, CDCs also require a significantly wide capacitance range. Recent works propose a sigma-delta structure based on operational amplifiers [1], which are power hungry elements and usually suffer from limited capacitance range. Other works use pulse width modulation [2], which depends upon very complex time measurement and control circuits. CDCs also focus on ADC techniques such as successive approximation [3] or double ramp conversion [4] which can also suffer from a limited capacitance range. High-resolution CDCs have either high power consumption or a restrictive capacitance range. To overcome these limitations a power detection based CDC with wide capacitance range and high resolution is presented in this work. II.
CAPACITANCE MEASUREMENT USING POWER DETECTION
R Ctot
(a)
(b)
ΔP ∝ ΔC f2 f0 Frequency (Hz) (c)
Fig. 1 (a) Variable LPF (b) LPF frequency response and input tone (c) Power reduction caused by the change in cut-off frequency.
Ctot = C0 + ΔC.
(1)
This CDC is based on the detection of power fluctuations in a fundamental tone introduced at the input of the system; these power fluctuations are caused by a variable low-pass filter (LPF) containing the capacitive element to be interfaced, Fig. 1 (a). Fig. 1 (b) shows the frequency response of a first-order LPF with cut-off frequency f1, assuming ΔC is zero, along with a fundamental tone at f0. As the capacitance ΔC changes, the cut-off frequency of the LPF shifts and becomes f2. This shift causes the LPF to decrease the power of the fundamental tone by ΔP which is proportional to the original variation ΔC, Fig. 1 (c). If the distance between f1 and f2 is one decade then ΔP = 20 dB and ΔC = 9 C0. The reduction in power can be detected by means of a power detector whose typical linear-in-dB characteristic is shown in Fig. 2 (a). The slope m considerably influences the sensitivity of the system since it determines the change in output voltage ΔV generated for a corresponding variation in power ΔP. In order to increase the system’s adaptability a multistage power detector (MPD), Fig. 2 (b), was implemented based on [5]. Switching the number of active stages on the power detector selects the desired slope. A steeper slope will increase the sensitivity of the system at the cost of a smaller input capacitive range. The MPD output voltage can then conveyed to an analogto-digital converter (ADC) that will generate a digital word corresponding to the change in capacitance ΔC. III.
A capacitive sensor can be seen as the coupling of a constant capacitance C0 and a variable capacitance ΔC representing the physical variable that is measured. Therefore, in agreement with previous works such as [1], the total capacitance Ctot can be expressed as
f1 f0 Frequency (Hz)
Magnitude (dB)
Abstract— High resolution capacitance-to-digital converters (CDC) usually have severe capacitance range limitations or high power consumption. This paper presents a power detection based 16-bit CDC with a maximum capacitance range superior to 1 nF and a capacitance resolution as small as 0.27 fF. This work’s multi-stage power detector provides the CDC with three different sensitivity rates making it highly versatile. An on-chip low-pass filter was added to prove the method’s reliability for on-chip applications. The circuit was designed using a 0.25-μm CMOS technology, operates at a single 2.5-V supply, and consumes less than 1.86 mW.
Magnitude (dB)
The Department of Electrical Engineering and the Mobile Sensor and IT Convergence Center Korea Advanced Institute of Science and Technology 373-1 Guseong-dong, Daejeon, Republic of Korea [email protected], [email protected], [email protected]
CAPACITANCE TO DIGITAL CONVERTER
Fig. 3 shows the proposed CDC. A fundamental tone is introduced at the AC input of the circuit into the corresponding LPF. Fluctuations in power generated by the change in capacitance on the LPF are turned into voltage by the MPD. That voltage is then digitalized by an ideal 16-bit ADC. An onchip LPF based on a super-source-follower (SSF) biquadratic
This work was supported by IC Design Education Center (IDEC)
-page number-
ISOCC 2015
TABLE II. COMPARISON TABLE
TABLE I. POWER DETECTION BASED CDC CHARACTERISTICS m6
m4 Working frequecy (kHz) Dynamic range (dB) at 1MHz
80~1500
Slope (mV/dB)
Output Voltage (mV)
S S F
40
58.6
74
30.4
22.5
17.7
Capacitance range (pF) Capacitance resolution (fF)
Capacitance range ΔC (pF) Capacitance resolution (fF) Power consumption (mW)
1.5~6 0.07 Output Voltage (mV)
M P D
This work
m8
m = ΔV/ΔP
ΔV ΔP Input Power (dBm)
m6
m6
m8
−
−
−
−
18 C0
26.3 C0
33.3 C0
520
6.8
6
400
0.27 C0
0.4 C0
0.5 C0
0.03
0.20
23.4
6.1
