Photolithography-Based Patterning of Liquid Metal Interconnects for ...
Supporting Information
Photolithography-Based Patterning of Liquid Metal Interconnects for Monolithically Integrated Stretchable Circuits Chan Woo Park,*,†,‡ Yu Gyeong Moon,†,‡ Hyejeong Seong,§ Soon Won Jung,† Ji-Young Oh,† Bock Soon Na,† Nae-Man Park,†,‡ Sang Seok Lee,† Sung Gap Im,§ and Jae Bon Koo*,† †
Wearable Device Research Section, Electronics and Telecommunications Research Institute
(ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon 34129 Republic of Korea ‡Department of Advanced Device Technology, Korea University of Science and Technology (UST), 217 Gajeong-ro, Yuseong-gu, Daejeon 34113 Republic of Korea §Department of Chemical and Biomolecular Engineering & Graphene Research Center KI for Nanocentury, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141 Republic of Korea
Corresponding Authors *Chan Woo Park. E-mail: [email protected] *Jae Bon Koo. E-mail: [email protected]
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Figure S1. Schematic illustration of the surface modification process for the parylene layer. (a) Formation of oxygen-containing moieties by oxygen plasma treatment, (b) silanization with aminopropyltrimethioxysilane (APTES), and (c) generation of silanol groups by UV/O3.
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Figure S2. Patterning process of the liquid metal (EGaIn) on a Si substrate
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Figure S3. Height profiles of the liquid metal patterns measured by a confocal microscope, at three representative points (top-end, center, and bottom-end) across 30-mm-long traces.
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Figure S4. Current-Voltage characteristics of liquid metal traces patterned on Si, with widths of 20, 35, and 75µ µm (channel length: 15mm).
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Photolithography-Based Patterning of Liquid Metal Interconnects for Monolithically Integrated Stretchable Circuits Chan Woo Park,*,†,‡ Yu Gyeong Moon,†,‡ Hyejeong Seong,§ Soon Won Jung,† Ji-Young Oh,† Bock Soon Na,† Nae-Man Park,†,‡ Sang Seok Lee,† Sung Gap Im,§ and Jae Bon Koo*,† †
Wearable Device Research Section, Electronics and Telecommunications Research Institute
(ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon 34129 Republic of Korea ‡Department of Advanced Device Technology, Korea University of Science and Technology (UST), 217 Gajeong-ro, Yuseong-gu, Daejeon 34113 Republic of Korea §Department of Chemical and Biomolecular Engineering & Graphene Research Center KI for Nanocentury, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141 Republic of Korea
Corresponding Authors *Chan Woo Park. E-mail: [email protected] *Jae Bon Koo. E-mail: [email protected]
S-1
Figure S1. Schematic illustration of the surface modification process for the parylene layer. (a) Formation of oxygen-containing moieties by oxygen plasma treatment, (b) silanization with aminopropyltrimethioxysilane (APTES), and (c) generation of silanol groups by UV/O3.
S-2
Figure S2. Patterning process of the liquid metal (EGaIn) on a Si substrate
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Figure S3. Height profiles of the liquid metal patterns measured by a confocal microscope, at three representative points (top-end, center, and bottom-end) across 30-mm-long traces.
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Figure S4. Current-Voltage characteristics of liquid metal traces patterned on Si, with widths of 20, 35, and 75µ µm (channel length: 15mm).
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