Fall 2009 Midterm
Name:______________________________
Student ID:________________
McGill University Department of Electrical and Computer Engineering ECSE 221 Introduction to Computer Engineering I Mid Term Exam Examiner: F.P. Ferrie
Date: October 16, 2009
Unless otherwise indicated, answer all questions in the workbook provided. Closed book examination, calculators permitted (Faculty Standard only). Question 1
(2 points)
Calculate the exact number of significant figures in Base-10 that can be represented using the IEEE 754 floating point representation. Question 2
(4 points)
Encode the number 9.27 x 10-12 using IEEE 754 encoding and express your result as a 8-digit hexadecimal number. Question 3
(2 points)
Multiply 1011 by 1101 using binary multiplication. Show your work and express the result in octal notation. Question 4
(2 points)
Explain why most floating point representations encode the exponent using a bias instead of a twos-complement scheme. Question 5
(2 points)
Determine what is produced by the following "C" program: int main() { char c=0x61; printf("Variable c contains %c\n",c&0x5f); } Question 6
(2 points)
How many bits are required to encode a voltage in the range [-6,12] V assuming a resolution of 1.0 mV, assuming that the analog-to-digital converter produces a 2’s complement output? Question 7
(2 points)
Let F(a,b,c) be a binary-valued function of 3 binary-valued variables, a, b, and c. How many different functions F are possible? (turn over, more questions on back)
Question 8
(6 points)
Derive the minimal ∑∏ and ∏∑ forms for a function FABCD = ∑ (0,2,5,7,8,10,13,15) . Prove the 1
resulting forms are equal, and show the corresponding NAND-NAND and NOR-NOR implementations. Draw the circuit diagram for a 2-input NAND gate and 2-input NOR gate respectively using LogicWorks X-gates and passive resistors. € Question 9 (4 points) Assuming that full adders are available, draw the circuit diagram for a 4-bit full adder, clearly labeling all inputs and outputs. Determine the propagation delay for this circuit assuming that the full-adder modules are fabricated using NAND-NAND logic, and with all gates having an identical propagation delay of 5nS. Question 10 (2 points) Write down the state transition table for a J-K flip-flop and the corresponding next state equation Qˆ = F(J, K,Q) (if you've forgotten, you can quickly derive it from the table as shown in class). Question 11 (2 points) The timing diagram shown below corresponds to a clocked S-R latch. Fill in the waveforms corresponding to Q and Q’.
Student ID:________________
McGill University Department of Electrical and Computer Engineering ECSE 221 Introduction to Computer Engineering I Mid Term Exam Examiner: F.P. Ferrie
Date: October 16, 2009
Unless otherwise indicated, answer all questions in the workbook provided. Closed book examination, calculators permitted (Faculty Standard only). Question 1
(2 points)
Calculate the exact number of significant figures in Base-10 that can be represented using the IEEE 754 floating point representation. Question 2
(4 points)
Encode the number 9.27 x 10-12 using IEEE 754 encoding and express your result as a 8-digit hexadecimal number. Question 3
(2 points)
Multiply 1011 by 1101 using binary multiplication. Show your work and express the result in octal notation. Question 4
(2 points)
Explain why most floating point representations encode the exponent using a bias instead of a twos-complement scheme. Question 5
(2 points)
Determine what is produced by the following "C" program: int main() { char c=0x61; printf("Variable c contains %c\n",c&0x5f); } Question 6
(2 points)
How many bits are required to encode a voltage in the range [-6,12] V assuming a resolution of 1.0 mV, assuming that the analog-to-digital converter produces a 2’s complement output? Question 7
(2 points)
Let F(a,b,c) be a binary-valued function of 3 binary-valued variables, a, b, and c. How many different functions F are possible? (turn over, more questions on back)
Question 8
(6 points)
Derive the minimal ∑∏ and ∏∑ forms for a function FABCD = ∑ (0,2,5,7,8,10,13,15) . Prove the 1
resulting forms are equal, and show the corresponding NAND-NAND and NOR-NOR implementations. Draw the circuit diagram for a 2-input NAND gate and 2-input NOR gate respectively using LogicWorks X-gates and passive resistors. € Question 9 (4 points) Assuming that full adders are available, draw the circuit diagram for a 4-bit full adder, clearly labeling all inputs and outputs. Determine the propagation delay for this circuit assuming that the full-adder modules are fabricated using NAND-NAND logic, and with all gates having an identical propagation delay of 5nS. Question 10 (2 points) Write down the state transition table for a J-K flip-flop and the corresponding next state equation Qˆ = F(J, K,Q) (if you've forgotten, you can quickly derive it from the table as shown in class). Question 11 (2 points) The timing diagram shown below corresponds to a clocked S-R latch. Fill in the waveforms corresponding to Q and Q’.
