simple chaotic circuit using cmos ring oscillators - Semantic Scholar
International Journal of Bifurcation and Chaos, Vol. 14, No. 7 (2004) 2513–2524 c World Scientific Publishing Company
SIMPLE CHAOTIC CIRCUIT USING CMOS RING OSCILLATORS YASUTERU HOSOKAWA Department of Information Science, Shikoku University, Tokushima 771-1192, Japan [email protected] YOSHIFUMI NISHIO Department of Electrical and Electronic Engineering, Tokushima University, Tokushima 770-8506, Japan [email protected] Received January 14, 2003; Revised August 18, 2003 In this study, a chaotic circuit suitable for an integrated circuit is proposed. The circuit consists of two CMOS ring oscillators and a pair of diodes. By using a simplified model of the circuit, the mechanism of generating chaos is explained and the exact solutions are derived. The exact expressions of the Poincar´e map and its Jacobian matrix make those possible to confirm the generation of chaos using the Lyapunov exponents and to investigate the related bifurcation phenomena. Keywords: Chaotic circuit; CMOS; ring oscillator; Lyapunov exponents.
1. Introduction There are several possibilities of engineering applications with chaos, and they have been investigated by many researchers passionately in the past 10 years. For realizing such applications, an integration of chaotic circuits is a very important subject. The advantages of an integrated circuit are power saving and miniaturization of circuits. Further, in the case of chaos synchronization being utilized in the application, less parameter errors of circuit elements are needed. By fabricating several identical chaotic circuits on the same silicon chip, the resulting circuits are almost the same [Lozi & Chua, 1993]. This becomes more important if a large number of chaotic cells are needed to exploit several features of chaotic networks. On the other hand, various chaotic circuits have been realized as integrated circuits [Cruz & Chua, 1992; Kanou et al., 1993; Restituro & Rodr´ıguez,
1998; Eguchi et al., 1998]. However, because the purpose of these studies was to realize Chua’s circuit on the IC, the realized circuits have relatively complex structures, which need high integration techniques. The goal of our study is to integrate a chaotic circuit having a simple structure and a small size. One of the attractions of chaos has been that simple systems generate complex phenomena. We go back again to this attraction, namely we try to propose a simple integrated circuit generating chaos. In this study, we propose a simple chaotic circuit suitable for integration. At first, we take note of a CMOS ring oscillator, which is one of the simplest functional circuits constructed on the chip. The oscillator consists of the odd number of CMOS inverters and is used for a CMOS process performance test. Our chaotic circuit is based on two CMOS ring oscillators and a pair of diodes. Therefore, we consider that the proposed circuit is 2513
Y. Hosokawa & Y. Nishio
realized on the chip very easily. By SPICE simulations of the circuit, we can observe that the periodic orbit bifurcates to chaos via torus. In order to analyze these phenomena in detail, we derive a simplified model of the circuit. The simplified model consists of some linear functions and one piecewise-linear function. The model reveals the physical mechanism of the generation of chaos. Further, the exact solutions can be derived from the model. The exact expressions of the Poincar´e map and its Jacobian matrix make those possible to confirm the generation of chaos using the Lyapunov exponents and to investigate the related bifurcation phenomena.
2. Design of Chaotic Circuit
[V] 5
4 VOLTAGE
2514
3
2
1
0 1e-07
1.1e-07
1.2e-07
1.3e-07
1.4e-07
TIME
Fig. 2.
1.5e-07 [sec.]
SPICE simulation result of the ring oscillator in
Figure simulation result of theisring oscillator in Fig. is1. 4 Channel Fig.2:1.SPICE Channel width of p-MOS 60 µm and length µm width p-MOS is width 60[µm] of andn-MOS length isis4 [µm] andand channel widthisof4 n-MOS andof channel 20 µm length µm. is 20[µm] and length is 4 [µm]. Vdd = 2.70[V] and Vss = 2.30[V]. Maximum time Vdd = 2.70 V and Vss = 2.30 V. Maximum time step is 50 ps step is 50 [ps] and analysis time is 10-100 [µs].
and analysis time is 10–100 µs.
Figure 1 shows a three-stage ring oscillator. This oscillator consists of three CMOS inverters. In the case of the CMOS performance test, many odd number of inverters are coupled and the performance is given as an oscillation frequency. Figure 2 shows SPICE simulation results of the ring oscillator in Fig. 1. Channel width of p-MOS is 60 µm and length is 4 µm and channel width of n-MOS is 20 µm and length is 4 µm, Vdd = 2.70 V and Vss = 2.30 V. These parameters and other SPICE parameters are chosen by taking into account an implementation with 0.5 µm CMOS integrated circuit technology. We design a chaotic circuit using the ring oscillators as shown in Fig. 3. In order to control amplitudes of oscillators, R1 and R2 are connected. The frequency of the upper side oscillator is controlled by C1 . Figure 4 shows SPICE simulation results of the chaotic circuit in Fig. 3. Channel width of p-MOS is 60 µm and length is 4 µm and channel width of n-MOS is 20 µm and length is 4 µm. Vdd = 2.70 V, Vss = 2.30 V, R1 = 3000 Ω and
output Vdd
a1
a2
R1
a3
C1 Vdd M1
M2 Vss
a1
a2
a3
R2
Fig. 3.
Chaotic circuit.
Figure 3: Chaotic circuit.
C1 = 9.00 pF. We can observe that a periodic or20 bit (a) bifurcates to torus (b) and (c) and chaos (d) and (e). The main oscillation frequency bandwidth is about 100–250 MHz. Additionally, we have confirmed numerically that all inverters utilize their linear regions only. Remark. In our early study, we have proposed a design methodology of chaotic circuits [Hosokawa & Nishio, 2002], namely connecting two oscillatory elements by a nonlinear resistor. The present circuit is designed according to this methodology. We consider that the result of this study supports the effectiveness of the methodology.
Vss
3. Simplified Model of Chaotic Circuit 21
1: Three-stage ring ring oscillator. Fig. Figure 1. Three-stage oscillator.
In order to analyze the phenomena observed from the SPICE simulations, a simplified model of the
Vb3
-1
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
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0 Va3 -0.5 0 Va3 (b) (a)
-1
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0 Va3
Vb3
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(a)
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(a)
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1
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1
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
(b) (d)
1 1 1
(c)(e) (b) 0.6 0.8 Figure0.84: SPICE simulation result of the chaotic circuit in Fig. 3. Channel 0.4 0.6 0.6 width of p-MOS is 60[µm]0.2 and length is 4 [µm] and channel width of n-MOS is 0.40.8 Figure 4:0.4 SPICE simulation result of the chaotic circuit i 0 Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and 20[µm]0.20.6 and length is 4 [µm]. width of0.2 p-MOS is 60[µm] and length is 4 [µm] and channel C1 = 9.00[nF ]. (a) R2 =-0.2 50.0[Ω]. (b) R2 = 100.0[Ω]. (c) R2 = 125.0[Ω]. (d) 00.4 0 20[µm] -0.2 and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V] -0.4 -0.2 0.2 (e) R2 = 200.0[Ω]. R2 = 150.0[Ω]. -0.6 C1 = 9.00[nF ]. (a) R2 = 50.0[Ω]. (b) R2 = 100.0[Ω]. (c) -0.4 0 -0.4 -0.8 R = 150.0[Ω]. (e) R2 = 200.0[Ω]. -0.6 -0.6 -0.2 0 0.5 1 -1 -0.5 2 0 0.5 1 Vb3
Vb3
Vb3
-0.5
-0.8 0 0.5 1 -1 -0.5 0 0.5 1 22Va3 Va3 Va3 (e) 22 0 0.5 1 (b) simulation -1result -0.5 (e)3. Channel width of p-MOS is 60 µm and length Fig. 4. SPICE of the chaotic circuit in Fig. is 4 µm Va3length is 4 µm. V = 2.70 V, Vss = 2.30(e) and channel width of n-MOS is 20 (b) µm and V, R1 = 3000 Ω and C1 = 9.00 nF. dd (a) R2 = 50.0 Ω. (b) R2 = 100.0 Ω. (c) R2 = 125.0 Ω. (d) R2 = 150.0 Ω. (e) R2 = 200.0 Ω.
Va3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
-0.5
(e)
0.8
-1
-1
(b)
0.8 0.6 0.40.8 0.8 0.20.6 0.6 0.400.4 0.20.2 -0.2 0 0 -0.4 -1 -0.5 0 -0.2 0.5 1 -0.6 -0.2 -0.8 -0.4 Va3 -0.4 0 0 0.50.5 11 -0.5 0 0.5 -0.6 -0.6-1 Va3 Va3 Va3 -0.8 -0.8 (d) -1 -1 -0.5 0 0 0.50.5 -0.5 (c) 0 0.5 1 -0.5 (d) Va3 (c)Va3 (a) (d) Va3
Vb3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
Vb3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
0.80.8 0.60.6 0.4 0.40.8 0.2 0.20.6 00.40 -0.2-0.2 0.2 -0.4-0.4 0 -0.6 0.5 1 -0.6 -0.2 -0.8 -0.8 -0.4 -1 -0.5 -0.5 -0.6-1
0.5
Vb3
Vb3 Vb3
-1
(d
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Vb3 Vb3 Vb3
Vb3
Vb3
-0.6 -0.8
(a)
0.8 Simple Chaotic Circuit Using CMOS Ring Oscillators 0.6 0.8 0.80.4 0.6 0.60.2 0 0.40.4 -0.2 0.2 0.2 -0.4 0 0 -0.6 -0.2 -0.2 -0.8 -0.4 -0.4 -1 -0.5 0 0.5 1 -0.6 -0.6 Va3 -0.8 -0.8 -1 -1 -0.5 -0.5 0 0 0.50.5 1 1 (e)Va3Va3
-0.8 -0.4 -0.6-1 -0.8
-0.5
(c) 0.8 0.6 chaotic circuit is derived as two three-dimensional connected parallel with all parasitic capacitors as0.4 Figure 4: SPICE the chaotic in node Fig. of3.theChannel autonomous oscillatory circuits simulation coupled by a result pair of of sociated with circuit the output previous stage 0.2 diodes. inverter. The input resistor is connected parallel width of0 p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is Figure20[µm] 5 shows how to derive a simplified model with the output resistor of the previous stage in-0.2and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and of the inverter in the ring oscillators. Exploiting the the simplified C1 = -0.4 9.00[nF ]. (a) R2 = 50.0[Ω]. (b) verter. R2 = Therefore, 100.0[Ω]. we (c)can R2 obtain = 125.0[Ω]. (d) infact that all inverters operate only in their linear verter model as shown at the bottom in Fig. 5. -0.6 R2 = 150.0[Ω]. (e) R2 = 200.0[Ω]. -1regions, -0.5 they0 can -0.8 0.5 assumed 1 be to be linear elements Since the pair of transistors M 1 and M 2 in -1 -0.5 0 sources. 0.5 1 including voltage controlled current Now, Fig. 3 has the same characteristics as a pair of Va3 Va3 we focus our attention on one inverter. All paradiodes shown in Fig. 6(b), we approximate their
Vb3
Vb3
Vb3
Vb3
0.8 0.6 0.4 0.8 0.2 0.6 0.40 -0.2 0.2 -0.4 0 -0.6 -0.2 -0.8 -0.4
sitic capacitors associated with the input node are (c)
22 v–i characteristics by the following three-region
(c)
ure 4: SPICE simulation result of the chaotic circuit in Fig. 3. Channel Figure 4: SPICE simulation result of the chaotic circuit in Fig. 3. Channel th of p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is width of p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is µm] and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and 20[µm] and length is 4 [µm]. V = 2.70[V], V = 2.30[V], R = 3000[Ω] and
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Y. Hosokawa & Y. Nishio
Circuit schematic previous stage
next stage
inverter
all parasitic capacitor associated with the input nodes
all parasitic capacitor associated with the output nodes gain of inverter output resistance
input resistance
Co
previous stage
Ro
Ci
Ri
inverter
next stage
Circuit model
R=Ro*Ri/(Ro+Ri) C
C=Co+Ci
R
Simplified inverter model Fig. 5.
Deriving simplified inverter model.
d
dd
d
dd
d
(a) (a)
(a) d (a) dd
dd d
-Vth
-Vth 0 -Vth 00
Vth
Vth Vth
d d
dd
dd
(b)
(c) (c)
(c) (c)
(b)
(b) Fig.(b) 6.
Pair of transistors and its v–i characteristics.
Figure 6: Pair of transistors and its v-i characteristics.
dd d dd
Simple Chaotic Circuit Using CMOS Ring Oscillators
a1
Gm
a3
C
R
d
a2
Gm
a1
C
R
Gm
a2
C
C1
R
Gm
b3
C
R
Fig. 7.
b2
Gm
b1
C
R
a3
R1 D1
b1
2517
D2 b3
Gm
b2
C
R
R2
Simplified model of the chaotic circuit in Fig. 3.
piecewise-linear function as shown in Fig. 6(c). parameters; 1 vstr Rd 1 x = , y = i , τ = t, (v − V ) for v > V , str d d d th d th Vth Vth RC rd R id = 0 (1) of the chaotic circuit in Fig. 3.C for |v ≤ Vth , model Figure 7:d |Simplified (4) α = Gm R , β = , γ= , C + C1 R1 1 (vd + Vth ) for vd < −Vth . R R rd , ε= , δ= Rd R2 By using the inverter model in Fig. 5 and the pair of Eqs. (2) and (3) are normalized as diodes in Fig. 6, the simplified model can be shown as Fig. 7. The circuit equations of the simplified x˙ a1 = −xa1 − αxa3 , model are described as follows: x˙ a2 = −xa2 − αxa1 , 0 + dv 1 G x˙ a3 = −β(γ + 1)x a1 m a3 − αβxa2 − βδyd , = − v − v , a1 a3 (5) dt RC C x˙ b1 = −xb1 − αxb3 , 1 Gm dva2 6 =− va2 − va1 , x˙ b2 = −xb2 − αxb1 , dt RC C x˙ b3 = −(ε + 1)xb3 − αxb2 + δyd , dva3 R + R1 = − v a3 5 where 2 1 dt RR1 (C + C1 ) 4 x − xb3 − 1 for xa3 − xb3 > 1 , id Gm a3 (2) va3 − , − C + C1 C + C1 0 for |xa3 − xb3 | ≤ 1 , (6) 3 yd = dv 1 G m b1 xa3 − xb3 + 1 for xa3 − xb3 < −1 . =− vb1 − vb3 , dt RC C dvb2 1 Gm =− vb2 − vb1 , 4. map. Analysis of Simplified Model Figure 8: Route RC C dt R + R2 Gm id dv Because the simplified model derived in the previ b3 = − vb3 − vb3 + , ous section is piecewise-linear, we can describe the dt RR2 C C C exact expressions of the solutions, the Poincar´e map where and its Jacobian matrix. 25 1 (va3 − vb3 − Vth ) for va3 − vb3 > Vth , rd 4.1. Characteristic equations We define three piecewise-linear regions as follows. id = 0 for |va3 − vb3 | ≤ Vth , R+ ≡{(xa1 , xa2 , xa3 , xb1 , xb2 , xb3 )|xa3 − xb3 > 1} , 1 (va3 − vb3 + Vth ) for va3 − vb3 < −Vth . R0 ≡{(xa1 , xa2 , xa3 , xb1 , xb2 , xb3 )||xa3 − xb3 | ≤ 1} , rd (3) R ≡{(x , x , x , x , x , x )|x − x < −1} .
R-
R
R
S
T
T
T T
T
T
−
By substituting the normalized variables and the
a1
a2
a3
b1
b2
b3
a3
b3
(7)
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Y. Hosokawa & Y. Nishio Table 1. regions.
4.2. Exact solutions
Three piecewise-linear
We consider the case that the characteristic equation (8) has two real and two pairs of complex conjugate eigenvalues and that (9) and (10) have a real and a pair of complex conjugate eigenvalues, because chaotic attractors can be observed only for such parameter values. We denote the eigenvalues in each region as follows:
State of Diodes Region
D1
D2
R+
ON
OFF
R0
OFF
OFF
R−
OFF
ON
R± : λ01 , λ02 , σ01 ± jω01 , σ02 ± jω02 , These regions correspond to the three different states of the diodes as Table 1. Note that the circuit equations in R0 are completely decoupled into two three-dimensional equations, because y d = 0. Let us consider eigenvalues in the three regions of the circuit equations in order to derive exact solutions. The characteristic equation of the circuit equations in each linear region is given as follows:
R0 (upper side circuit): λ11 , σ11 ± jω11 , R0 (lower side circuit): λ12 , σ12 ± jω12 . Further, we define the equilibrium points in R ± as ±Ee = [±Ea1
± Ea2
± Ea3
± Eb1
± Eb2
± Eb3 ]T . (11)
+ β{5 + ε + δ(6 + ε) + γ(5 + δ + ε)}]m4
These values are calculated by making the righthand side of Eq. (5) to be equal to zero. The equilibrium point in R0 is the origin. Then, we can describe the exact solutions in each linear region as follows.
+ [α3 (1 + β) + 2[5 + 3δ + 3ε + β{5 + 7δ + 2ε
In R± :
In R± : m6 + {5 + δ + β(1 + γ + δ) + ε}m5 + [10 + 4δ + 4ε
x(τ ) ∓ Ee = F(τ ) · F−1 (0) · (x(0) ∓ Ee ) ,
+ 2δε + γ(5 + 2δ + 2ε)}]]m3 + [5 + 4δ + 4ε + α3 {2 + β(4 + γ + 2δ + ε)}
where
+ 2β{5 + 8δ + 3ε + 3δε + γ(5 + 3δ + 3ε)}]m2
x(τ ) = [xa1 (τ ) xb2 (τ )
+ [1 + δ + ε + α3 {1 + β(5 + 2γ + 4δ + 2ε)}
F(τ ) = [fa1 (τ )
+ β{5 + 9δ + 4ε + 4δε + γ(5 + 4δ + 4ε)}]m
fb2 (τ )
+ β{1 + α6 + 2δ + ε + δε + γ(1 + δ + ε) + α3 (2 + γ + 2δ + ε)} = 0 .
(8)
In R0 : For upper side circuit, m3 + {2 + β(γ + 1)}m2 + {1 + 2β(γ + 1)}m +β(α3 + γ + 1) = 0 .
(9)
For lower side circuit, m3 + (ε + 3)m2 + (2ε + 3)m + α3 + ε + 1 = 0 . (10) We can calculate the eigenvalues in each region from the characteristic equations (8)–(10).
fa2 (τ ) = [eλ01 τ
xa2 (τ )
xa3 (τ )
xb1 (τ )
T
xb3 (τ )] , fa2 (τ )
fa3 (τ )
fb1 (τ )
fb3 (τ )]T , eλ02 τ
eσ01 τ sin ω01 τ
eσ01 τ cos ω01 τ eσ02 τ cos ω02 τ
eσ02 τ sin ω02 τ ]T , 1 dfa2 (τ ) + fa2 (τ ) , fa1 (τ ) = − α dτ 1 dfa1 (τ ) + fa1 (τ ) , fa3 (τ ) = − α dτ fb3 (τ ) =
1 dfa3 (τ ) γ + δ + 1 α + fa3 (τ ) + fa2 (τ ) , βδ dτ δ δ
δ dfb3 (τ ) δ + ε + 1 − fb3 (τ ) + fa3 (τ ) , dτ α α 1 dfb2 (τ ) + fb2 (τ ) . (12) fb1 (τ ) = − α dτ fb2 (τ ) = −
Simple Chaotic Circuit Using CMOS Ring Oscillators
In R0 :
R-
xa (τ ) = Ga (τ ) · G−1 a (0) · xa (0) ,
R0
T4
where
T5 T2
T1
T
xa (τ ) = [xa1 (τ )
xa2 (τ )
xa3 (τ )] ,
xb (τ ) = [xb1 (τ )
xb2 (τ )
xb3 (τ )]T ,
Ga (τ ) = [ga1 (τ )
ga2 (τ )
ga3 (τ )]T ,
Gb (τ ) = [gb1 (τ )
gb2 (τ )
gb3 (τ )]T ,
eσ11 τ cos ω11 τ
T3 Fig. 8. Route map. Figure 8: Route map.
eσ11 τ sin ω11 τ ]T ,
gb2 (τ ) = [eλ12 τ eσ12 τ cos ω12 τ eσ12 τ sin ω12 τ ]T , 1 dga2 (τ ) + ga2 (τ ) , ga1 (τ ) = − α dτ 1 dga1 (τ ) ga3 (τ ) = − + ga1 (τ ) , α dτ 1 dgb2 (τ ) gb1 (τ ) = − + gb2 (τ ) , α dτ 1 dgb1 (τ ) + gb1 (τ ) . (13) gb3 (τ ) = − α dτ
In order to confirm the generation of chaos and to investigate the related bifurcation scenario, we derive the Poincar´e map. Let us define the following subspace S = S 1 ∩ S2
(14)
where S1 : xa3 − xb3 = 1 S2 : αβxa2 + β(γ + 1)xa3 − αxb2 − (ε + 1)xb3 < 0 .
(15)
T = T 2 ◦ T1 .
(17)
Each submap can be given as follows. Suppose that the solution starts from at τ = 0 and that it hits S1 and enters R0 at x1 = (Xa11 , Xa21 , Xa31 , Xb11 , Xb21 , Xa31 − 1) at τ = τ1 . In this Xa11 − Ea1 X −E a21 a2 Xa31 − Ea3 Xb11 − Eb1 Xb21 − Eb2
case, x1 is given by
Xa31 − 1 − Eb3
The subspace S1 corresponds to the boundary condition between R+ and R0 , while the subspace S2 corresponds to the condition x˙ a3 − x˙ b3 > 0. Namely, S corresponds to the transitional condition from R 0 to R+ . Let us consider the solution starting from an initial point on S. The solution returns back to S again after wandering several subspaces as shown in Fig. 8. Hence, we can derive the Poincar´e map as follows: x0 7→ T(x0 ) ,
where x0 is an initial point on S, while T(x0 ) is the point at which the solution starting from x 0 hits S again. The Poincar´ e map can be represented 25 as a composite map of the submaps T1 , T2 · · · T6 in Fig. 8, which correspond to the route of the solution. As an example, let us derive the Poincar´e map for the case that the solution starting from S returns back to S again via the regions R + and R0 . In this case, the Poincar´e map can be obtained as
x0 = (Xa10 , Xa20 , Xa30 , Xb10 , Xb20 , Xa30 − 1)
4.3. Poincar´ e map
T : S → S,
R+
T6
xb (τ ) = Gb (τ ) · G−1 b (0) · xb (0) ,
ga2 (τ ) = [eλ11 τ
S
2519
(16)
Xa10 − Ea1
X −E a20 a2 Xa30 − Ea3 = F(τ1 ) · F−1 (0) · Xb10 − Eb1 Xb20 − Eb2
Xa30 − 1 − Eb3
(18)
where τ1 is obtained by solving the third and sixth rows of Eq. (18). We can calculate the submap
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Y. Hosokawa & Y. Nishio
T1 as x1 = T1 (x0 )
where τ2 is obtained by solving the third and sixth rows of Eq. (20). We can calculate the submap T2 as
(19)
Further, suppose that the solution hits S again at
x2 = T2 (x1 )
x2 = (Xa12 , Xa22 , Xa32 , Xb12 , Xb22 , Xa32 − 1)
In the same way, we can derive the other composite maps.
at τ = τ1 + τ2 . In this case, x2 is given by Xa12 Xa11 Xa22 = Ga (τ2 ) · G−1 a (0) · Xa21 Xa32 Xa31
(21)
4.4. Lyapunov exponents The Jacobian matrix DT of the Poincar´e map can be also derived as a product of the Jacobian matrices of the submaps corresponding to the route of the solution. As an example, we show the Jacobian matrix of the above Poincar´e map T = T 2 ◦ T1 .
Xb12 Xb11 −1 Xb22 = Gb (τ2 ) · Gb (0) · Xb21 Xa32 − 1 Xa31 − 1
(20)
DT = DT2 · DT1 .
1
0 DT1 = 0 0 0
0
Xa11 + αXa31 A1
0
0
Xa11 + αXa31 A1
−
1
αXa11 + Xa21 A1
0
0
αXa11 + Xa21 − A1
0
(ε + 1)Xa31 + αXb21 − ε − 1 A1
0
0
αβXa21 + β(γ + 1)Xa31 A1
0
αXa31 + Xb11 − α A1
0
0
1
αXb11 + Xb21 A1
0
0
−
αXa31 + Xb11 + α A1 −
αXb11 + Xb21 A1
(22)
1 0 0 · F(τ1 ) · F−1 (0) · 0 0 0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0 0 0 1
0
(23) where A1 = −αβXa21 + {−β(γ + 1) + ε + 1}Xa31 + αXb21 − ε − 1 .
1
0 DT2 = 0 0 0
Xa12 + αXa32 A2
0
1
αXa12 + Xa22 A2
0
0
0
(ε + 1)Xa32 + αXb22 − ε − 1 A2
0
0
0
αXa32 + Xb12 − α A2
0
0
1
αXb12 + Xb22 A2
0
0
0
0
−
−
Xa12 + αXa32 A2 αXa12 + Xa22 A2
αβXa22 + β(γ + 1)Xa32 A2 −
αXa32 + Xb12 − α A2 −
αXb12 + Xb22 A2
(24)
1 0 0 · G(τ2 ) · G−1 (0) · 0 0 0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0 0 0 1
0
(25)
Simple Chaotic Circuit Using CMOS Ring Oscillators
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(a) (a) (a) (a)
(b) (b) (b) (b)
(c) (c) (c) (c) Figure 9: Projection of attractors onto xa3 − xb3 plane (left side) and their Poincar´ e maps (right side). α = 4.0, β = 0.1, γ= and δ(left = 50. (a)and ε = their 10.0. Figure 9: Projection of attractors onto xa3 − xb35.0plane side) (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. Poincar´e9:maps (right side). α = 4.0, onto β = 0.1, and δ = 50. (a) ε = 10.0. Figure Projection of attractors x γ−=x5.0 b3 plane (left side) and their (h) ε= = 3.30. 2.40. (c) ε = 3.05. (d) ε = 2.90. (e) a3 (b) ε ε = 2.75. (f) ε= 2.66. Poincar´e maps (right side). α = 4.0, β = 0.1, γ = 5.0 and δ= 50. (g) (a)ε ε==2.57. 10.0. (h) ε = 2.40. (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. (h) ε = 2.40. 26 26 26
(d) (d) Fig. 9. Projection of attractors onto xa3 –xb3 plane (left) and their Poincar´e maps (right). α = 4.0, β = 0.1, γ = 5.0 and δ = 50. (a) ε = 10.0. (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. (h) ε = 2.40.
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Y. Hosokawa & Y. Nishio
(d) (d)
(e) (e) (e)
(f) (f) (f) Figure 9: (continued). Figure 9: (continued).
27 27
(g) (g) (g)
(h) (h) (h) Figure Fig. 9: 9 (continued). (Continued ) Figure 9: (continued).
Simple Chaotic Circuit Using CMOS Ring Oscillators
2523
xa1
ε (a)
µ
ε (b) Fig. 10.
(a) One-parameter bifurcation diagram. (b) Largest Lyapunov exponent. α = 4.0, β = 0.1, γ = 5.0 and δ = 50.
where
5. Computer Calculated Results G(τ ) = [Ga (τ )T
Gb (τ )T ]T ,
(26)
A2 = −αβXa22 + {−β(γ + 1) + ε + 1}Xa32 + αXb22 − ε − 1 .
(27)
By using the Jacobian Matrix, we can calculate the largest Lyapunov exponent; N 1 X log |DT(j) · e(j)| N →∞ N
µ = lim
j=1
where e(j) is a normalized basis.
(28)
Figure 9 (left) shows the projections of attractors onto xa3 –xb3 plane obtained by calculating Eqs. (12) and (13). We can say that these results are similar to the SPICE simulation results in Fig. 4. Namely, the simplified model in Sec. 3 does not lose important features of the original circuit related with the generation of chaotic behavior. This means that the ring oscillators in the original circuit behave as simple divergently oscillating parts, and only the nonlinearity of the pair of diodes controls the amplitude. In other words, the ring oscillators play a role of expanding, while the coupling diodes play a role of folding. These two features, expanding and folding, are known as the essence of generating chaos.
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Y. Hosokawa & Y. Nishio
The Poincar´e maps are shown in Fig. 9 (right). One-periodic orbit (a) bifurcates to torus (b) around ε = 3.50. Periodic window (c) can be observed in the torus region. As ε decreases, torus grows (d) and starts to break down (e) and (f). From the shape of the Poincar´e maps, we can estimate that attractors in (g) and (h) are chaos. One-parameter bifurcation diagram and the calculated largest Lyapunov exponent are shown in Figs. 10(a) and 10(b), respectively. The control parameter is ε and the other parameters are fixed. As shown in Fig. 10, the Lyapunov exponent takes positive values for a relatively wide range of ε. Hence, the proposed circuit can be said to generate chaos. Moreover, we can describe the detailed bifurcation scenario as follows. For 3.15 < ε < 3.50, torus appears. We observed a large number of phase-locked states in this torus region. However, we cannot see the states in the diagram, because the parameter interval corresponding to each phase-locked state is not so large. For 2.95 < ε < 3.15, a large window corresponding to the periodic orbit in Fig. 9(c) is observed. For 2.57 < ε < 2.95, the largest Lyapunov exponent becomes positive occasionally though the attractor looks like torus. We consider that chaos via folded-torus appears in this interval [Inaba & Mori, 1992]. For 2.57 > ε, chaotic attractors can be observed for almost parameter values. We have also confirmed that a lot of small periodic windows are embedded in the chaotic region.
6. Conclusions In this study, we have proposed a very simple chaotic circuit using CMOS ring oscillators. By using a simplified model, the exact solutions of the circuit were derived. We calculated the Lyapunov exponents and confirmed the generation of chaos.
Further, we investigated the related bifurcation phenomena. The simplified model revealed the physical mechanism of the generation of chaos. Namely, the ring oscillators play a role of expanding and the coupling diodes play a role of folding, which are known as the essence of generating chaos. Because we chose the circuit parameters and other SPICE parameters as taking into account an implementation with 0.5 µm CMOS integrated circuit technology, we believe that the proposed circuit can be realized on IC chip easily.
References Cruz, J. M. & Chua, L. O. [1992] “A CMOS IC nonlinear resistor for Chua’s circuit,” IEEE Trans. Circuits Syst.-I 39, 985–995. Delgado-Restituto, M. & Rodr´ıguez, A. [1998] “Design considerations for integrated continuous-time chaotic oscillators,” IEEE Trans. Circuits Syst.-I 45, 481-495. Eguchi, K., Inoue, T. & Tsuneda, A. [1998] “FPGA implementation of a digital chaos circuit realizing a 3-dimensional chaos model,” IEICE Trans. Funds. E81-A, 1176–1178. Hosokawa, Y. & Nishio, Y. [2002] “A design method for chaotic circuits using two oscillators,” in Chaos in Circuits and Systems, eds. Chen, G. & Ueta, T. (World Scientific, Singapore), Chap. 3, pp. 51–69. Inaba, N. & Mori, S. [1992] “Folded torus in the forced Rayleigh oscillator with a diode pair,” IEEE Trans. Circuits Syst.-I 39, 402–411. Kanou, N., Horio, Y., Aihara, K. & Nakamura, S. [1993] “A current-mode circuit of a chaotic neuron model,” IEICE Trans. Fund. E76-A, 642–644. Lozi, R. & Chua, L. O. [1993] “Secure communications via chaotic synchronization II: Noise reduction by cascading two identical receivers,” Int. J. Bifurcation and Chaos 3, 1319–1325.
SIMPLE CHAOTIC CIRCUIT USING CMOS RING OSCILLATORS YASUTERU HOSOKAWA Department of Information Science, Shikoku University, Tokushima 771-1192, Japan [email protected] YOSHIFUMI NISHIO Department of Electrical and Electronic Engineering, Tokushima University, Tokushima 770-8506, Japan [email protected] Received January 14, 2003; Revised August 18, 2003 In this study, a chaotic circuit suitable for an integrated circuit is proposed. The circuit consists of two CMOS ring oscillators and a pair of diodes. By using a simplified model of the circuit, the mechanism of generating chaos is explained and the exact solutions are derived. The exact expressions of the Poincar´e map and its Jacobian matrix make those possible to confirm the generation of chaos using the Lyapunov exponents and to investigate the related bifurcation phenomena. Keywords: Chaotic circuit; CMOS; ring oscillator; Lyapunov exponents.
1. Introduction There are several possibilities of engineering applications with chaos, and they have been investigated by many researchers passionately in the past 10 years. For realizing such applications, an integration of chaotic circuits is a very important subject. The advantages of an integrated circuit are power saving and miniaturization of circuits. Further, in the case of chaos synchronization being utilized in the application, less parameter errors of circuit elements are needed. By fabricating several identical chaotic circuits on the same silicon chip, the resulting circuits are almost the same [Lozi & Chua, 1993]. This becomes more important if a large number of chaotic cells are needed to exploit several features of chaotic networks. On the other hand, various chaotic circuits have been realized as integrated circuits [Cruz & Chua, 1992; Kanou et al., 1993; Restituro & Rodr´ıguez,
1998; Eguchi et al., 1998]. However, because the purpose of these studies was to realize Chua’s circuit on the IC, the realized circuits have relatively complex structures, which need high integration techniques. The goal of our study is to integrate a chaotic circuit having a simple structure and a small size. One of the attractions of chaos has been that simple systems generate complex phenomena. We go back again to this attraction, namely we try to propose a simple integrated circuit generating chaos. In this study, we propose a simple chaotic circuit suitable for integration. At first, we take note of a CMOS ring oscillator, which is one of the simplest functional circuits constructed on the chip. The oscillator consists of the odd number of CMOS inverters and is used for a CMOS process performance test. Our chaotic circuit is based on two CMOS ring oscillators and a pair of diodes. Therefore, we consider that the proposed circuit is 2513
Y. Hosokawa & Y. Nishio
realized on the chip very easily. By SPICE simulations of the circuit, we can observe that the periodic orbit bifurcates to chaos via torus. In order to analyze these phenomena in detail, we derive a simplified model of the circuit. The simplified model consists of some linear functions and one piecewise-linear function. The model reveals the physical mechanism of the generation of chaos. Further, the exact solutions can be derived from the model. The exact expressions of the Poincar´e map and its Jacobian matrix make those possible to confirm the generation of chaos using the Lyapunov exponents and to investigate the related bifurcation phenomena.
2. Design of Chaotic Circuit
[V] 5
4 VOLTAGE
2514
3
2
1
0 1e-07
1.1e-07
1.2e-07
1.3e-07
1.4e-07
TIME
Fig. 2.
1.5e-07 [sec.]
SPICE simulation result of the ring oscillator in
Figure simulation result of theisring oscillator in Fig. is1. 4 Channel Fig.2:1.SPICE Channel width of p-MOS 60 µm and length µm width p-MOS is width 60[µm] of andn-MOS length isis4 [µm] andand channel widthisof4 n-MOS andof channel 20 µm length µm. is 20[µm] and length is 4 [µm]. Vdd = 2.70[V] and Vss = 2.30[V]. Maximum time Vdd = 2.70 V and Vss = 2.30 V. Maximum time step is 50 ps step is 50 [ps] and analysis time is 10-100 [µs].
and analysis time is 10–100 µs.
Figure 1 shows a three-stage ring oscillator. This oscillator consists of three CMOS inverters. In the case of the CMOS performance test, many odd number of inverters are coupled and the performance is given as an oscillation frequency. Figure 2 shows SPICE simulation results of the ring oscillator in Fig. 1. Channel width of p-MOS is 60 µm and length is 4 µm and channel width of n-MOS is 20 µm and length is 4 µm, Vdd = 2.70 V and Vss = 2.30 V. These parameters and other SPICE parameters are chosen by taking into account an implementation with 0.5 µm CMOS integrated circuit technology. We design a chaotic circuit using the ring oscillators as shown in Fig. 3. In order to control amplitudes of oscillators, R1 and R2 are connected. The frequency of the upper side oscillator is controlled by C1 . Figure 4 shows SPICE simulation results of the chaotic circuit in Fig. 3. Channel width of p-MOS is 60 µm and length is 4 µm and channel width of n-MOS is 20 µm and length is 4 µm. Vdd = 2.70 V, Vss = 2.30 V, R1 = 3000 Ω and
output Vdd
a1
a2
R1
a3
C1 Vdd M1
M2 Vss
a1
a2
a3
R2
Fig. 3.
Chaotic circuit.
Figure 3: Chaotic circuit.
C1 = 9.00 pF. We can observe that a periodic or20 bit (a) bifurcates to torus (b) and (c) and chaos (d) and (e). The main oscillation frequency bandwidth is about 100–250 MHz. Additionally, we have confirmed numerically that all inverters utilize their linear regions only. Remark. In our early study, we have proposed a design methodology of chaotic circuits [Hosokawa & Nishio, 2002], namely connecting two oscillatory elements by a nonlinear resistor. The present circuit is designed according to this methodology. We consider that the result of this study supports the effectiveness of the methodology.
Vss
3. Simplified Model of Chaotic Circuit 21
1: Three-stage ring ring oscillator. Fig. Figure 1. Three-stage oscillator.
In order to analyze the phenomena observed from the SPICE simulations, a simplified model of the
Vb3
-1
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
-0.5
0 Va3 -0.5 0 Va3 (b) (a)
-1
-0.5
0 Va3
Vb3
Vb3 Vb3
(a)
-0.8
(a)
-1
1
0.5
1
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
(b) (d)
1 1 1
(c)(e) (b) 0.6 0.8 Figure0.84: SPICE simulation result of the chaotic circuit in Fig. 3. Channel 0.4 0.6 0.6 width of p-MOS is 60[µm]0.2 and length is 4 [µm] and channel width of n-MOS is 0.40.8 Figure 4:0.4 SPICE simulation result of the chaotic circuit i 0 Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and 20[µm]0.20.6 and length is 4 [µm]. width of0.2 p-MOS is 60[µm] and length is 4 [µm] and channel C1 = 9.00[nF ]. (a) R2 =-0.2 50.0[Ω]. (b) R2 = 100.0[Ω]. (c) R2 = 125.0[Ω]. (d) 00.4 0 20[µm] -0.2 and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V] -0.4 -0.2 0.2 (e) R2 = 200.0[Ω]. R2 = 150.0[Ω]. -0.6 C1 = 9.00[nF ]. (a) R2 = 50.0[Ω]. (b) R2 = 100.0[Ω]. (c) -0.4 0 -0.4 -0.8 R = 150.0[Ω]. (e) R2 = 200.0[Ω]. -0.6 -0.6 -0.2 0 0.5 1 -1 -0.5 2 0 0.5 1 Vb3
Vb3
Vb3
-0.5
-0.8 0 0.5 1 -1 -0.5 0 0.5 1 22Va3 Va3 Va3 (e) 22 0 0.5 1 (b) simulation -1result -0.5 (e)3. Channel width of p-MOS is 60 µm and length Fig. 4. SPICE of the chaotic circuit in Fig. is 4 µm Va3length is 4 µm. V = 2.70 V, Vss = 2.30(e) and channel width of n-MOS is 20 (b) µm and V, R1 = 3000 Ω and C1 = 9.00 nF. dd (a) R2 = 50.0 Ω. (b) R2 = 100.0 Ω. (c) R2 = 125.0 Ω. (d) R2 = 150.0 Ω. (e) R2 = 200.0 Ω.
Va3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
-0.5
(e)
0.8
-1
-1
(b)
0.8 0.6 0.40.8 0.8 0.20.6 0.6 0.400.4 0.20.2 -0.2 0 0 -0.4 -1 -0.5 0 -0.2 0.5 1 -0.6 -0.2 -0.8 -0.4 Va3 -0.4 0 0 0.50.5 11 -0.5 0 0.5 -0.6 -0.6-1 Va3 Va3 Va3 -0.8 -0.8 (d) -1 -1 -0.5 0 0 0.50.5 -0.5 (c) 0 0.5 1 -0.5 (d) Va3 (c)Va3 (a) (d) Va3
Vb3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
Vb3
0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8
0.80.8 0.60.6 0.4 0.40.8 0.2 0.20.6 00.40 -0.2-0.2 0.2 -0.4-0.4 0 -0.6 0.5 1 -0.6 -0.2 -0.8 -0.8 -0.4 -1 -0.5 -0.5 -0.6-1
0.5
Vb3
Vb3 Vb3
-1
(d
2515
Vb3 Vb3 Vb3
Vb3
Vb3
-0.6 -0.8
(a)
0.8 Simple Chaotic Circuit Using CMOS Ring Oscillators 0.6 0.8 0.80.4 0.6 0.60.2 0 0.40.4 -0.2 0.2 0.2 -0.4 0 0 -0.6 -0.2 -0.2 -0.8 -0.4 -0.4 -1 -0.5 0 0.5 1 -0.6 -0.6 Va3 -0.8 -0.8 -1 -1 -0.5 -0.5 0 0 0.50.5 1 1 (e)Va3Va3
-0.8 -0.4 -0.6-1 -0.8
-0.5
(c) 0.8 0.6 chaotic circuit is derived as two three-dimensional connected parallel with all parasitic capacitors as0.4 Figure 4: SPICE the chaotic in node Fig. of3.theChannel autonomous oscillatory circuits simulation coupled by a result pair of of sociated with circuit the output previous stage 0.2 diodes. inverter. The input resistor is connected parallel width of0 p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is Figure20[µm] 5 shows how to derive a simplified model with the output resistor of the previous stage in-0.2and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and of the inverter in the ring oscillators. Exploiting the the simplified C1 = -0.4 9.00[nF ]. (a) R2 = 50.0[Ω]. (b) verter. R2 = Therefore, 100.0[Ω]. we (c)can R2 obtain = 125.0[Ω]. (d) infact that all inverters operate only in their linear verter model as shown at the bottom in Fig. 5. -0.6 R2 = 150.0[Ω]. (e) R2 = 200.0[Ω]. -1regions, -0.5 they0 can -0.8 0.5 assumed 1 be to be linear elements Since the pair of transistors M 1 and M 2 in -1 -0.5 0 sources. 0.5 1 including voltage controlled current Now, Fig. 3 has the same characteristics as a pair of Va3 Va3 we focus our attention on one inverter. All paradiodes shown in Fig. 6(b), we approximate their
Vb3
Vb3
Vb3
Vb3
0.8 0.6 0.4 0.8 0.2 0.6 0.40 -0.2 0.2 -0.4 0 -0.6 -0.2 -0.8 -0.4
sitic capacitors associated with the input node are (c)
22 v–i characteristics by the following three-region
(c)
ure 4: SPICE simulation result of the chaotic circuit in Fig. 3. Channel Figure 4: SPICE simulation result of the chaotic circuit in Fig. 3. Channel th of p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is width of p-MOS is 60[µm] and length is 4 [µm] and channel width of n-MOS is µm] and length is 4 [µm]. Vdd = 2.70[V], Vss = 2.30[V], R1 = 3000[Ω] and 20[µm] and length is 4 [µm]. V = 2.70[V], V = 2.30[V], R = 3000[Ω] and
2516
Y. Hosokawa & Y. Nishio
Circuit schematic previous stage
next stage
inverter
all parasitic capacitor associated with the input nodes
all parasitic capacitor associated with the output nodes gain of inverter output resistance
input resistance
Co
previous stage
Ro
Ci
Ri
inverter
next stage
Circuit model
R=Ro*Ri/(Ro+Ri) C
C=Co+Ci
R
Simplified inverter model Fig. 5.
Deriving simplified inverter model.
d
dd
d
dd
d
(a) (a)
(a) d (a) dd
dd d
-Vth
-Vth 0 -Vth 00
Vth
Vth Vth
d d
dd
dd
(b)
(c) (c)
(c) (c)
(b)
(b) Fig.(b) 6.
Pair of transistors and its v–i characteristics.
Figure 6: Pair of transistors and its v-i characteristics.
dd d dd
Simple Chaotic Circuit Using CMOS Ring Oscillators
a1
Gm
a3
C
R
d
a2
Gm
a1
C
R
Gm
a2
C
C1
R
Gm
b3
C
R
Fig. 7.
b2
Gm
b1
C
R
a3
R1 D1
b1
2517
D2 b3
Gm
b2
C
R
R2
Simplified model of the chaotic circuit in Fig. 3.
piecewise-linear function as shown in Fig. 6(c). parameters; 1 vstr Rd 1 x = , y = i , τ = t, (v − V ) for v > V , str d d d th d th Vth Vth RC rd R id = 0 (1) of the chaotic circuit in Fig. 3.C for |v ≤ Vth , model Figure 7:d |Simplified (4) α = Gm R , β = , γ= , C + C1 R1 1 (vd + Vth ) for vd < −Vth . R R rd , ε= , δ= Rd R2 By using the inverter model in Fig. 5 and the pair of Eqs. (2) and (3) are normalized as diodes in Fig. 6, the simplified model can be shown as Fig. 7. The circuit equations of the simplified x˙ a1 = −xa1 − αxa3 , model are described as follows: x˙ a2 = −xa2 − αxa1 , 0 + dv 1 G x˙ a3 = −β(γ + 1)x a1 m a3 − αβxa2 − βδyd , = − v − v , a1 a3 (5) dt RC C x˙ b1 = −xb1 − αxb3 , 1 Gm dva2 6 =− va2 − va1 , x˙ b2 = −xb2 − αxb1 , dt RC C x˙ b3 = −(ε + 1)xb3 − αxb2 + δyd , dva3 R + R1 = − v a3 5 where 2 1 dt RR1 (C + C1 ) 4 x − xb3 − 1 for xa3 − xb3 > 1 , id Gm a3 (2) va3 − , − C + C1 C + C1 0 for |xa3 − xb3 | ≤ 1 , (6) 3 yd = dv 1 G m b1 xa3 − xb3 + 1 for xa3 − xb3 < −1 . =− vb1 − vb3 , dt RC C dvb2 1 Gm =− vb2 − vb1 , 4. map. Analysis of Simplified Model Figure 8: Route RC C dt R + R2 Gm id dv Because the simplified model derived in the previ b3 = − vb3 − vb3 + , ous section is piecewise-linear, we can describe the dt RR2 C C C exact expressions of the solutions, the Poincar´e map where and its Jacobian matrix. 25 1 (va3 − vb3 − Vth ) for va3 − vb3 > Vth , rd 4.1. Characteristic equations We define three piecewise-linear regions as follows. id = 0 for |va3 − vb3 | ≤ Vth , R+ ≡{(xa1 , xa2 , xa3 , xb1 , xb2 , xb3 )|xa3 − xb3 > 1} , 1 (va3 − vb3 + Vth ) for va3 − vb3 < −Vth . R0 ≡{(xa1 , xa2 , xa3 , xb1 , xb2 , xb3 )||xa3 − xb3 | ≤ 1} , rd (3) R ≡{(x , x , x , x , x , x )|x − x < −1} .
R-
R
R
S
T
T
T T
T
T
−
By substituting the normalized variables and the
a1
a2
a3
b1
b2
b3
a3
b3
(7)
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Y. Hosokawa & Y. Nishio Table 1. regions.
4.2. Exact solutions
Three piecewise-linear
We consider the case that the characteristic equation (8) has two real and two pairs of complex conjugate eigenvalues and that (9) and (10) have a real and a pair of complex conjugate eigenvalues, because chaotic attractors can be observed only for such parameter values. We denote the eigenvalues in each region as follows:
State of Diodes Region
D1
D2
R+
ON
OFF
R0
OFF
OFF
R−
OFF
ON
R± : λ01 , λ02 , σ01 ± jω01 , σ02 ± jω02 , These regions correspond to the three different states of the diodes as Table 1. Note that the circuit equations in R0 are completely decoupled into two three-dimensional equations, because y d = 0. Let us consider eigenvalues in the three regions of the circuit equations in order to derive exact solutions. The characteristic equation of the circuit equations in each linear region is given as follows:
R0 (upper side circuit): λ11 , σ11 ± jω11 , R0 (lower side circuit): λ12 , σ12 ± jω12 . Further, we define the equilibrium points in R ± as ±Ee = [±Ea1
± Ea2
± Ea3
± Eb1
± Eb2
± Eb3 ]T . (11)
+ β{5 + ε + δ(6 + ε) + γ(5 + δ + ε)}]m4
These values are calculated by making the righthand side of Eq. (5) to be equal to zero. The equilibrium point in R0 is the origin. Then, we can describe the exact solutions in each linear region as follows.
+ [α3 (1 + β) + 2[5 + 3δ + 3ε + β{5 + 7δ + 2ε
In R± :
In R± : m6 + {5 + δ + β(1 + γ + δ) + ε}m5 + [10 + 4δ + 4ε
x(τ ) ∓ Ee = F(τ ) · F−1 (0) · (x(0) ∓ Ee ) ,
+ 2δε + γ(5 + 2δ + 2ε)}]]m3 + [5 + 4δ + 4ε + α3 {2 + β(4 + γ + 2δ + ε)}
where
+ 2β{5 + 8δ + 3ε + 3δε + γ(5 + 3δ + 3ε)}]m2
x(τ ) = [xa1 (τ ) xb2 (τ )
+ [1 + δ + ε + α3 {1 + β(5 + 2γ + 4δ + 2ε)}
F(τ ) = [fa1 (τ )
+ β{5 + 9δ + 4ε + 4δε + γ(5 + 4δ + 4ε)}]m
fb2 (τ )
+ β{1 + α6 + 2δ + ε + δε + γ(1 + δ + ε) + α3 (2 + γ + 2δ + ε)} = 0 .
(8)
In R0 : For upper side circuit, m3 + {2 + β(γ + 1)}m2 + {1 + 2β(γ + 1)}m +β(α3 + γ + 1) = 0 .
(9)
For lower side circuit, m3 + (ε + 3)m2 + (2ε + 3)m + α3 + ε + 1 = 0 . (10) We can calculate the eigenvalues in each region from the characteristic equations (8)–(10).
fa2 (τ ) = [eλ01 τ
xa2 (τ )
xa3 (τ )
xb1 (τ )
T
xb3 (τ )] , fa2 (τ )
fa3 (τ )
fb1 (τ )
fb3 (τ )]T , eλ02 τ
eσ01 τ sin ω01 τ
eσ01 τ cos ω01 τ eσ02 τ cos ω02 τ
eσ02 τ sin ω02 τ ]T , 1 dfa2 (τ ) + fa2 (τ ) , fa1 (τ ) = − α dτ 1 dfa1 (τ ) + fa1 (τ ) , fa3 (τ ) = − α dτ fb3 (τ ) =
1 dfa3 (τ ) γ + δ + 1 α + fa3 (τ ) + fa2 (τ ) , βδ dτ δ δ
δ dfb3 (τ ) δ + ε + 1 − fb3 (τ ) + fa3 (τ ) , dτ α α 1 dfb2 (τ ) + fb2 (τ ) . (12) fb1 (τ ) = − α dτ fb2 (τ ) = −
Simple Chaotic Circuit Using CMOS Ring Oscillators
In R0 :
R-
xa (τ ) = Ga (τ ) · G−1 a (0) · xa (0) ,
R0
T4
where
T5 T2
T1
T
xa (τ ) = [xa1 (τ )
xa2 (τ )
xa3 (τ )] ,
xb (τ ) = [xb1 (τ )
xb2 (τ )
xb3 (τ )]T ,
Ga (τ ) = [ga1 (τ )
ga2 (τ )
ga3 (τ )]T ,
Gb (τ ) = [gb1 (τ )
gb2 (τ )
gb3 (τ )]T ,
eσ11 τ cos ω11 τ
T3 Fig. 8. Route map. Figure 8: Route map.
eσ11 τ sin ω11 τ ]T ,
gb2 (τ ) = [eλ12 τ eσ12 τ cos ω12 τ eσ12 τ sin ω12 τ ]T , 1 dga2 (τ ) + ga2 (τ ) , ga1 (τ ) = − α dτ 1 dga1 (τ ) ga3 (τ ) = − + ga1 (τ ) , α dτ 1 dgb2 (τ ) gb1 (τ ) = − + gb2 (τ ) , α dτ 1 dgb1 (τ ) + gb1 (τ ) . (13) gb3 (τ ) = − α dτ
In order to confirm the generation of chaos and to investigate the related bifurcation scenario, we derive the Poincar´e map. Let us define the following subspace S = S 1 ∩ S2
(14)
where S1 : xa3 − xb3 = 1 S2 : αβxa2 + β(γ + 1)xa3 − αxb2 − (ε + 1)xb3 < 0 .
(15)
T = T 2 ◦ T1 .
(17)
Each submap can be given as follows. Suppose that the solution starts from at τ = 0 and that it hits S1 and enters R0 at x1 = (Xa11 , Xa21 , Xa31 , Xb11 , Xb21 , Xa31 − 1) at τ = τ1 . In this Xa11 − Ea1 X −E a21 a2 Xa31 − Ea3 Xb11 − Eb1 Xb21 − Eb2
case, x1 is given by
Xa31 − 1 − Eb3
The subspace S1 corresponds to the boundary condition between R+ and R0 , while the subspace S2 corresponds to the condition x˙ a3 − x˙ b3 > 0. Namely, S corresponds to the transitional condition from R 0 to R+ . Let us consider the solution starting from an initial point on S. The solution returns back to S again after wandering several subspaces as shown in Fig. 8. Hence, we can derive the Poincar´e map as follows: x0 7→ T(x0 ) ,
where x0 is an initial point on S, while T(x0 ) is the point at which the solution starting from x 0 hits S again. The Poincar´ e map can be represented 25 as a composite map of the submaps T1 , T2 · · · T6 in Fig. 8, which correspond to the route of the solution. As an example, let us derive the Poincar´e map for the case that the solution starting from S returns back to S again via the regions R + and R0 . In this case, the Poincar´e map can be obtained as
x0 = (Xa10 , Xa20 , Xa30 , Xb10 , Xb20 , Xa30 − 1)
4.3. Poincar´ e map
T : S → S,
R+
T6
xb (τ ) = Gb (τ ) · G−1 b (0) · xb (0) ,
ga2 (τ ) = [eλ11 τ
S
2519
(16)
Xa10 − Ea1
X −E a20 a2 Xa30 − Ea3 = F(τ1 ) · F−1 (0) · Xb10 − Eb1 Xb20 − Eb2
Xa30 − 1 − Eb3
(18)
where τ1 is obtained by solving the third and sixth rows of Eq. (18). We can calculate the submap
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Y. Hosokawa & Y. Nishio
T1 as x1 = T1 (x0 )
where τ2 is obtained by solving the third and sixth rows of Eq. (20). We can calculate the submap T2 as
(19)
Further, suppose that the solution hits S again at
x2 = T2 (x1 )
x2 = (Xa12 , Xa22 , Xa32 , Xb12 , Xb22 , Xa32 − 1)
In the same way, we can derive the other composite maps.
at τ = τ1 + τ2 . In this case, x2 is given by Xa12 Xa11 Xa22 = Ga (τ2 ) · G−1 a (0) · Xa21 Xa32 Xa31
(21)
4.4. Lyapunov exponents The Jacobian matrix DT of the Poincar´e map can be also derived as a product of the Jacobian matrices of the submaps corresponding to the route of the solution. As an example, we show the Jacobian matrix of the above Poincar´e map T = T 2 ◦ T1 .
Xb12 Xb11 −1 Xb22 = Gb (τ2 ) · Gb (0) · Xb21 Xa32 − 1 Xa31 − 1
(20)
DT = DT2 · DT1 .
1
0 DT1 = 0 0 0
0
Xa11 + αXa31 A1
0
0
Xa11 + αXa31 A1
−
1
αXa11 + Xa21 A1
0
0
αXa11 + Xa21 − A1
0
(ε + 1)Xa31 + αXb21 − ε − 1 A1
0
0
αβXa21 + β(γ + 1)Xa31 A1
0
αXa31 + Xb11 − α A1
0
0
1
αXb11 + Xb21 A1
0
0
−
αXa31 + Xb11 + α A1 −
αXb11 + Xb21 A1
(22)
1 0 0 · F(τ1 ) · F−1 (0) · 0 0 0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0 0 0 1
0
(23) where A1 = −αβXa21 + {−β(γ + 1) + ε + 1}Xa31 + αXb21 − ε − 1 .
1
0 DT2 = 0 0 0
Xa12 + αXa32 A2
0
1
αXa12 + Xa22 A2
0
0
0
(ε + 1)Xa32 + αXb22 − ε − 1 A2
0
0
0
αXa32 + Xb12 − α A2
0
0
1
αXb12 + Xb22 A2
0
0
0
0
−
−
Xa12 + αXa32 A2 αXa12 + Xa22 A2
αβXa22 + β(γ + 1)Xa32 A2 −
αXa32 + Xb12 − α A2 −
αXb12 + Xb22 A2
(24)
1 0 0 · G(τ2 ) · G−1 (0) · 0 0 0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0 0 0 1
0
(25)
Simple Chaotic Circuit Using CMOS Ring Oscillators
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(a) (a) (a) (a)
(b) (b) (b) (b)
(c) (c) (c) (c) Figure 9: Projection of attractors onto xa3 − xb3 plane (left side) and their Poincar´ e maps (right side). α = 4.0, β = 0.1, γ= and δ(left = 50. (a)and ε = their 10.0. Figure 9: Projection of attractors onto xa3 − xb35.0plane side) (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. Poincar´e9:maps (right side). α = 4.0, onto β = 0.1, and δ = 50. (a) ε = 10.0. Figure Projection of attractors x γ−=x5.0 b3 plane (left side) and their (h) ε= = 3.30. 2.40. (c) ε = 3.05. (d) ε = 2.90. (e) a3 (b) ε ε = 2.75. (f) ε= 2.66. Poincar´e maps (right side). α = 4.0, β = 0.1, γ = 5.0 and δ= 50. (g) (a)ε ε==2.57. 10.0. (h) ε = 2.40. (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. (h) ε = 2.40. 26 26 26
(d) (d) Fig. 9. Projection of attractors onto xa3 –xb3 plane (left) and their Poincar´e maps (right). α = 4.0, β = 0.1, γ = 5.0 and δ = 50. (a) ε = 10.0. (b) ε = 3.30. (c) ε = 3.05. (d) ε = 2.90. (e) ε = 2.75. (f) ε = 2.66. (g) ε = 2.57. (h) ε = 2.40.
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Y. Hosokawa & Y. Nishio
(d) (d)
(e) (e) (e)
(f) (f) (f) Figure 9: (continued). Figure 9: (continued).
27 27
(g) (g) (g)
(h) (h) (h) Figure Fig. 9: 9 (continued). (Continued ) Figure 9: (continued).
Simple Chaotic Circuit Using CMOS Ring Oscillators
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xa1
ε (a)
µ
ε (b) Fig. 10.
(a) One-parameter bifurcation diagram. (b) Largest Lyapunov exponent. α = 4.0, β = 0.1, γ = 5.0 and δ = 50.
where
5. Computer Calculated Results G(τ ) = [Ga (τ )T
Gb (τ )T ]T ,
(26)
A2 = −αβXa22 + {−β(γ + 1) + ε + 1}Xa32 + αXb22 − ε − 1 .
(27)
By using the Jacobian Matrix, we can calculate the largest Lyapunov exponent; N 1 X log |DT(j) · e(j)| N →∞ N
µ = lim
j=1
where e(j) is a normalized basis.
(28)
Figure 9 (left) shows the projections of attractors onto xa3 –xb3 plane obtained by calculating Eqs. (12) and (13). We can say that these results are similar to the SPICE simulation results in Fig. 4. Namely, the simplified model in Sec. 3 does not lose important features of the original circuit related with the generation of chaotic behavior. This means that the ring oscillators in the original circuit behave as simple divergently oscillating parts, and only the nonlinearity of the pair of diodes controls the amplitude. In other words, the ring oscillators play a role of expanding, while the coupling diodes play a role of folding. These two features, expanding and folding, are known as the essence of generating chaos.
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Y. Hosokawa & Y. Nishio
The Poincar´e maps are shown in Fig. 9 (right). One-periodic orbit (a) bifurcates to torus (b) around ε = 3.50. Periodic window (c) can be observed in the torus region. As ε decreases, torus grows (d) and starts to break down (e) and (f). From the shape of the Poincar´e maps, we can estimate that attractors in (g) and (h) are chaos. One-parameter bifurcation diagram and the calculated largest Lyapunov exponent are shown in Figs. 10(a) and 10(b), respectively. The control parameter is ε and the other parameters are fixed. As shown in Fig. 10, the Lyapunov exponent takes positive values for a relatively wide range of ε. Hence, the proposed circuit can be said to generate chaos. Moreover, we can describe the detailed bifurcation scenario as follows. For 3.15 < ε < 3.50, torus appears. We observed a large number of phase-locked states in this torus region. However, we cannot see the states in the diagram, because the parameter interval corresponding to each phase-locked state is not so large. For 2.95 < ε < 3.15, a large window corresponding to the periodic orbit in Fig. 9(c) is observed. For 2.57 < ε < 2.95, the largest Lyapunov exponent becomes positive occasionally though the attractor looks like torus. We consider that chaos via folded-torus appears in this interval [Inaba & Mori, 1992]. For 2.57 > ε, chaotic attractors can be observed for almost parameter values. We have also confirmed that a lot of small periodic windows are embedded in the chaotic region.
6. Conclusions In this study, we have proposed a very simple chaotic circuit using CMOS ring oscillators. By using a simplified model, the exact solutions of the circuit were derived. We calculated the Lyapunov exponents and confirmed the generation of chaos.
Further, we investigated the related bifurcation phenomena. The simplified model revealed the physical mechanism of the generation of chaos. Namely, the ring oscillators play a role of expanding and the coupling diodes play a role of folding, which are known as the essence of generating chaos. Because we chose the circuit parameters and other SPICE parameters as taking into account an implementation with 0.5 µm CMOS integrated circuit technology, we believe that the proposed circuit can be realized on IC chip easily.
References Cruz, J. M. & Chua, L. O. [1992] “A CMOS IC nonlinear resistor for Chua’s circuit,” IEEE Trans. Circuits Syst.-I 39, 985–995. Delgado-Restituto, M. & Rodr´ıguez, A. [1998] “Design considerations for integrated continuous-time chaotic oscillators,” IEEE Trans. Circuits Syst.-I 45, 481-495. Eguchi, K., Inoue, T. & Tsuneda, A. [1998] “FPGA implementation of a digital chaos circuit realizing a 3-dimensional chaos model,” IEICE Trans. Funds. E81-A, 1176–1178. Hosokawa, Y. & Nishio, Y. [2002] “A design method for chaotic circuits using two oscillators,” in Chaos in Circuits and Systems, eds. Chen, G. & Ueta, T. (World Scientific, Singapore), Chap. 3, pp. 51–69. Inaba, N. & Mori, S. [1992] “Folded torus in the forced Rayleigh oscillator with a diode pair,” IEEE Trans. Circuits Syst.-I 39, 402–411. Kanou, N., Horio, Y., Aihara, K. & Nakamura, S. [1993] “A current-mode circuit of a chaotic neuron model,” IEICE Trans. Fund. E76-A, 642–644. Lozi, R. & Chua, L. O. [1993] “Secure communications via chaotic synchronization II: Noise reduction by cascading two identical receivers,” Int. J. Bifurcation and Chaos 3, 1319–1325.
