TOPIC: Logic Arrays & Combinational Logic
ASSIGNMENT #5B Monday
Student Name and ID:
TOPIC: Logic Arrays & Combinational Logic Question 1 45 points Map the following logic function to the PLA shown in the figure below:
Question 2: Each 2-input logic gate is a 2-LUT, so we design the full-adder with only 5 logic gates. t1
Student Name and ID:
TOPIC: Logic Arrays & Combinational Logic Question 1 45 points Map the following logic function to the PLA shown in the figure below:
Question 2: Each 2-input logic gate is a 2-LUT, so we design the full-adder with only 5 logic gates. t1
