McGill University Department of Electrical and Computer ...
ECSE-221A
MidTerm Test Initials ________
Signature: _________________________________ I.D.Number: ________________
Printed Name: ______________________________
McGill University Department of Electrical and Computer Engineering Course ECSE-221A – Introduction to Computer Engineering MidTerm Test Examiner: Prof. T. Arbel Friday, October 27, 2006 INSTRUCTIONS: • • •
This is a closed book exam. A FACULTY STANDARD CALCULATOR permitted ONLY. Please answer all questions on the examination sheet itself.
PLEASE NOTE CAREFULLY: • • • •
Sign this paper at the top of this page, fill in your student ID number and print your name legibly. Initial each page of the exam paper in case the sheets should get separated. Make sure the signed paper in its entirety is handed in at the end of the examination. There are 7 questions for a total of 25 marks.
MidTerm 2006A-1
ECSE-221A
MidTerm Test Initials ________
TEST QUESTIONS: Question 1: (3 marks) Convert the following base-10 number to single precision IEEE-754 format: -12.25 x 2-20 Express the result in hexadecimal. Show all your work. Solution: Converting integer part to binary: 12/2 = 6 R:0 6/2 = 3 R:0 3/2 = 1 R:1 ½=1 R:1 12 => 1100 Converting fractional part to binary: 0.25 = 2-2 => .01 Therefore, -12.25 x 2-20 = -1100.01 x 2-20 = -1.10001 x 23 x 2-20 = -1.10001 x 2-17 Sign = 1 (negative) Mantissa = 10001000000000000000000 Exponent = -17+127 = 110 => 01101110 1011 0111 0100 0100 0000 0000 0000 0000 = B744000016
MidTerm 2006A-2
ECSE-221A
MidTerm Test Initials ________
Question 2: (3 marks) Perform the following calculation: 532316 + 623A16 Assume that the numbers are stored in 16-bit registers as 2’s complement binary numbers with no provision for overflow. Show the result in hexadecimal. If the computation is incorrect, please explain why. Show all work. Solution: In binary: Carry 1 1 1 1 0101 0011 0010 0011 + 0110 0010 0011 1010 -------------------------1011 0101 0101 1101 B 5 5 D (part marks to here) Note that the computation overflowed, and we end up with a negative 2’s complement number: B55D16. Do 2’s complement to find out what the number is: Original: 1011 0101 0101 1101 Inverted: 0100 1010 1010 0010 + 0000 0000 0000 0001 --------------------------0100 1010 1010 0011 or - 4 A A 3
in hex (either answer is acceptable).
MidTerm 2006A-3
ECSE-221A
MidTerm Test Initials ________
Question 3: (3 marks) Supposing a country’s healthcard card has 10 bytes to represent each citizen. The card has the following format (as an example): Jane Dow, born Aug. 12, 2002 Name D O
W
J
Year 0 2
Month A U
Day 1
2
Each byte is represented in ASCII as follows: Name D O
W
J
44
57
4A
4F
Year 0 2 30
32
Month A U
1
2
41
31
32
55
Day
Suppose you had to write a program to find all citizens born in the year 2002. Describe the steps you would take (using logical OR or logical AND). Solution: Need to extract the year fields in each card and compare against 02. Logical AND 1. AND with mask 00 00 00 00 FF FF 00 00. 2. Subtract 00 00 00 00 30 32 00 00 from result. 3. If result=0, record contains year 02. Logical OR 1. OR with mask FF FF FF FF 00 00 FF FF. 2. Subtract FF FF FF FF 30 32 FF FF from result. 3. If result=0, record contains year 02.
MidTerm 2006A-4
ECSE-221A
MidTerm Test Initials ________
Question 4: (4 marks) Determine the minimal
∑∏
and
∏∑
forms for the function F(A,B,C,D) with the
following truth table. Are the two equivalent? Prove your answer. Convert your answer into NAND-NAND format.
A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
Solution:
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
F 0 0 0 0 1 1 0 1 0 0 0 0 1 1 0 1
BA 00 01 11 10 DC 00 01 11 10
0 0 0 0
0 0 0 0
1 0 1 1
1 0 1 1
Sum of products = BD + BC’ BA 00 01 11 10 DC 00 01 11 10
0 0 0 0
0 0 0 0
1 0 1 1
1 0 1 1
MidTerm 2006A-5
ECSE-221A
MidTerm Test Initials ________
Product of Sums = (C’+D)(B) = BC’+BD. The 2 are equivalent! NAND-NAND: BC + BD = BC + BD = BC ⋅ BD Question 5: (4 marks) Implement the function in Question 4 using an 8-input multiplexer. Make sure to label all the pins on your chip as well as all the inputs to the pins. Solution: A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
0 0 1 D 0 0 1 D
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D0 D1 D2 D3 D4 D5 D6 D7
F 0 0 0 0 1 1 0 1 0 0 0 0 1 1 0 1
0 0 1 D 0 0 1 D
F
AB C
MidTerm 2006A-6
ECSE-221A
MidTerm Test Initials ________
Question 6: (2 marks) What latch is implemented by the circuit shown below?
Solution: S-R FF
MidTerm 2006A-7
ECSE-221A
MidTerm Test Initials ________
Question 7: (6 marks) Consider the sequential circuit below:
(a) Draw the State Transition Table for the circuit above (2 marks) Solution: From the notes: D1=XOR(Q1,Q0) D0=Q0’ Q1(t+T) = XOR(Q1,Q0) Q0(t+T) = Q0(t)’
MidTerm 2006A-8
ECSE-221A
MidTerm Test Initials ________
(b) What is the function of this circuit? (1 mark) 4-bit counter
(c) Supposing the circuit consists of edge-triggered flip-flops following the model we studied in class. Let the registers have the following parameters:
Q0 Q1
Tsu 5ns 10ns
Th 5ns 5ns
Tpd 20ns 30ns
Tw 20ns 25ns
The XOR has a propagation delay of 75ns. Determine the maximum operating frequency for the circuit. (3 marks) Solution: Worst case parameters are: Q0 Q1 Worst
Tsu 5ns 10ns 10ns
Th 5ns 5ns 5ns
Tpd 20ns 30ns 30ns
Tw 20ns 25ns 25ns
From the equation we know that: Fmax = 1/(Tsu + Tcl + Tpd) = 1/(10 + 75+30) = 8.7 Mhz Can derive this from the circuit: • 30nS after clock edge, Q1 is ready (20nS for Q0) • After 30ns, the inputs to the XOR are ready. Tcl = 75nS so 75 nS, the output of the XOR/input to the Q1 FF is stable (the input to Q0 was ready right away). • Need to wait another 10ns for Q1 set-up time. • Total time = 30ns + 75ns + 10ns. • Fmax =1/(10 + 75+30) = 8.7 Mhz
MidTerm 2006A-9
MidTerm Test Initials ________
Signature: _________________________________ I.D.Number: ________________
Printed Name: ______________________________
McGill University Department of Electrical and Computer Engineering Course ECSE-221A – Introduction to Computer Engineering MidTerm Test Examiner: Prof. T. Arbel Friday, October 27, 2006 INSTRUCTIONS: • • •
This is a closed book exam. A FACULTY STANDARD CALCULATOR permitted ONLY. Please answer all questions on the examination sheet itself.
PLEASE NOTE CAREFULLY: • • • •
Sign this paper at the top of this page, fill in your student ID number and print your name legibly. Initial each page of the exam paper in case the sheets should get separated. Make sure the signed paper in its entirety is handed in at the end of the examination. There are 7 questions for a total of 25 marks.
MidTerm 2006A-1
ECSE-221A
MidTerm Test Initials ________
TEST QUESTIONS: Question 1: (3 marks) Convert the following base-10 number to single precision IEEE-754 format: -12.25 x 2-20 Express the result in hexadecimal. Show all your work. Solution: Converting integer part to binary: 12/2 = 6 R:0 6/2 = 3 R:0 3/2 = 1 R:1 ½=1 R:1 12 => 1100 Converting fractional part to binary: 0.25 = 2-2 => .01 Therefore, -12.25 x 2-20 = -1100.01 x 2-20 = -1.10001 x 23 x 2-20 = -1.10001 x 2-17 Sign = 1 (negative) Mantissa = 10001000000000000000000 Exponent = -17+127 = 110 => 01101110 1011 0111 0100 0100 0000 0000 0000 0000 = B744000016
MidTerm 2006A-2
ECSE-221A
MidTerm Test Initials ________
Question 2: (3 marks) Perform the following calculation: 532316 + 623A16 Assume that the numbers are stored in 16-bit registers as 2’s complement binary numbers with no provision for overflow. Show the result in hexadecimal. If the computation is incorrect, please explain why. Show all work. Solution: In binary: Carry 1 1 1 1 0101 0011 0010 0011 + 0110 0010 0011 1010 -------------------------1011 0101 0101 1101 B 5 5 D (part marks to here) Note that the computation overflowed, and we end up with a negative 2’s complement number: B55D16. Do 2’s complement to find out what the number is: Original: 1011 0101 0101 1101 Inverted: 0100 1010 1010 0010 + 0000 0000 0000 0001 --------------------------0100 1010 1010 0011 or - 4 A A 3
in hex (either answer is acceptable).
MidTerm 2006A-3
ECSE-221A
MidTerm Test Initials ________
Question 3: (3 marks) Supposing a country’s healthcard card has 10 bytes to represent each citizen. The card has the following format (as an example): Jane Dow, born Aug. 12, 2002 Name D O
W
J
Year 0 2
Month A U
Day 1
2
Each byte is represented in ASCII as follows: Name D O
W
J
44
57
4A
4F
Year 0 2 30
32
Month A U
1
2
41
31
32
55
Day
Suppose you had to write a program to find all citizens born in the year 2002. Describe the steps you would take (using logical OR or logical AND). Solution: Need to extract the year fields in each card and compare against 02. Logical AND 1. AND with mask 00 00 00 00 FF FF 00 00. 2. Subtract 00 00 00 00 30 32 00 00 from result. 3. If result=0, record contains year 02. Logical OR 1. OR with mask FF FF FF FF 00 00 FF FF. 2. Subtract FF FF FF FF 30 32 FF FF from result. 3. If result=0, record contains year 02.
MidTerm 2006A-4
ECSE-221A
MidTerm Test Initials ________
Question 4: (4 marks) Determine the minimal
∑∏
and
∏∑
forms for the function F(A,B,C,D) with the
following truth table. Are the two equivalent? Prove your answer. Convert your answer into NAND-NAND format.
A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
Solution:
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
F 0 0 0 0 1 1 0 1 0 0 0 0 1 1 0 1
BA 00 01 11 10 DC 00 01 11 10
0 0 0 0
0 0 0 0
1 0 1 1
1 0 1 1
Sum of products = BD + BC’ BA 00 01 11 10 DC 00 01 11 10
0 0 0 0
0 0 0 0
1 0 1 1
1 0 1 1
MidTerm 2006A-5
ECSE-221A
MidTerm Test Initials ________
Product of Sums = (C’+D)(B) = BC’+BD. The 2 are equivalent! NAND-NAND: BC + BD = BC + BD = BC ⋅ BD Question 5: (4 marks) Implement the function in Question 4 using an 8-input multiplexer. Make sure to label all the pins on your chip as well as all the inputs to the pins. Solution: A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
0 0 1 D 0 0 1 D
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D0 D1 D2 D3 D4 D5 D6 D7
F 0 0 0 0 1 1 0 1 0 0 0 0 1 1 0 1
0 0 1 D 0 0 1 D
F
AB C
MidTerm 2006A-6
ECSE-221A
MidTerm Test Initials ________
Question 6: (2 marks) What latch is implemented by the circuit shown below?
Solution: S-R FF
MidTerm 2006A-7
ECSE-221A
MidTerm Test Initials ________
Question 7: (6 marks) Consider the sequential circuit below:
(a) Draw the State Transition Table for the circuit above (2 marks) Solution: From the notes: D1=XOR(Q1,Q0) D0=Q0’ Q1(t+T) = XOR(Q1,Q0) Q0(t+T) = Q0(t)’
MidTerm 2006A-8
ECSE-221A
MidTerm Test Initials ________
(b) What is the function of this circuit? (1 mark) 4-bit counter
(c) Supposing the circuit consists of edge-triggered flip-flops following the model we studied in class. Let the registers have the following parameters:
Q0 Q1
Tsu 5ns 10ns
Th 5ns 5ns
Tpd 20ns 30ns
Tw 20ns 25ns
The XOR has a propagation delay of 75ns. Determine the maximum operating frequency for the circuit. (3 marks) Solution: Worst case parameters are: Q0 Q1 Worst
Tsu 5ns 10ns 10ns
Th 5ns 5ns 5ns
Tpd 20ns 30ns 30ns
Tw 20ns 25ns 25ns
From the equation we know that: Fmax = 1/(Tsu + Tcl + Tpd) = 1/(10 + 75+30) = 8.7 Mhz Can derive this from the circuit: • 30nS after clock edge, Q1 is ready (20nS for Q0) • After 30ns, the inputs to the XOR are ready. Tcl = 75nS so 75 nS, the output of the XOR/input to the Q1 FF is stable (the input to Q0 was ready right away). • Need to wait another 10ns for Q1 set-up time. • Total time = 30ns + 75ns + 10ns. • Fmax =1/(10 + 75+30) = 8.7 Mhz
MidTerm 2006A-9
